Showing papers on "Database-centric architecture published in 1988"

A Connectionist/Control Architecture for Working Memory

Abstract: Publisher Summary This chapter discusses the architecture of working memory The term “architecture” is used in computer science as a systematic approach to the configuration of computational components to accomplish some information-processing tasks The architecture described in the chapter illustrates both the limitations and capacities of human information processing The chapter also discusses human phenomena that identify the qualitative features of human information processing and exhibit the qualitative features of the architecture of working memory The connectionist/control architecture assumes processing that occurs in a set of modules organized into levels and regions The regions communicate with each other on an inner loop of connections This loop allows information to be transferred among input, output, and other regions A new feature of this architecture is a proposed context-storage module that associates the content of messages in the inner loop with the temporal context The context storage system can reload modules after short-term information decays or is displaced In addition, it provides a means of achieving stable, robust processing under conditions of high workload

A taxonomy for computer architectures

Abstract: A taxonomy is presented that extends M.J. Flynn's (IEEE Trans.Comput., vol. C-21, no.9, p.948-60, Sept. 1972), especially in the multiprocessor category. It is a two-level hierarchy in which the upper level classifies architectures based on the number of processors for data and for instructions and the interconnections between them. A lower level can be used to distinguish variants even more precisely; it is based on a state-machine view of processors. The author suggests why taxonomies are useful in studying architecture and shows how this applies to a number of modern architectures. >

Heterogeneity in supercomputer architectures

Abstract: Various organization styles have been used in the architecture of supercomputers in order to achieve cost-effective performance and programmability. Traditionally, a particular organization style (e.g., vector pipeline processor, array processor, or multiprocessor) has been selected to satisfy the performance requirements of a class of applications, achieving usually a much lower performance in other applications. In addition, the mapping of ‘foreign’ algorithms to a single-style architecture may create great programming difficulties. Since each architecture style provides attractive cost-performance and programming features, the question of heterogeneity (i.e., combining of several architecture/design styles in a single system) deserves attention. In this paper we discuss some approaches to heterogeneous architectures, identify hardware and software issues, and analyze several built or proposed systems.

System architectures for interactive knowledge-based image interpretation

Abstract: We discuss hardware and software architecture for automated image-interpretation. The importance of considering the complete system is emphasized leading in particular to the conclusion that high-level and low-level processing are intimately linked. We present arguments to support the idea that automated image-interpretation systems should be knowledge-based and interactive. We attempt to identify the main architectural problems which such systems must address and outline a systematic strategy for acquiring, structuring and using knowledge.

Archetype: a unified method for the design and implementation of protocol architectures

Abstract: A method for the automated design, specification, and implementation of protocol architectures is introduced. A natural-language-like protocol architecture specification technique, called Archetype, is formulated. This technique aids the design by enabling an unambiguous specification of the protocol architecture on the level of the communications technologies used, without involvement in the complex implementation details of these technologies. The author defines a data-driven concurrent execution model and specifies the generation of executable specifications from abstract protocol architecture specifications. The exploitation of parallelism in the execution model enables the fulfilment of performance constraints placed on protocol architectures. An architecture based on a single X.25-level 3-like protocol is used as an illustrative example. >

Microarchitecture modelling through ADL

Abstract: ADL is an Architecture Description Language that has been developed to model computer architectures at different levels of detail, as for instance, at the microarchitecture level.Target architectures described in ADL are processed by the support system of the language which generates an interpreter program related to the description of the target machine. The interpreter reproduces the behavior of the architecture being modeled, including the interpretation of the target code.In addition to a brief review of the language and the implementation details of its support system, this paper also shows some methods to deal with target machine parallelism, and the modeling of two microprogrammable machines.

Knowledge-based performance evaluation of computer architectures

Abstract: Presents an application area for artificial intelligence techniques in the context of designing and evaluating computer architectures. A knowledge-based approach to performance evaluation of computer architectures is described which is suited for application during the early phases of design. Taxonomical knowledge is used to develop an architecture description facility that allows descriptions to be constructed quickly and easily. Heuristical knowledge about the influence of design characteristics on the architecture's performance helps to assess the run time for benchmark programs with respect to a specific architecture, without the need for time-consuming simulations. Using these kinds of knowledge, a system can be built which is flexible and fast enough to allow the comparison of many design alternatives during the early phases of architectural design. A prototypical system has been implemented; and it is concluded that the results obtained by this system support the feasibility of the knowledge-based approach to performance evaluation. >