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Showing papers on "Decoupling capacitor published in 1994"


Proceedings ArticleDOI
13 Feb 1994
TL;DR: In this paper, a variable-frequency control that reduces the voltage stress and makes the Integrated High-Quality Rectifier-Regulators (IHQRRs) suitable for universal input-range applications is described.
Abstract: The Integrated High-Quality Rectifier-Regulators (IHQRRs) suffer from relatively high stress on the internal-energy storage capacitor and, consequently, on primary-side semiconductors. As a result, they are not practical in applications with the universal input-voltage range. In this paper, a variable-frequency control that reduces the voltage stress and makes the IHQRRs suitable for universal input-range applications is described. Evaluation results of a 90 W, experimental BIBRED power converter that uses the proposed variable-frequency control are presented. >

198 citations


Patent
22 Nov 1994
TL;DR: A DC-to-DC voltage convertor is made up of a capacitor array having plural capacitor elements (C p1, C p2, C p3 ) and a plurality of switches (S 2... S10) which are switchable between at least two states as mentioned in this paper.
Abstract: A DC-to-DC voltage convertor is made up of a capacitor array having plural capacitor elements (C p1 , C p2 , C p3 ) and a plurality of switches (S2 . . . S10) which are switchable between at least two states. When the switches are switched in the first state, the capacitor elements are connected in series, and when the switches are connected in the second state, the capacitor elements are connected in parallel. The DC-to-DC voltage convertor may be configured as a step-down convertor (FIG. 2a) or a step-up convertor (FIG. 2b).

184 citations


Patent
06 Jun 1994
TL;DR: In this paper, a dynamically configurable switched capacitor power supply and a method for operation thereof is presented, which includes an error detector coupled to the first output, an oscillator for providing a clocking signal, an analog-to-digital conversion circuit for providing an analog representation of a voltage of the power source and control logic for providing the first control signals in response to the clock signal and the error detector.
Abstract: A dynamically configurable switched capacitor power supply and a method for operation thereof. The power supply includes a first dynamically adjustable switched capacitor network having a first input, a first output and including a first plurality of n many switched capacitors. The first input is adapted to be coupled to a power source. The first dynamically adjustable switched capacitor network provides a step-up or step-down power supply regulation function in response to first control signals. The power supply includes a control network having an error detector coupled to the first output, an oscillator for providing a clocking signal, an analog to digital conversion circuit for providing a digital representation of a voltage of the power source and control logic for providing the first control signals in response to the clocking signal and in response to signals from the error detector.

136 citations


Proceedings ArticleDOI
L.D. Smith1
02 Nov 1994
TL;DR: Capacitor values and quantities are calculated using time and frequency domain techniques in this article, where the authors propose a method for decoupling capacitors to reduce EMC/EMI radiated noise.
Abstract: CMOS circuits on printed circuit boards with continuous power planes require decoupling capacitors to keep power supply within specification, provide signal integrity and reduce EMC/EMI radiated noise. Capacitor values and quantities are calculated using time and frequency domain techniques.

92 citations


Patent
14 Mar 1994
TL;DR: In this paper, the capacitance of a capacitor is determined by applying a voltage input having a known amplitude and wave form, V, to an RC circuit having a substantially known or constant load impedance, R, and sampling the voltage across the resistor (6 or 16) or capacitor (8 or 14) at a precisely controlled elapsed time interval, T. The method permits detector circuits to be created for measuring small variations in value with precision and accuracy.
Abstract: A method measures the value of a capacitor and detects small variations in the value of a capacitor around a reference value. The capacitance of the capacitor may be determined by applying a voltage input having a known amplitude and wave form, V, to an RC circuit having a substantially known or constant load impedance, R, and sampling the voltage across the resistor (6 or 16) or capacitor (8 or 14) at a precisely controlled elapsed time interval, T. The method permits detector circuits to be created for measuring small variations in value with precision and accuracy. Solid state keypads (30) incorporating sensor cells (32) and software algorithms provide human interface systems which are not subject to environmentally induced errors or errors due to component aging.

84 citations


Patent
05 Dec 1994
TL;DR: In this article, a regulated supply (10) includes a charge pump (12), an output (14), a sensing circuit (16), and a control circuit (18), whose capacitance can be varied to compensate for changing loads and input power supply levels.
Abstract: A regulated supply (10) includes a charge pump (12), an output (14), a sensing circuit (16), and a control circuit (18). The charge pump (12) includes a variable capacitor (33) whose capacitance C v may be varied to compensate for changing loads and input power supply levels. The sensing circuit (16) senses the voltage level at the output (14) and provides feedback signals (66) and (68) to the control circuit (18). The voltage at the output (14) is dependent upon the capacitance C v of the variable capacitor (33). Therefore, responsive to the feedback signals (66) and (68) from the sensing circuit, the control circuit (18) varies the capacitance C v of the variable capacitor (33). The control circuit (18) then may vary the value of C v in a step-like manner to correct for the voltage at the output (14).

67 citations


Patent
04 Oct 1994
TL;DR: In this article, a flat chip capacitor is coupled to an integrated circuit chip with short bonding wires to reduce electrical noise and a flex circuit of a micro ball grid array is placed on a capacitor which is positioned on a chip.
Abstract: An integrated circuit chip and flat capacitor assembly are connected with short bonding wires to reduce electrical noise. A flat chip capacitor is coupled to the chip and includes a first electrode, a second electrode and a dielectric layer disposed between the electrodes. The ground and power bonding pads of an integrated circuit chip are coupled to a number of terminals arranged in a row near the outer edge of the capacitor, where each of the terminals is coupled to one of the electrodes. The terminals of the capacitor are connected to a number of package leads of a lead frame or a other integrated circuit package. The invention includes embodiments in which the chip is placed on top of the capacitor, the capacitor is placed on top of the chip, and a flex circuit of a micro ball grid array is placed on a capacitor which is positioned on a chip.

65 citations


Patent
Girts U. Jatnieks1
06 Apr 1994
TL;DR: In this article, an electrically operated actuator stores power in a capacitor for returning the actuator output element to a preselected position upon power failure, and a sensor monitors the presence of power provided to the controller's input power terminals.
Abstract: An electrically operated actuator stores power in a capacitor for returning the actuator output element to a preselected position upon power failure. The actuator has a controller having input power terminals connected across the capacitor and control terminals for controlling the power applied from the input power terminals to the motor which comprises the actuator's prime mover. A sensor monitors the presence of power provided to the controller's input power terminals. When failure of this power is sensed, the capacitor current flows to the controller, and the sensor applies signals to an override circuit of the controller causing the controller to apply current from the capacitor to the actuator motor in a way which drives the actuator toward the preselected position. A properly selected capacitor is capable of supplying adequate current over a period of time sufficient to return the actuator to the preselected position.

61 citations


Patent
10 Jun 1994
TL;DR: In this paper, an on-board electric vehicle battery charger includes a surge limiter circuit, a power factor control circuit, and a resonant inverter circuit, which is used to establish a resonance frequency at least 500 times the AC input power frequency.
Abstract: An on-board electric vehicle battery charger includes a surge limiter circuit, a power factor control circuit, and a resonant inverter circuit. The power factor control circuit includes a boost regulator circuit providing a fixed voltage on an output capacitor. The resonant inverter circuit uses a resonance capacitor and the leakage inductance of an output transformer to establish a resonance frequency at least 500 times the AC input power frequency.

53 citations


Patent
15 Jun 1994
TL;DR: In this paper, a photoelectric conversion detection cell is used as a pixel to form a low noise and high sensitivity solid state image pickup device, where a current mirror is connected in parallel to the storage capacitor.
Abstract: A photoelectric conversion detection cell includes a photodiode; a storage capacitor for storing a photo-induced charge induced in the photodiode; and a transfer transistor for transferring the photo-induced charge induced in the photodiode to the storage capacitor, the source of the transfer transistor being connected to the photodiode, the drain of the transfer transistor being connected to the storage capacitor; an inverting amplifier, the input of the inverting amplifier being connected to the photodiode, the output of the inverting amplifier being connected to the gate of the transfer transistor. Also, the photo-induced charge stored in the storage capacitor may be reset and an amplified output corresponding to the photo-induced charge stored in the storage capacitor may be generated by an amplifier. The photoelectric conversion detection cell is used as a pixel to form a low noise and high sensitivity solid state image pickup device. In a further embodiment, a current mirror is connected in parallel to the storage capacitor.

48 citations


Patent
20 Apr 1994
TL;DR: In this paper, a CMOS power-on reset circuit has a delay capacitor to provide a predetermined delay period, which is controlled by the state of a flip-flop circuit.
Abstract: A CMOS power-on reset circuit has a delay capacitor to provide a predetermined delay period. Charging and discharging of the delay capacitor is controlled by the state of a flipflop circuit. An input comparator monitors a power supply input voltage. An invalid input voltage level immediately changes the reset output signal to the invalid state and discharges the capacitor. Even after the input voltage has recovered to a valid level, recharging the capacitor is delayed until the capacitor has substantially discharged, thereby ensuring at least a predetermined delay period after the last fault condition. The reset output signal is coupled in a feedback configuration so as to lower the threshold voltage when the reset output switches to the valid state, to allow limited power supply sag, for example due to motor start-up, without resetting the circuit. Multiple power supply voltages are continuously monitored in a CMOS integrated configuration by additional input scaling resistor networks and input comparators, all coupled to the common 2-level threshold voltage node.

Patent
Masaki C1, Masahiko C
15 Nov 1994
TL;DR: In this paper, a delay circuit comprising at least one capacitor (209,210) with one electrode thereof is connected to a fixed potential (GND), a signal transmission line (212), and a switch means (205,208;211,206,207) between the other electrode of the capacitor and the signal transmission lines (212).
Abstract: A delay circuit comprising at least one capacitor (209,210) with one electrode thereof is connected to a fixed potential (GND), a signal transmission line (212), and at least one switch means (205,208;211,206,207) between the other electrode of the capacitor and the signal transmission line (212). The switch means makes electrical connection or disconnection between the capacitor and the signal transmission line (212) in accordance with an actual supply voltage (Vdd) value.

Patent
27 May 1994
TL;DR: A voltage discharge circuit as discussed by the authors discharges the voltage across a charge storage device such as a capacitor, at an output of a power supply, which is used in a contrast power supply for an LCD panel.
Abstract: A voltage discharge circuit discharges the voltage across a charge storage device, such as a capacitor, at an output of a power supply. The discharge circuit may be used, for example, in a contrast power supply for an LCD panel. The discharge circuit uses one or more switches to control the coupling between the output capacitor and a discharge element, such as a resistor. When the power supply is enabled, the discharge resistor is not coupled to the output capacitor, so that the discharge circuit does not significantly affect the operation of the power supply. When the power supply is disabled, the switches couple the discharge resistor to the output capacitor to discharge any accumulated voltage at a relatively fast rate. For a contrast power supply for an LCD display, a switching power supply is preferred.

Patent
17 Feb 1994
TL;DR: A discharge level monitor for a battery is described in this article, where the current flowing from the monred battery is passed through a sensing resistor. The voltage across the resistor is amplified and integrated over time and the result of the integration is stored in a capacitor.
Abstract: A discharge level monitor for a battery. The current flowing from the monred battery is passed through a sensing resistor. The voltage across the resistor is amplified and integrated over time and the result of the integration is stored in a capacitor. The capacitor is discharged by a switch controlled by a logic circuit, whenever a threshold voltage is achieved. The cycle is repeated each time one coulomb capacity is removed from the battery. A counting circuit counts the number of charge/discharge cycles of the capacitor to produce a count which is representative of the amount of energy dissipated and therefore indirectly of the amount of energy remaining in the battery system.

Journal ArticleDOI
16 Feb 1994
TL;DR: The PLL circuit described here performs the function of data and clock recovery for random data patterns by using a sample-and-hold technique, and four component circuits were specially designed to further stabilize the PLL operation.
Abstract: The PLL circuit described here performs the function of data and clock recovery for random data patterns by using a sample-and-hold technique, and four component circuits (a phase comparator, a delay circuit, a voltage-controlled oscillator, and a S/H switch with a low-pass-filter) were specially designed to further stabilize the PLL operation. A test chip fabricated using Si bipolar process technology demonstrated error-free operation with an input of 2/sup 23/-1 PRBS data at 156 Mb/s. The rms data pattern jitter was reduced to only 1.2 degrees with only an external power supply bypass capacitor. >

Patent
28 Jan 1994
TL;DR: In this paper, a power switch circuit including a small signal transformer and a low power oscillator is used to detect the power switch while isolating it from the primary of the power supply.
Abstract: A power switch circuit including a small signal transformer and a low power oscillator for detecting the power switch while isolating it from the primary of the power supply. When the power switch is off, or is otherwise pressed to turn off the power supply, the oscillator charges a capacitor. A sensing and control circuit coupled to the oscillator and capacitor grounds a vital signal of the power supply keeping the power supply turned off. In one embodiment, when the switch is turned on, it shorts the signal transformer disabling the oscillator, so that the capacitor is discharged and the sensing and control circuit releases the vital signal. In another embodiment, the power switch momentarily disables the oscillator and discharges the capacitor, so that the sensing and control circuit toggles a flip-flop circuit to turn on the power supply.

Patent
Damien McCartney1
15 Feb 1994
TL;DR: In this paper, a switched-capacitor auto-zero integrator includes and integrator circuit and a correction circuit, where the integrator is any circuit including an operational amplifier having an input line and an output line, an input capacitor coupled to be charged by an Input voltage, and at least one integrating switch operable during an integrating time interval to connect the input capacitor to the integrating capacitor such that the integrated capacitor is charged to compensate for charge of the input capacitance.
Abstract: A switched-capacitor auto-zero integrator includes and integrator circuit and a correction circuit. The integrator circuit may be any circuit including an operational amplifier having an input line and an output line, an input capacitor coupled to be charged by an Input voltage, an integrating capacitor coupled to the output line, and at least one integrating switch operable during an integrating time interval to connect the input capacitor to the integrating capacitor such that the integrating capacitor is charged to compensate for charge of the input capacitor. The correction circuit includes an offset capacitor coupled to the input line and at least one correction switch operable in an auto-zero sub-interval: and a correction sub-interval. The sub-intervals occur only during the integrating interval such that the offset capacitor is charged by an offset voltage and a gain error voltage of the operational amplifier during the auto-zero sub-interval and the offset capacitor is connected to a summing node between the input capacitor and the integrating capacitor during the correction sub-interval.

Patent
30 Jun 1994
TL;DR: In this paper, a double layer capacitor is charged by a constant-current power supply which is preferably a current controlled output type switching power supply, and the voltage across the terminals of the capacitor is overcharged for a short time.
Abstract: Method and apparatus for quickly and efficiently charging an electric double layer capacitor. The capacitor is charged by a constant-current power supply which is preferably a current controlled output type switching power supply. To cause the voltage across the terminals of the capacitor to reach its working voltage in a short time, the capacitor is overcharged for a short time. Where the capacitor is charged with a solar battery, a constant-current output type switching regulator is interposed between the solar battery and the capacitor.

Patent
22 Mar 1994
TL;DR: In this paper, a sawtooth oscillator is formed by using the charge pump as a timing circuit with the oscillator providing the clock signal, and the second current from the output terminal being fed back to the first capacitor terminal.
Abstract: Charge pump including: a capacitor (4) which includes a first capacitor terminal (2) and a second capacitor terminal (8), a discharge switch (20) for discharging the capacitor (4) by the closing and opening of the discharge switch (20) in response to a first or second value respectively, of a clock signal (CS), a first current source (6) for supplying a first current (I1) to the first capacitor terminal (2), a comparator (12) whose first input (10) is connected to the first capacitor terminal (2) and whose second input (14) is connected to a reference voltage source (16) and which comparator generates a comparison signal (Vcomp) of which a first or second value denotes that the voltage (Vc) on the first input (10) is smaller or larger than the voltage on the second input (14), a current switch (24) passing a second current (I2) coming from the second current source (34) to an output terminal (28) once the clock signal (CS) has changed from the first to the second value, and prevents the second current (I2) flowing to the output terminal (28) once the comparison signal (Vcomp) has changed from the first to the second value. A sawtooth oscillator is formed by using the charge pump as a timing circuit with the oscillator providing the clock signal, and the second current from the output terminal being fed back to the first capacitor terminal.

Patent
08 Nov 1994
TL;DR: In this article, an apparatus for inspecting an electric component in an inverter circuit has a DC power supply 14 for supplying a direct current to a given position in an inverted circuit, a voltage detector 16 for detecting a voltage at a given point in the inverter, a current detector 18 for detecting current flowing at a position in the inverted circuit and a switching circuit 24 for changing positions at which the direct current is supplied from the DC Power supply 14, positions where the voltage is detected by the voltage detector 18, and positions where a controller 26 for outputting a switching signal to
Abstract: An apparatus for inspecting an electric component in an inverter circuit has a DC power supply 14 for supplying a direct current to a given position in an inverter circuit, a voltage detector 16 for detecting a voltage at a given position in the inverter circuit, a current detector 18 for detecting a current flowing at a given position in the inverter circuit, a switching circuit 24 for changing positions at which the direct current is supplied from the DC power supply 14, positions at which the voltage is detected by the voltage detector 16, and positions at which the current is detected by the current detector 18, and a controller 26 for outputting a switching signal to the switching circuit 24. The switching circuit 24 is controlled by the controller 26 to charge an electrolytic capacitor in an inverter circuit with a current from the DC power supply 14. The electrolytic capacitor is determined as to its quality by determining whether the calculated electrolytic capacitance of the electrolytic capacitor falls within a preset range or not. Each of transistors of the inverter circuit is determined as to its quality by determining whether an VCE - IC curve thereof falls in a preset range or not. The electrolytic capacitor, the transistors, and also diodes connected across the transistors can be determined as to whether they acceptable or not while they are being connected in the inverter circuit.

Patent
27 Jun 1994
TL;DR: In this paper, an electric apparatus with a power supply including a double layer capacitor capable of being charged in a short time and supplying a constant electric power with a high power efficiency is presented.
Abstract: An electric apparatus with a power supply including a electric double layer capacitor capable of being charged in a short time and supplying a constant electric power with a high power efficiency, and in a peak load type electric apparatus such as an electric automobile, a long time small power output and a short time large power output can be derived as required. For a constant load type electric apparatus, electric power is supplied from an electric double layer capacitor of a power supply, and is stabilized to a constant voltage by a switching regulator, and for a peak load type electric apparatus, a power supply is made by connecting a first electric double layer capacitor of a high energy density type to a second electric double layer capacitor of a high power density type via a current output type switching regulator, and the second capacitor is charged with electric power in the first capacitor through the switching regulator. The output power is always derived from the second capacitor of high power density.

Patent
02 May 1994
TL;DR: In this paper, a voltage sensor is provided to the battery and/or the large-capacity capacitor to detect their terminal voltages, and when the terminal voltage is equal to or higher than a predetermined value, a current flowing from the motor driving circuit to the large capacity capacitor is limited.
Abstract: A large-capacity capacitor (C1, C2) is connected in series and/or parallel with a battery (11). A voltage sensor (9, 10) is provided to the battery and/or the large-capacity capacitor to detect their terminal voltages. Input and output currents are limited between at least one of a motor driving circuit and the large-capacity capacitor and the battery on the basis of the detection signals from the voltage sensor. When the terminal voltage of the large-capacity capacitor is equal to or higher than a predetermined value, a current flowing from the motor driving circuit to the large-capacity capacitor is limited.

Proceedings ArticleDOI
22 Aug 1994
TL;DR: In this paper, Lumped element models for a power bus on a multilayer printed circuit board where an appreciable or entire portion of a layer is devoted to power and ground have been developed.
Abstract: Power bus decoupling designs on multilayer printed circuit boards must adequately account for the power bus interplane capacitance and its consequences for the design. Lumped element models for a power bus on a multilayer printed circuit board where an appreciable or entire portion of a layer is devoted to power and ground have been developed. The models are applicable below the distributed resonances of the board. Analytical, circuit simulation, and experimental studies have been conducted to test the models, investigate the effects of the distributed interplane capacitance of the power bus, and the effect of interconnect inductance associated with surface-mount decoupling capacitors. >

Patent
11 Feb 1994
TL;DR: In this paper, a switch capacitor circuit is described which is programmable so that its function can be set by a user, and control circuitry and selection circuitry are provided to enable one of a plurality of alternative control signals to be provided to switch circuits of the switched capacitor circuit.
Abstract: A switched capacitor circuit is described which is programmable so that its function can be set by a user. Thus, control circuitry and selection circuitry are provided to enable one of a plurality of alternative control signals to be provided to switch circuits of the switched capacitor circuit. In this way, the function of the switched capacitor circuits can be altered. Where there are a plurality of switched capacitor circuits connected in an array, the topology of the array can be altered by suitably routing particular input signals to particular outputs by selecting the control signals to control the switched circuits. A field programmable array of this type is also described.

Patent
26 Sep 1994
TL;DR: In this article, a load drive apparatus is used in a vehicle direction indicating apparatus operable free from overcurrents and overvoltage, which includes a charging/recharging capacitor and a drive circuit for turning ON a power transistor series connected to a current path employed to supply a current from a DC power source to a load.
Abstract: A load drive apparatus is used in a vehicle direction indicating apparatus operable free from overcurrents and overvoltage. The load drive apparatus includes: a charging/recharging capacitor; a charging/recharging circuit for charging/recharging the capacitor at a preselected time constant in such a manner that a voltage across the capacitor is varied between a preset upper limit voltage and a preset lower limit voltage; a drive circuit for turning ON a power transistor series-connected to a current path employed to supply a current from a DC power source to a load, thereby driving the load when the charging/discharging circuit causes the capacitor to be charged, or the voltage across the capacitor is higher than, or equal to a predetermined voltage defined between the upper limit voltage and the lower limit voltage; overcurrent judging means for judging whether or not a voltage across terminals of the power transistor connected to the above-described current path exceed an overcurrent judging voltage.

Patent
16 Feb 1994
TL;DR: In this article, a dynamic RAM enhanced in integration and storage capacity, a method of setting a plate voltage of the dynamic RAM, and an information processing system reduced in size and enhanced in performance are provided.
Abstract: A dynamic RAM enhanced in integration and storage capacity, a method of setting a plate voltage of the dynamic RAM, and an information processing system reduced in size and enhanced in performance are provided. The plate voltage is set such that a leakage current of an information storage capacitor when a bit line voltage is positive relative to the plate voltage is made substantially equal to a leakage current of the capacitor when the bit line voltage is negative relative to the plate voltage. For this plate voltage setting, a plate voltage generating circuit is provided with an output voltage adjusting capability. A monitoring capacitor is formed on the same semiconductor wafer on which the information storage capacitor is formed. This monitoring capacitor is formed by a same method by which the information storage capacitor is formed, and is made of a same material of which the information storage capacitor is made. The monitoring capacitor is tested in a wafer probing process. Based on a measurement result, the plate voltage is set to an optimum level. The information processing system is constituted with the dynamic RAM as its memory device having the optimum plate voltage.

Patent
26 Jan 1994
TL;DR: In this paper, the ripple voltage or ripple current of the smoothing electrolytic capacitor is compared with a preset judgment level and the life of the capacitor is judged, and when a ripple current exceeds the life judgment level, a life detection signal is output.
Abstract: PURPOSE: To obtain a life detection apparatus in which the proper replacement timing of a smoothing electrolytic capacitor is displayed by a method wherein the ripple voltage or the ripple current, of the smoothing electrolytic capacitor, which is increased with a drop in an electrostatic capacity due to the degradation of the smoothing electrolytic capacitor is detected, the ripple voltage or the ripple current is compared with a preset judgment level and the life of the capacitor is judged. CONSTITUTION: The terminal voltage of a smoothing electrolytic capacitor 4 in a voltage-type inverter device 1 is detected by a voltage detector 6, and the terminal voltage is compared with a life judgment level in a voltage comparator 7. An output is generated only for a period during which the terminal voltage of the smoothing capacitor 4 is less than the life judgment level. In addition, a current which flows in the smoothing electrolytic capacitor 4 is detected by a Hall element 5, it is converted into a DC voltage by a voltage detector 6', and the DC voltage is compared with a life level in a voltage comparator 7'. When a ripple current exceeds the life judgment level, a life detection signal is output. The outputs of the voltage comparators 7, 7' are ANDed with a power-supply condition by respective AND circuits 8, 8', only a life signal is sent to a CPU, and the life of the smoothing electrolytic capacitor is displayed. COPYRIGHT: (C)1995,JPO

Patent
Jean-Paul Moncorge1
08 Jun 1994
TL;DR: In this paper, a device for supplying a power supply voltage to an electronic circuit associated with a current sensor for measuring the electrical current in a high-tension line is described.
Abstract: A device for supplying a power supply voltage to an electronic circuit, in particular to an electronic circuit associated with a current sensor for measuring the electrical current in a high-tension line, comprises a current transformer having a primary circuit and a secondary circuit, a rectifier bridge shunting the secondary circuit and output terminals of the rectifier bridge, a first capacitor in parallel with a first resistor across which said power supply voltage is obtained, and a first switch disposed between the output terminals of the rectifier bridge. It includes between the output terminals of the rectifier bridge a branch comprising in series a second capacitor, a second switch and a second resistor. The first switch is controlled by a first threshold detector shunting the second capacitor. The second switch is controlled by a second threshold detector shunting the first capacitor. The first and second threshold detectors respectively close the first and second switches when predetermined first and second thresholds are respectively reached.

Patent
Kazumasa Suzuki1
13 Sep 1994
TL;DR: In this paper, a gate oxide film and a gate 4 are formed below the power supply line 1 to sandwich the gate and the inversion layer, and the gate capacitance approximately corresponds to the area of master power supply wiring is interposed between the power source and the ground.
Abstract: Ground lines 2 are disposed so as to sandwich a power supply line 1. A gate oxide film 3 and a gate 4 are formed below the power supply line 1. An n-type area 8 is formed adjacent to the end of the gate oxide film to set the ground potential thereto. A p-type area 9 is formed at most of the remaining part below the ground line to make it contact the substrate. Since the potential of the gate equals that of the power source, an inversion layer is formed below the oxide film, where the ground potential results through the n-type area. By sandwiching the gate oxide film between the gate and the inversion layer, a capacitor is formed. The size of the capacitor is half in length as large as the width of the power supply wiring, and the width substantially equals the length of the power supply wiring, the parasitic resistance generated at the gate or inversion layer is suppressed small, and the gate capacitance approximately corresponding to the area of master power supply wiring is interposed between the power source and the ground. As a result, a large capacitance bypass capacitor can be formed between the power source and the ground, and a power supply wiring which is great in effect of eliminating power supply noise can be obtained.

Journal ArticleDOI
01 Mar 1994
TL;DR: AWEswit is a mixed signal simulator for switched capacitor circuits that models the clock feedthrough and signal-dependent charge dump that characterize MOSFET switches and naturally handles the bandwidth limitations associated with switched capacitors.
Abstract: This paper describes the modeling and simulation of switched capacitor circuits in AWEswit. AWEswit is a mixed signal simulator for switched capacitor circuits. It allows for portions of the circuit to be modeled with digital blocks controlled by an event queue. The remainder of the circuit is modeled in the analog domain. The paper describes the circuit formulations employed by AWEswit, and how they are exploited in modeling the nonidealities associated with switched capacitor circuits. AWEswit employs asymptotic waveform evaluation (AWE) as its core simulation engine. It combines circuit formulations in the charge-voltage and current-voltage regimes. This flexibility in the circuit formulations means that if the circuit is modeled entirely with ideal switches (i.e. no resistors), then it is automatically solved in the charge-voltage regime (like SWITCAP2). However, if portions of the circuit need to be solved in the current-voltage regime, then AWEswit automatically partitions the circuit and solves the different partitions in whichever regime is appropriate, i.e., in the current-voltage regime (using AWE to evaluate circuit response) or in the charge-voltage regime. AWEswit naturally handles the bandwidth limitations associated with switched capacitor circuits. In addition, it models the clock feedthrough and signal-dependent charge dump that characterize MOSFET switches. The simulator is illustrated by example. >