scispace - formally typeset
Search or ask a question

Showing papers on "Decoupling capacitor published in 1995"


Journal ArticleDOI
TL;DR: In this article, a decoupling strategy for multilayer boards must account for the low inductance and relatively high capacitance of the power bus, which is not appropriate for one-sided or two-sided printed circuit boards.
Abstract: Guidelines for the selection and placement of decoupling capacitors that work well for one-sided or two-sided printed circuit boards are not appropriate for multilayer boards with power and ground planes. Boards without internal planes take advantage of the power bus inductance to help decouple components at the higher frequencies. An effective decoupling strategy for multilayer boards must account for the low inductance and relatively high capacitance of the power bus. >

200 citations


Proceedings ArticleDOI
18 Jun 1995
TL;DR: In this article, the output voltage control is structured around an inner filter capacitor current loop where capacitor current is sensed via a single, small current transformer, which avoids the expense of multiple, active current sensors.
Abstract: This paper presents a state space approach to the problem of controlling a single phase PWM inverter with an LC output filter. These types of inverter are often used in uninterruptable power supplies (UPS) where a sine wave output voltage is to be maintained. Output voltage control is structured around an inner filter capacitor current loop where capacitor current is sensed via a single, small current transformer. This avoids the expense of multiple, active current sensors found in alternative designs. Performance of the capacitor current loop is enhanced with active decoupling of both the DC bus and the equivalent "back-EMF" of the output voltage. The output dynamic stiffness of the system is analyzed and plotted. Experimental results yield less than 0.5% total harmonic distortion (THD) at full load (8 kW), with transient response times of less than 200 /spl mu/s. >

130 citations


Patent
02 Jun 1995
TL;DR: In this article, a high frequency bypass capacitor (36, 36') is built into a thin-film portion (16, 16') of a polymer carrier substrate (15) of a PBGA.
Abstract: A high frequency bypass capacitor (36, 36') is built into a thin-film portion (16, 16') of a polymer carrier substrate (15) of a PBGA (10). The carrier substrate (15) has both a stiffener (18) and a thin-film portion (16, 16') which has multiple metal layers (24, 28, 30, 32). The power supply planes (28, 30) of these metal layers are used to form built-in bypass capacitors (36, 36'), wherein the power supply planes are specifically designed to be adjacent and parallel layers. An ultra thin film laminate construction provides thin dielectric films (26) between the metal layers to allow the bypass capacitor to be placed very dose to the attached semiconductor die (12) to further reduce parasitic inductance and resistance between die connections (14) and the bypass capacitor. The built-in feature minimizes inherent parasitic series inductance and resistance, thus enabling the filtering of unwanted low pulse width glitches on a power plane connected to VLSI devices at operating frequencies at or above 100 MHz.

101 citations


Patent
Pak K. Leung1, Ismail T. Emesh1
24 Nov 1995
TL;DR: In this article, a capacitor structure and method of forming a capacitance structure for an integrated circuit is provided, comprising a first electrode, capacitor dielectric and top electrode, formed on a passivation layer overlying the interconnect metallization.
Abstract: A capacitor structure and method of forming a capacitor structure for an integrated circuit is provided. The capacitor structure, comprising a first electrode, capacitor dielectric and top electrode, is formed on a passivation layer overlying the interconnect metallization. The capacitor electrodes are interconnected to the underlying integrated circuit from underneath, through conductive vias, to the underlying interconnect metallization. The method provides for adding capacitors to an otherwise completed and passivated integrated circuit. The structure is particularly applicable for ferroelectric capacitors. The passivation layer acts as a barrier layer for a ferroelectric dielectric. Large area on-chip capacitors may be added without affecting the interconnect routing or packing density of the underlying devices, and may be added almost independently of the process technology used in the formation of the underlying integrated circuit.

90 citations


Patent
Masataka Ohba1, Yoshio Sano1
26 Sep 1995
TL;DR: In this article, the authors describe the plasma display driver circuit, which includes a panel inter-electrode capacitor, a charging/discharging circuit, and a voltage clamp circuit.
Abstract: The plasma display panel driver circuit disclosed includes a panel inter-electrode capacitor, a charging/discharging circuit, and a voltage clamp circuit. The panel inter-electrode capacitor is provided between scanning and sustain electrodes of a panel. The charging/discharging circuit is connected in parallel with the panel inter-electrode capacitor and formed by a combination of a coil, FET switches and reverse current blocking diodes. The voltage clamp circuit includes four switches connected to terminals of the panel inter-electrode capacitor. The panel inter-electrode capacitor, together with a series circuit of the coil and the FET switches, forms a parallel resonance circuit. The panel inter-electrode capacitor 40 is repeatedly charged and discharged through the control of the switches with switch drive inputs. In the driving of a plasma display panel, ineffective power is reduced when charging and discharging the panel inter-electrode capacitor.

89 citations


Patent
22 Aug 1995
TL;DR: In this paper, a capacitor type acceleration sensor is described, where two variable capacitors are constructed with a couple of fixed electrodes and a movable electrode located between the fixed electrodes.
Abstract: A capacitor type acceleration sensor is disclosed. In this sensor, an acceleration sensing element 1 has two variable capacitors C1 and C2 that are constructed with a couple of fixed electrodes and a movable electrode located between the fixed electrodes. Electrostatic power generation/feedback means 15 applies to the fixed- and movable-electrode pairs such an electrostatic power as to set the movable electrode at a preset reference position in accordance with the output signal of capacitance-difference detector means 10. The electrostatic power is outputted as an output signal of the capacitor type acceleration sensor. In the capacitor type acceleration sensor, another fixed capacitor Cx of which the capacitance value Cx is larger than the maximum capacitance-difference between the variable capacitors C1 and C2 of which the capacitance values vary in accordance with an acceleration, is connected in parallel with the variable capacitor C2. The capacitance (C2+Cx) is larger than the capacitance of the variable capacitor C1, irrespective of the direction of acceleration.

79 citations


Patent
Shyuichi Tsukada1
07 Jun 1995
TL;DR: In this paper, a boost output voltage is derived through the third and fourth transistors, and the arrangement enables to maintain the gate potential of these transistors above a predetermined level, thereby preventing the lowering of current driving capability of the transistors and the lower of current supplying capability for a boost potential.
Abstract: A boost voltage generating circuit includes a boost voltage producing circuit having a first and a second capacitor receiving a first and a second control signal, respectively, a third smoothing capacitor connected at an output terminal, and a first, a second, a third, and a fourth transistor. A boost output voltage is derived through the third and fourth transistors. The boost voltage producing circuit further includes a fourth capacitor connected between the first capacitor and the gate of the third transistor; a fifth capacitor connected between the second capacitor and the gate of the fourth transistor; a fifth transistor having one of a source and a drain connected to the first capacitor with the other thereof connected to the gate of the third transistor and a gate connected to the second capacitor; and a sixth transistor having one of a source and a drain connected to the second capacitor with the other thereof connected to the gate of the fourth transistor and a gate connected to the first capacitor. The arrangement enables to maintain the gate potential of the third and fourth transistors above a predetermined level, thereby preventing the lowering of current driving capability of these transistors and the lowering of current supplying capability for a boost potential.

63 citations


Proceedings ArticleDOI
29 Oct 1995
TL;DR: In this paper, a new power supply which suppresses harmonic currents is proposed, made up by inserting a choke coil and a transformer winding between the bridge rectifier and the input capacitor of an ordinary capacitor input-type power supply.
Abstract: A new power supply which suppresses harmonic currents is proposed. The circuit is made up by inserting a choke coil and a transformer winding between the bridge rectifier and the input capacitor of an ordinary capacitor input-type power supply. The characteristics of the circuit use the transformer winding like a switch (a magnetic switch), and has a function to improve the power factor and to suppress harmonic currents. As this MS power supply has only one switch (MOSFET) and one control circuit, the whole circuit is simple, inexpensive, and meets IEC 1000-3-2 Class D standards concerning the harmonic currents of switching power supplies.

59 citations


Patent
John G. Keimel1
21 Jul 1995
TL;DR: In this article, a power supply arrangement for a battery-powered device includes a high energy density capacitor which is selectively coupled to the device's battery, and the output voltage of the high-energy density capacitor is monitored, and if it falls below a predetermined minimum threshold level, the first circuit's power supply input terminal and the capacitor are temporarily re-coupled to the battery, so that sufficient operational power to the second circuit is ensured.
Abstract: A power supply arrangement for a battery-powered device includes a high energy density capacitor which is selectively coupled to the device's battery. In one embodiment, the device includes a first circuit which requires a continuous operational power supply voltage to be applied to its power supply input, and further includes a second circuit periodically operates in a peak phase in which it places a high demand upon the device's battery. During normal operation of the device, the first circuit's power supply input and the high energy density capacitor are coupled to the battery so that operational power for the first circuit is provided directly from the battery, and the high energy density capacitor is charged by said battery. During the peak operational phases of the second circuit, the first circuit and high energy density capacitor are decoupled from the battery, such that operational power for the first circuit is provided from the capacitor, while operational power for the second circuit is provided from the battery. During the peak phases, the output voltage of the high-energy density capacitor is monitored, and if it falls below predetermined minimum threshold level, the first circuit's power supply input terminal and the capacitor are temporarily re-coupled to the battery, so that sufficient operational power to the first circuit is ensured.

59 citations


Proceedings ArticleDOI
18 Jun 1995
TL;DR: In this paper, an active power filter (APF) circuit is proposed to control the voltage of an energy storage capacitor, which employs an integration and sampling technique to simplify the calculation algorithm for the real fundamental component of load current.
Abstract: This paper presents an APF (active power filter) circuit which employs a new control method, using an integration and sampling technique, to simplify the calculation algorithm for the real fundamental component of load current. In addition, a new simple control scheme, based on the energy balance concept, is proposed to control the voltage of energy storage capacitor. Since the energy change in the energy storage capacitor can be compensated in the next cycle and larger DC bus voltage ripple can be tolerated by using the sampling technique, a relatively smaller energy storage capacitor is required. The advantages of this APF circuit are simplicity of control circuits, low cost (a smaller energy storage capacitor) and good transient response. In theory, the time delay for the compensation of reactive power and harmonic currents is zero. The feasibility of this theory is verified by using a PSPICE simulation and experimental results. >

59 citations


Patent
12 Jan 1995
TL;DR: An uninterruptible power supply as discussed by the authors includes first and second inputs for receiving AC and DC power respectively, first-and second switching circuits, an auxiliary power supply, a transformer, a selection circuit, an A to DC converter and a hold-up capacitor.
Abstract: An uninterruptible power supply includes first and second inputs for receiving AC and DC power respectively, first and second switching circuits, an auxiliary power supply, a transformer, a selection circuit, an A to DC converter and a hold-up capacitor. The hold-up capacitor can provide energy storage for both AC and DC operation.

Proceedings ArticleDOI
H. Chen1, S.E. Schuster1
31 May 1995
TL;DR: In this paper, the authors describe the on-chip power bus modeling and switching noise analysis for high performance circuit design, and the methodology to optimize the placement of onchip decoupling capacitors.
Abstract: This paper describes the on-chip power bus modeling and switching noise analysis for high performance circuit design, and the methodology to optimize the placement of on-chip decoupling capacitors The switching noise is analyzed at both the package level and the chip level An equivalent circuit which consists of time-varying resistors, loading capacitors, and decoupling capacitors, is used to simulate the switching activities of functional blocks Both the resistive and inductive voltage drops on the power bus are modelled to identify the hot spots on the chip and /spl Delta/V across the chip Based on the noise analysis results, a decoupling capacitor insertion algorithm is proposed to determine the amount of decoupling capacitance needed to keep the power supply voltage within specification, and optimize the final size and location of on-chip decoupling capacitors

Patent
Satoshi Tatsumi1
21 Feb 1995
TL;DR: In this paper, a switched capacitor amplifier circuit of an offset cancellation type is proposed, where a capacitor is arranged between a reverse input terminal of an operational transconductance amplifier and a reference voltage.
Abstract: In a switched capacitor amplifier circuit of an offset cancellation type, a capacitor is arranged between a reverse input terminal of an operational-transconductance amplifier and a reference voltage. Only in an offset cancelling operation in which a first group of switches are on, the capacitor functions as a load of the amplifier. The capacitor hence does not exert any influence upon transfer of charge. With provision of the circuit, the phenomenon of oscillation is suppressed in the operation to cancel the offset voltage.

Patent
03 Apr 1995
TL;DR: In this article, a system comprising a portable apparatus and employing a method of admittance versus frequency analysis to detect the existence of a fault in a de-energized electrical line regardless of whether the line contains branches is presented.
Abstract: A system comprising a portable apparatus and employing a method of admittance versus frequency analysis to detect the existence of a fault in a de-energized electrical line regardless of whether the line contains branches. The portable apparatus comprises a capacitor unit detachably connected to a de-energized line, ground or a neutral conductor, a switch unit detachably connected to a de-energized line, the de-energized line being tested, and an insulated cable connecting the capacitor unit to the switch unit. The switch unit comprises a discharge switch that can be activated by pulling on the hot line tool. The capacitor unit comprises a capacitor which is discharged into the electrical line via the insulated cable and the switch unit when the discharge switch is activated to create a pulse. The capacitor unit comprises circuitry for generating voltage and current samples of pulse response signals and a microprocessor for determining the admittance of the electrical line using Fast Fourier transforms of the current and voltage samples. The admittance of the line is compared with stored data relating to lines having different load impedances and having faults located at various distances from the capacitor unit and detectable at various frequencies to determine the existence of a fault.

Journal ArticleDOI
TL;DR: A new method to achieve a maximum torque for a single-phase induction motor using an AC adjustable capacitor using an electronic switch in parallel with a capacitor is proposed.
Abstract: This paper presents a new method to achieve a maximum torque for a single-phase induction motor. An AC adjustable capacitor using an electronic switch in parallel with a capacitor is proposed. The capacitor is short-circuited in a different period by an electronic switch during each cycle to vary the effective value of the AC capacitor. Two new optimization algorithms, which obtain a maximum starting torque by adjusting the effective capacitor, are proposed. No starting capacitor or centrifugal switch is used here. A theoretical analysis, and simulated and experimental results are presented in this paper. >

Patent
28 Dec 1995
TL;DR: In this article, the authors proposed a smoothing means to reduce the inductance value of a resonance means by reducing the voltage of a rectification power through a DC/DC converter to feed it to the resonance means.
Abstract: PROBLEM TO BE SOLVED: To reduce favorably the inductance value of a resonance means, by reducing the voltage of a rectification power through a DC/DC converter to feed it to the resonance means. SOLUTION: When feeding, e.g. a commercial power with signal-phase AC 100V from a commercial power supply 6 to a non-contract type electric power transmission device 1, rectifying this power by a rectification means comprising a diode D1 and a capacitor C1 to reduce its voltage to a predetermined one by a DC/DC converter 3, the reduced voltage is smoothed by a smoothing means comprising a capacitor C2 to be fed both to a resonance means comprising an inductor L1 and a capacitor C3 and to an oscillator 4. Thereby, from the oscillator 4, a pulse signal with a predetermined frequency is fed to the gate of a field effect transistor FET1 to switch on/off the FET1 at the predetermined frequency. Therefore, since the loss of the FET1 by switching is reduced, the switching frequency can be made high enough. As a result, the inductance value of the inductor L1 can be enough reduced. COPYRIGHT: (C)1997,JPO

Patent
06 Dec 1995
TL;DR: In this article, the column-shaped openings are made into conductive columnar elements (66,68,66',68'), which are then made into conducting element pads (68,72,70,72',72') at the surface of the IC passivation layer.
Abstract: Switching noise at integrated circuit V DD and V SS metal traces is reduced by minimizing lead inductance in on-chip bypass capacitors (74,74'). For each on-chip bypass capacitor, a pair of V DD -carrying and V SS -carrying metal traces (20',20",22',22") is formed, these traces having regions spaced-apart laterally a distance ΔX corresponding to lateral separation of the bypass capacitor connecting pads. For each bypass capacitor, column-shaped openings, spaced-apart distance ΔX, are formed through the passivation and inter-metal oxide layers, as needed. These openings expose and access regions of the pair of spaced-apart metal traces carrying V SS and V DD . These openings, which may be formed after the IC has been fabricated, preferably are formed using focussed ion beam technology ("FIB"). Alternatively, these openings may be formed using masking and etching steps. The column-shaped openings are then made into conductive columnar elements (66,68,66',68'), preferably using FIB deposition of tungsten or platinum. Conductive element pads (70,72,70',72') are formed atop the conductive columnar elements at the outer surface of the IC passivation layer. The bypass capacitors are then attached to the IC (12), and the capacitor connecting pads are electrically connected to the respective conductive element pads using conductive epoxy or other conductive bond material. This direct attachment of the on-chip bypass capacitors reduces effective capacitance lead inductance and improves attenuation of on-chip switching noise.

Patent
07 Jun 1995
TL;DR: An apparatus and method for measuring the variation in the capacitance of a capacitive sensor is described in this paper, which includes means for constantly applying a constant electrically current to an electrode of the capacitor and means for generating a first series of timing pulses.
Abstract: An apparatus and method for measuring the variation in the capacitance of a capacitive sensor The apparatus and method include means for constantly applying a constant electrically current to an electrode of the capacitor and means for generating a first series of timing pulses The voltage on the capacitor is compared to a reference voltage and an electrical signal is generated when the voltage on the capacitor reaches a first voltage which exceeds the reference voltage The first series of timing pulses emitted by the generating means from the time that the charging of the capacitor beings until the electrical signal is generated is counted and an output signal is generated corresponding to the number of timing pulses counted An application of the sensor to the measurement of the change in length of a telescoping device such as a shock absorber is also disclosed

Patent
Hiroyuki Okada1
28 Nov 1995
TL;DR: In this paper, the first and second driving signals (S2, S3) opposite in phase are applied to a sensor capacitor and a reference capacitor, respectively, which are both connected to a switched capacitor circuit.
Abstract: In a capacitive sensor system, first and second driving signals (S2, S3) opposite in phase are applied to a sensor capacitor (3-1) and a reference capacitor (3-2), respectively, which are both connected to a switched capacitor circuit (4). An output signal of the switched capacitor is sampled by two sample-and-hold circuits (7-1, 7-2) which are operated in different phases of the driving signals. A differential amplifier (8) generates a sensor signal in response to the difference in potential between the outputs of the sample-and-hold circuits.

Patent
Quat Vu1, Donald S. Gardner1
15 Aug 1995
TL;DR: In this paper, an on-chip decoupling capacitor is described, which is fabricated using an embedded conductive layered structure and an etch is performed to form a via through the first, second and third insulative layers and the first and second conductive layers.
Abstract: An on-chip decoupling capacitor is disclosed. The capacitor of the present invention is fabricated using an embedded conductive layered structure. A first insulative layer, a first conductive layer, a second insulative layer, a second conductive layer, and a third insulative layer are deposited sequentially on a substrate having electronic circuitry. Next, a patterning layer is formed to provide for vias for interconnection between metal layers above and below the capacitor plates. An etch is then performed to form a via through the first, second and third insulative layers and the first and second conductive layers. Next, a fourth insulative layer is deposited and anisotropically etched to form sidewall insulators on the vias. Finally, interconnection between lower level metal levels and upper level metal levels is made through the vias. Additionally, methods of coupling the upper and lower capacitor plates to either power or ground are described.

Proceedings ArticleDOI
22 Mar 1995
TL;DR: In this paper, a new method for characterization of matching of capacitors using the so-called floating gate capacitance measurement method was discussed, and modifications were implemented to improve the measurement accuracy and repeatability from its original thousands of ppms (0.1 to 0.3%) to values down to 50 ppm.
Abstract: This paper discusses a new method for characterization of matching of capacitors using the so-called floating gate capacitance measurement method. The paper explains this (DC!!) measurement method and then discusses modifications that were implemented to improve the measurement accuracy and repeatability from its original thousands of ppms (0.1 to 0.3%) to values down to 50 ppm. This improved accuracy is necessary for correct characterization of capacitor matching. The method is demonstrated with results from double-polysilicon capacitor matching measurements.

Patent
19 Jun 1995
TL;DR: In this paper, a two-way communications between reader and tags using alternating magnetic fields established by the reader and tag is presented. But the authors do not specify a tuning procedure.
Abstract: The electronic identification system provides two-way communications between reader and tags using alternating magnetic fields established by the reader and tag. Communication is accomplished by utilizing either a one-step or a two-step modulation process in which the information to be communicated either modulates an alternating magnetic field directly or modulates a periodic signal which modulates an alternating magnetic field. The coil in the reader that is used to establish an alternating magnetic field is transformer-coupled through capacitors to a push-pull driving circuit consisting of four field-effect transistors connected in a bridge arrangement. The coil, capacitors, and coupling circuitry are maintained in a tuned condition by continually adjusting either the driving frequency, the coil inductance, or the capacitor capacitance during communications. A tag utilizes a coil to couple with the reader's alternating magnetic field and a capacitor to resonate the coil, thereby extracting power from the field more efficiently. Transformer coupling of the coil and capacitor is utilized for improved impedance matching. The coil, capacitor, and coupling circuitry can be maintained in a tuned condition by continually adjusting either the coil inductance, or the capacitor capacitance during communications. Certain configurations of the system may require that tuning maintenance be discontinued during the transmission of data.

Patent
13 Jul 1995
TL;DR: In this paper, a step-up DC/DC voltage convertor is coupled to a stepdown voltage converter via a capacitor, which stores energy and maintains power flow to an output load circuit during a brief interruption of power supplied to the input of the stepup converter.
Abstract: A step-up DC/DC voltage convertor is coupled to a step-down DC/DC voltage convertor via a capacitor, which stores energy and maintains power flow to an output load circuit during a brief interruption of power supplied to the input of the step-up convertor A diode connected to the capacitor prevents energy stored within the capacitor to be fed back to the step-up voltage convertor during the power interruption

Journal ArticleDOI
TL;DR: In this article, the authors presented an application of a fuzzy logic control scheme for switched series capacitor modules to enhance the overall stability of electric power systems, through the signal conditioning of the measured real power flow at the location of the series capacitors, the phase/speed state of the electric power system was obtained to determine the number of capacitors energized at the state.
Abstract: This paper presents an application of a fuzzy logic control scheme for switched series capacitor modules to enhance the overall stability of electric power systems. Through the signal conditioning of the measured real power flow at the location of the series capacitor modules, the phase/speed state of the electric power system is obtained to determine the number of capacitors energized at the state. The switching rules are quite simple so as not to give heavy computation to the microcomputer utilized for the real-time switching control of the series capacitor modules. A multimachine power system is used to demonstrate the efficiency of the proposed switching control scheme, and coordination with power system stabilizers is considered. >

Patent
29 Nov 1995
TL;DR: In this paper, the authors proposed a circuit for minimizing electrostatic forces in capacitance-based sensor circuits, where a movable mass (10) forms the center electrode of two differential capacitors, a sensing differential capacitor (24) and an actuator differential capacitor (52), and the other two electrodes (18, 20, 46, 48) of each differential capacitor are fixed.
Abstract: A circuit for minimizing electrostatic forces in capacitance-based sensor circuits. A sensor includes a movable mass (10) that forms the center electrode of two differential capacitors, a sensing differential capacitor (24) and an actuator differential capacitor (52). The other two electrodes (18, 20, 46, 48) of each differential capacitor are fixed. Oppositely phased high-frequency carrier signals are applied to the fixed electrodes of the sensing capacitor and biasing signals are applied to the fixed electrodes of the actuator capacitor (52). When a force is applied to the sensor, the capacitance of the sensing capacitor changes and the carrier signal, with its amplitude and phase modulated in accordance with the magnitude and direction of the force, appears on the movable mass (10). The signal on the mass (10) is fed back to the fixed electrodes of the sensing capacitor to minimize electrostatic forces between the electrodes of the sensing capacitor. Using a separate negative feedback loop, a signal is fed back to the mass to generate electrostatic forces between the mass and the fixed electrodes of the actuator capacitor to restore the mass (10) to its original position.

Patent
25 Aug 1995
TL;DR: In this paper, a power switch detection system for a power supply including an operator-accessible power switch coupled to the secondary ground of the power supply and to one side of an isolation capacitor is presented.
Abstract: A power switch detection system for a power supply including an operator-accessible power switch coupled to the secondary ground of the power supply and to one side of an isolation capacitor. The other side of the isolation capacitor is coupled to a switch detection circuit referenced to primary ground for detecting the state of the power switch through the isolation capacitor. The switch detection circuit controls a control circuit on the primary side based on the state of the power switch, where the control circuit correspondingly controls the power state of the power supply and a corresponding electronic device. In this manner, the power switch remains isolated by the isolation capacitor but controls the power state of the device. The control circuit controls conversion of AC power from an AC source coupled to the primary side through a transformer. Although the primary and secondary grounds are isolated from each other, a reference ground of the AC source and the secondary ground are coupled together, typically through a conductive chassis of the electronic device. This electrically conductive connection establishes a high impedance, low current path between the AC source and the isolation capacitor when the power switch is closed. A low frequency current signal from the AC source charges the isolation capacitor when the power switch is closed, which is detected by the switch detection circuit.

Patent
02 Aug 1995
TL;DR: In this paper, a voltage multiplier and capacitive isolation power supply using capacitors, diodes and first and second clock signals that are out-of-phase with respect to each other.
Abstract: A voltage multiplier and capacitive isolation power supply using capacitors, diodes and first and second clock signals that are out-of-phase with respect to each other. When the first clock signal is high and the second clock signal is low, a capacitor in a first stage transfers charge to a capacitor in a second stage. When the first clock signal is low and the second clock signal is high, the capacitor in the second stage transfers charge to an output capacitor, and the capacitor in the first stage is recharged via a feedback diode between a capacitor connected to a ground potential and the capacitor in the first stage. Additionally, the capacitors in each of the stages provide an isolation function for the power supply.

Patent
26 May 1995
TL;DR: In this article, the authors proposed a method to stabilize the output of laser light by reducing the wear of the pre-ionization electrodes and preventing drop in output of the laser light.
Abstract: A first object is to stabilize output of laser light. In order to achieve the first object, if it is detected by an output detection means (15) that the output (E) of laser light (La) has departed from a target value, whilst maintaining the voltage of a power source (17) at a fixed value or in a fixed range, the amount of laser gas supplied to a laser chamber (4) is controlled such that the output (E) of laser light becomes the target value. A second object is to reduce the wear of the pre-ionization electrodes and to prevent drop in output of laser light. The second object is achieved as follows. Specifically, the pulse current discharged from primary capacitor (C1) is stepped up in voltage by a pulse transformer and is charged onto a secondary capacitor (C2). At this point a magnetic switch (SR) that is connected to the downstream side of secondary capacitor (C2) becomes saturated and becomes conductive, allowing current to pass through pre-ionization electrodes (6) that are connected in series with the magnetic switch (SR). At the time-point where the movement of charge of secondary capacitor (C2) has finished, a discharge current in the reverse direction tries to flow in secondary capacitor (C2) but magnetic switch (SR) acts to block the reverse current, stopping the pre-ionization discharge. Concurrently with this the core of pulse transformer (20) is saturated, with the result that charge starts to move from secondary capacitor (C2) to peaking capacitor (C4). The voltage of peaking capacitor (C4) therefore rises until it reaches the discharge initiation voltage, and laser oscillation is performed.

Patent
Kunihiko Tanaka1, Kaoru Hatanaka1
07 Jun 1995
TL;DR: In this article, a field effect transistor (FE transistor) was used to limit a charging current to a power smoothing capacitor, and a rush current suppressive starting circuit was provided in a stage anterior to the FET.
Abstract: A field-effect transistor incorporates a diode which is disposed between a battery power source and an inverter. A rush-current suppressive starting circuit is provided in a stage anterior to the field-effect transistor. The transistor is shifted to its conducting state while the on-resistance of the transistor is gradually lowered to thereby limit a charging current to a power smoothing capacitor. In an off-state of a main switch, a charge stored in the current smoothing capacitor is released therefrom via a stabilized power circuit and a controller which is a power load to the circuit.

Patent
30 Oct 1995
TL;DR: In this article, a multi-channel single-stage high power factor AC to DC converter comprising a pair of input terminals for connecting to an a.c. supply voltage, a bridge rectifier connected across the input terminal, and a D.C. output voltage thereacross.
Abstract: A multi-channel single stage high power factor AC to DC converter comprising a pair of input terminals for connecting to an a.c. supply voltage, a bridge rectifier connected across the input terminal, for converting the a.c. supply voltage to a d.c. voltage, and a D.C. to D.C. converter connected to the bridge rectifier and including a high frequency switch for converting the d.c. voltage to high frequency intermittent pulses, a transformer having a primary winding connected to the high frequency switch and having at least two secondary windings each connected to a respective rectifier for producing a d.c. output voltage thereacross. A pair of capacitors are connected in the input of the DC to DC converter so that when the switch is OPEN a first one of the capacitors receives energy from the a.c. supply and a second one of the capacitors receives energy from the transformer, whilst when the switch is CLOSED the first capacitor restores energy to the transformer and the second capacitor restores charge to the a.c. supply. Such a configuration avoids the need to split the energy transfer capacitor between the input and output of the DC to DC converter and thus avoids duplication of part of the energy transfer capacitor in each output channel when multiple outputs are provided.