Showing papers on "Decoupling capacitor published in 1999"

Power distribution system design methodology and capacitor selection for modern CMOS technology

Abstract: Power systems for modern complementary metal-oxide-semiconductor (CMOS) technology are becoming harder to design. One design methodology is to identify a target impedance to be met across a broad frequency range and specify components to meet that impedance. The impedance versus frequency profiles of the power distribution system components including the voltage regulator module, bulk decoupling capacitors and high frequency ceramic capacitors are defined and reduced to simulation program with integrated circuit emphasis (SPICE) models. A sufficient number of capacitors are placed in parallel to meet the target impedance. Ceramic capacitor equivalent series resistance (ESR) and ESL are extremely important parameters in determining how many capacitors are required. SPICE models are then analyzed in the time domain to find the response to load transients.

Buck and boost switched capacitor gain stage with optional shared rest state

Abstract: A structure and process are provided for converting DC-DC voltages, which allows both buck and boost conversion utilizing a single switched capacitor array. In one embodiment of this invention, the switched capacitor array comprises multiple gain blocks, where the gain blocks are identical and stacked upon each other. The switches and capacitors are configured so that various combinations of series and parallel capacitor connections are possible, and thus both buck and boost conversions are attainable with one switched capacitor array. Other embodiments of the present invention use multiple gain blocks, configured such that the capacitor in each gain block can be connected to ground. As a result, a single charge state for a range of desired gains can be configured for use with a shared or common rest state, i.e., a capacitor configuration which is the same regardless of the desired gain. In the charge state, selected capacitors are configured in series for the desired gain setting, while in the shared rest state, all the capacitors are configured in parallel from the output to the input. Because a shared rest state is used, the correct charge is always transferred at the desired gain with a single switched capacitor array.

Rfid tag having parallel resonant circuit for magnetically decoupling tag from its environment

Abstract: An RFID tag circuit provides magnetic decoupling and amplitude modulation. The circuit is made up of a first inductor and a second inductor connected in series, a first capacitor, a second capacitor, and a switch. The circuit includes a first resonant circuit formed from a parallel connection of the series connected first and second inductors, and the first capacitor. The first resonant circuit has a primary resonant frequency. The circuit also includes a second circuit formed from a series connection of the second capacitor and the switch. The series connection of the second capacitor and the switch are connected in parallel to the second inductor. One end of the series connected second capacitor and switch is connected to the common connection between the series connected first and second inductors.

System and method for determining output current and converter employing the same

Abstract: A system and method for determining an output current of a power converter having an output capacitor and a component coupled thereto. In one embodiment, the system includes (1) an observer circuit, parallel-coupled to the output capacitor, that senses a voltage across the output capacitor and develops therefrom a capacitor signal representing a current through the output capacitor, (2) a sensor circuit, coupled to the component, that senses a characteristic of the component and develops therefrom a component signal representing a current through the component and (3) a summer circuit, coupled to the observer and sensor circuits, that derives an output signal representing the output current from the capacitor signal and the component signal.

Method and apparatus for low power regulated output in battery powered electrotherapy devices

Abstract: This invention is a device for controlling the discharge of a battery (B1) supplying an intermittent load, such as a nerve stimulation device. The device includes a controller (15) which operates a switched inductor (L1) to feed a capacitor (C1) with numerous small pulses from the battery, thereby building up the charge, voltage on the capacitor, and occasionally discharging the capacitor to a load. The capacitor discharge is at a current higher than that of the small pulses from the battery, so the battery is drained at small instantaneous discharge rates compared to the high instantaneous discharge current from the capacitor.

Control system for a PWM-based STATCOM

Abstract: The ever-increasing switching frequency of modern solid-state power switches, together with the application of multi-converter topologies, make it possible to use pulse width modulation (PWM) in high power applications of STATCOMs (static synchronous compensators). This paper proposes and details a control system for a PWM-based STATCOM. First of all, a discrete-time model of the STATCOM is derived to take into account the discrete-time implementation of the controller. Secondly, the control algorithm is detailed. It ensures decoupled control of the real and reactive power exchanged between the power converter and the electric-energy system. This is necessary to control the DC capacitor voltage during transients of the exchanged reactive power. Finally, the control of the capacitor voltage is explained in detail. The controller is tailored to keep the capacitor voltage almost constant in spite of the fast control of the reactive power. This helps to reduce the capacitor size significantly. The main contributions are illustrated using a 15 kVA laboratory prototype.

Investigation on the clamping voltage self-balancing of the three-level capacitor clamping inverter

Abstract: This paper deals with the self-balancing quality of the clamping voltage in the three-level capacitor clamping inverter due to the spontaneous clamping capacitor current control loop in the circuit. Self-balancing quality of the three-level capacitor clamping inverter under sub-harmonic PWM modulation is analyzed in detail. The self-balancing mechanism in the multilevel capacitor clamping inverter (M>3) under sub-harmonic PWM modulation is also discussed. Test results regarding the self-balancing quality from a half-bridge three-level capacitor clamping inverter prototype under sub-harmonic PWM modulation is given.

Single shot transient suppressor (SSTS) for high current high slew rate microprocessor

Abstract: Future generation microprocessors are predicted to exhibit heavier loads and faster transients. Conventional voltage regulator modules (VRM) need a large amount of output filter capacitors to meet future requirements and a huge number of decoupling capacitors, mainly due to the presence of parasitic inductance between the VRM and the microprocessor. In this paper, a new active damp concept is presented. By charging some auxiliary capacitors at higher voltage, it is possible to store the amount of charge required by the processor during the step up transient; this extra charge can be locally delivered to the processor in a single shot manner, bypassing the slower VRM. In the same way, this circuit can sink the excess of charge that has to be removed during the step down transient. By using this transient suppressor circuit, a conventional VRM can still provide adequate steady state regulation, while the size of decoupling and filter capacitors can be significantly reduced. Experimental results prove the validity of the concept.

Fixed frequency regulation circuit employing a voltage variable dielectric capacitor

Abstract: Frequency regulating apparatus comprising a high power, voltage variable dielectric varactor or capacitor (or ferroelectric voltage variable dielectric capacitor) for use as a control element in the regulation circuit that actively tunes a resonant network to modulate power delivered to a load. The voltage variable dielectric capacitor comprises a substrate having a bottom electrode 33 formed thereon. A dielectric material is disposed on the substrate is a crystallized ceramic material that preferably comprises a barium, strontium, and titanium mixture. A top electrode is disposed on top of the crystallized ceramic material. Methods of fabricating the voltage variable dielectric varactor (capacitor) are also disclosed.

Buried patterned conductor planes for semiconductor-on-insulator integrated circuit

Abstract: A semiconductor-on-insulator integrated circuit with buried patterned layers as electrical conductors for discrete device functions, thermal conductors, and/or decoupling capacitors.

Voltage measuring instrument with flying capacitor

Abstract: A voltage measuring device comprises a capacitor that can be divided into two elements of equal capacitance at a connection point; a first switch through which a power source to be measured is connected across the capacitor, a differential amplifier; a second switch through which the terminals of the capacitor are connected to the inputs of the differential amplifier; and a third switch for connecting the connection point of the capacitor to a signal reference potential of the differential amplifier synchronously with the second switch.

Method and apparatus for starting an engine using capacitor supplied voltage

Abstract: A method and apparatus for starting an internal combustion engine using energy stored in a capacitor. The method and apparatus includes at least one battery for providing energy at a low voltage, an inverter for receiving the energy at the low voltage and producing energy at a high voltage, a capacitor for receiving and storing the energy at the high voltage, means for removing the low voltage source from the inverter, and at least one starter motor adapted to receive the energy at the high voltage from the capacitor and responsively start the engine.

Testing method for a substrate of active matrix display panel

Abstract: In the substrate test method of, a first test circuit is connected to an array substrate, and a signal for turning on all the thin film transistors arranged on the array substrate is supplied to a scanning line driving circuit Also, a predetermined voltage is applied to a signal line driving circuit through signal lines so as to supply a predetermined voltage to a storage capacitor electrode Under this condition, a high voltage sufficient for forming a potential difference higher than that in the stage of forming a storage capacitor is applied to the storage capacitor line

Flip-chip having an on-chip decoupling capacitor

Abstract: A flip-chip having a decoupling capacitor electrically coupled to the backside thereof The flip-chip includes a semiconductor substrate having first and second opposing surfaces with circuit elements formed within the first surface A plurality of raised bump contacts are located on the first surface and connected to the circuit elements A plurality of electrical interconnects are also located on or within the second surface and connected to the circuit elements The electrodes of a decoupling capacitor are electrically coupled to the plurality of electrical interconnects

Development of high power capacitor charging power supply for pulsed power applications

Abstract: High power capacitor charging power supply (CCPS) using a series resonant converter technology has been developed The CCPS adopted a 33 kHz IGBT series resonant inverter and a high-efficiency, high-voltage transformer The performance test of the CCPS was carried out with a 33 nF load capacitor at 40 kV output voltage and 1 kpps repetition rate Peak power rate of 38 kJ/s and efficiency of 804% were obtained

Switched capacitor circuit having voltage management and method

Abstract: A switched capacitor circuit, for use in voltage converters and the like, which includes a switched capacitor array, a plurality of MOS transistor switches and drive circuitry for controlling the state of the switches. The drive circuitry alternates between a first phase where at least one capacitor of the array is connected by the switches between an input node and an output node and a second phase where the capacitor is connected in series between one of the output and input nodes and a third node, such as a circuit common. Boost and buck gain configurations are achieved when connected to the output and input nodes, respectively. A voltage management feature is implemented to control voltages produced in the array so that no PN junction of the transistor switches formed by a body and the drain/source regions disposed in the body becomes forward biased.

Identification of capacitor position in a radial system

Abstract: As modern equipment is more sensitive to power quality phenomena, transients introduced by capacitor switching become an increasing concern. The paper addresses the identification of switched capacitor position such that on-line or post-fault measures can be taken. The position is given in terms of proportional line impedance seen from the load bus. Perturbation methods are used to find an asymptotic expression for capacitor position as a function of the transient frequency. This paper presents analytical and simulation results for a standard radial distribution system.

Booster type converter with low power loss

Abstract: A booster type converter (19) wherein a boosting inductor is constituted from a transformer (20) provided with an auxiliary winding (20 b), a capacitor (26) is connected to the auxiliary winding, whereby the capacitor is charged by means of resonance of a leakage inductance of the transformer (20) and the capacitor (26), and at the same time, it makes possible to conduct zero voltage switching of the booster type converter (19) on the basis of the electric charge charged in the capacitor, whereby it is intended to attain high efficiency in the booster type converter.

Integrated circuit with variable capacitor

Abstract: Disclosed is an integrated circuit having a plurality of combinations of an integrated unit capacitor connected in series with a controlled channel of an integrated transistor switch. The series-connected capacitor and switch combinations are connected in parallel and the switches include a control gate coupled to a bit output of a register via a control line. In this manner, the capacitance of the variable capacitor depends on what word is stored in the register. Control gates for a different number of capacitor and switch combinations are connected to each bit output, and the numbers are weighted using, e.g., a binary weighting scheme. The variable capacitor is coupled to a balanced signal line pair, with capacitor and switch combinations comprising a switch connected between two capacitors that are connected to a line of the balanced signal line pair. Such arrangement is highly linear and even order distortion is reduced. The disclosed integrated circuit arrangements reduce the sensitivity to noise on the control line of the device. Variations in voltage applied to the control line and thus to the control gate of the switch vary the resistance value of the switch when closed, yet affect the value of the capacitive portion of the impedance very little. The disclosed capacitors are useful in circuits that need to be accurately trimmed once (e.g., filters) and in circuits in which variable capacitance is required, such as voltage controlled oscillators (VCOs).

Decoupling capacitors for thin gate oxides

Abstract: In some embodiments, the invention involves a die having a first conductor carrying a power supply voltage and a second conductor carrying a ground voltage. A semiconductor capacitor operating in depletion mode is coupled between the first and second conductors to provide decoupling capacitance between the first and second conductors, the semiconductor capacitor having a gate voltage. Various configurations may be used including: n+ gate poly and n+ source/drain regions in an n-body; p+ gate poly and n+ source/drain regions in an n-body; p+ gate poly and p+ source/drain regions in an n-body; p+ gate poly and p+ source/drain regions in a p-body; n+ gate poly and p+ source/drain regions in a p-body; n+ gate poly and n+ source/drain regions in a p-body. The power supply voltage may have a larger absolute value than does a flatband voltage.

Semiconductor device having hierarchical power supply line structure improved in operating speed

Abstract: Provided is a power supply-to-power supply capacitance cell including a first capacitor connected between a sub power supply line and a sub ground line, a second capacitor connected between a main power supply line and the sub ground line, and a third capacitor connected between the sub power supply line and a main ground line. Thus, a voltage drop of the sub power supply line can be reduced in current consumption of an internal circuit, so that an operation of the internal circuit is stabilized and the operating speed thereof is improved.

RF isolation using power islands in DC power bus design

Abstract: Power island structures are often employed for minimizing the propagation of high-frequency noise on DC power buses. The rationale is based on introducing a series impedance in the power plane to provide isolation of a noise source from the rest of the PCB design. The power island concept is investigated herein experimentally, to determine its noise mitigation attributes and limitations. A modeling approach that is suitable for arbitrary PCB island geometries including lumped SMT decoupling capacitors is also presented. The modeling and measurements indicate that island structures can achieve some degree of isolation under certain conditions.

Dynamic semiconductor memory device with reduced current consumption in sensing operation

Abstract: A decoupling capacitor is coupled to a sense power supply line with respect to a sense amplifier circuit group, and the sense power supply line is selectively coupled with a power supply node in response to an operation mode of a sense amplifier. In a sensing operation, the potential of a bit line is determined by redistribution of charges between the decoupling capacitor and a load capacitor of the bit line. Refresh characteristics is improved without increasing a sense current and showing down the sensing operation.

Power saving circuit

Abstract: Stand-by power for electronic devices is reduced. A capacitor (1) is connected with an AC power supply (6) to provide a standby DC power supply (10) using the leading current component flowing through the capacitor. When infrared commands are used, the capacitor is connected in parallel with another capacitor (3) to increase the current output capability of the DC power supply, and an AC switching element (4) is maintained in ON state.

Decoupling capacitor configuration for integrated circuit chip

Abstract: A decoupling capacitor structure formed integral with an integrated circuit chip and over top of circuitry defined thereon advantageously provides decoupling capacitance in close electrical proximity to switching circuits of the integrated circuit chip without substantially affecting die footprint. In contrast with on-die gate oxide capacitor configurations, a decoupling capacitor structure formed toward the back end of processing, typically after interconnect metal, allows large area capacitor structures without substantial impact on area available for devices and circuitry. Inductance associated with the intervening portion of a power supply loop circuit between switching circuits of the integrated circuit chip and the decoupling capacitor structure can be extremely low in configurations in accordance with the present invention. In some configurations, connection points, e.g., bonding pads and/or solder bumps for conveying power supply voltages, are defined over top of the decoupling capacitor structure.

Capacitor array unit connected to oscillation circuit with a piezoelectric reasonator, capacitor array unit controller oscillation frequency adjusting system and oscillation frequency adjusting method

Abstract: A voltage-controlled piezoelectric resonator may be implemented without requiring the use of a trimmer capacitor by virtue of the use of a capacitor array with or without an additional capacitor array, thus reducing the number of external parts. The capacitor array and the additional capacitor array can be packaged in an IC, thus enabling reduction in the size of the voltage-controlled piezoelectric resonator. The voltage-controlled piezoelectric resonator incorporating the capacitor array exhibits high stability both in terms of secular change and operation, which in turn ensures high stability of operation of a piezoelectric oscillation circuit incorporating this voltage-controlled piezoelectric resonator. An oscillation center frequency adjusting mechanism produces adjusting data, so that the adjustment of the oscillation center frequency can be effected purely electrically. Since mechanical adjusting operation that is essential in conventional arrangements is unnecessary, the time required for the adjustment of the oscillation center frequency is shortened to allow a reduction in the production cost of the voltage-controlled piezoelectric resonator.

Capacitor storage system for electrical energy, has energy transferred from an AC or DC source to a high capacity capacitor via induction, rectifying and/or regulating circuits, as appropriate

Abstract: Non-polluting electrical energy storage system According to the invention, the system comprises a power base (8, 9) connected to an electricity source and a storage circuit including a regulator (4) and at least one a capacitor (5) with a large capacity. Applications: replacement of batteries and accumulators.

Integrated environmental energy extractor

Abstract: In embodiments of the present invention, an energy extractor includes a capacitor which experiences capacitance and voltage changes in response to movement of a capacitor plate or of a dielectric material. In one embodiment, a third plate is positioned between first and second plates to create two capacitors of varying capacitances. In another embodiment, one capacitor plate is attached by flexible arms which permit movement across another capacitor plate. The above capacitors can be used singularly or with one or more other capacitors and are rectified either individually or in a cascaded arrangement for supplying power to a rechargeable energy source. The above capacitors can be fabricated on a substrate along with supporting electronics such as diodes.

A new switched-capacitor dc-dc converter with improved line and load regulations

Abstract: A new switched-capacitor (SC) step-down dc-dc converter is presented. It exhibits smaller size, lighter weight and stronger regulation capabilities than previous SC converters of the same power ratings. Its operation principles and analysis are described in detail and an accurate as well as an approximate expression governing input, output and circuit parameters is presented. A discussion on the achievable conversion efficiency is also given. A 12 V/5 V prototype based on the proposed topology has been implemented and tested. Theoretical prediction of its regulation and efficiency is verified experimentally.