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Showing papers on "Decoupling capacitor published in 2002"


Journal ArticleDOI
TL;DR: In this article, an economic electronic module integrated on an electrolytic capacitor that is able to indicate the moment when it must be changed is presented, based on measurements of the voltage ripple and the capacitor current; the latter is compared to the ESR value of the sound capacitor deduced from the component case temperature.
Abstract: The object of this paper is to present an economic electronic module integrated on an electrolytic capacitor that is able to indicate the moment when it must be changed. First, with a switchmode power supply as an example, the high probability of electrolytic capacitor failure with respect to other power components is noted. Second, the authors recall that the increase of the equivalent series resistance (ESR) of the capacitor is the best indicator of their faulty state. From the measurements of the voltage ripple and the capacitor current, one can deduce the ESR; the latter is compared to the ESR value of the sound capacitor deduced from the component case temperature. Thus, the capacitor deterioration can be diagnosed.

158 citations


Journal ArticleDOI
10 Dec 2002
TL;DR: In this article, a method to reduce the ripple current in a constant Volts/Hertz pulseamplitude modulation (PAM)/pulsewidth modulated (PWM) converter driving an induction motor is investigated.
Abstract: Electrolytic capacitors are used in nearly all adjustable-speed drives, and they are one of the components most prone to failure. The main failure mechanisms include loss of electrolyte through outgassing and chemical changes to the electrolyte and oxide layer. All the degradation mechanisms are exacerbated by ripple current heating. Since the equivalent series resistance of electrolytic capacitors is a very strong function of frequency it must be properly modeled to accurately calculate the power loss. In this paper, a method to reduce the ripple current in a constant Volts/Hertz pulse-amplitude-modulation (PAM)/pulsewidth-modulation (PWM) converter driving an induction motor is investigated. The dc-bus voltage amplitude is reduced in proportion to speed by a buck or current stiff rectifier and the PWM modulation index is maintained at a high level to achieve a reduced ripple current below base speed. By comparison with a diode-bridge-fed PWM voltage stiff inverter, it is shown that the PAM/PWM mode of operation can lead to a significant reduction in capacitor power loss leading to increased capacitor lifetime or decreased capacitor size. The capacitor heating is analyzed using numerical and analytical techniques. Experimental results are provided to verify the analytical results.

132 citations


Journal ArticleDOI
TL;DR: In this article, the relationship between bulk capacitor voltage, input current harmonics, voltage feedback ratio, and load condition was analyzed for single-stage PFC AC/DC converters.
Abstract: Single-stage power factor correction (PFC) AC/DC converters integrate a boost-derived input current shaper (ICS) with a flyback or forward DC/DC converter in one single stage. The ICS can be operated in either discontinuous current mode (DCM) or continuous current mode (CCM), while the flyback or forward DC/DC converter is operated in CCM. Almost all single-stage PFC AC/DC converters suffer from high bulk capacitor voltage stress and extra switch current stress. The bulk capacitor voltage feedback with a coupled winding structure is widely used to reduce both the voltage and current stresses in practical single-stage PFC AC/DC converters. This paper presents a detailed analysis of the bulk capacitor voltage feedback, including the relationship between bulk capacitor voltage, input current harmonics, voltage feedback ratio, and load condition. The maximum bulk capacitor voltage appears when the DC/DC converter operates at the boundary between CCM and DCM. This paper also reveals that only the voltage feedback ratio determines the input current harmonics under DCM ICS and CCM DC/DC operation. The theoretical prediction of the bulk capacitor voltage as well as the predicted input harmonic contents is verified experimentally on a 60 W AC/DC converter with universal-line input.

125 citations


Proceedings ArticleDOI
07 Nov 2002
TL;DR: In this article, the performance improvement when a supercapacitor is used with a battery is examined, and it is shown that the battery voltage and current can be filtered with a capacitor.
Abstract: There are many loads that create current pulses yet require a small voltage droop. This can be very demanding on battery sources. The battery voltage and current can be filtered with a capacitor. The capacitor must have sufficient energy storage to deliver the current pulse for the required time, and its equivalent series resistance (ESR) must be small enough to minimise the voltage droop. Supercapacitors meet these requirements. This paper examines performance improvement when a supercapacitor is used with a battery.

118 citations


Patent
10 May 2002
TL;DR: In this paper, a control voltage control circuit for tunable dielectric devices is presented, consisting of an input for receiving a voltage command signal, a charging circuit for establishing a desired voltage level on a first capacitor, and a switch for switching voltage on the first capacitor to a tunable device.
Abstract: A circuit for providing a control voltage for tunable dielectric devices, the circuit comprising an input for receiving a voltage command signal, a charging circuit for establishing a desired voltage level on a first capacitor in response to the voltage command signal, and a switch for switching voltage on the first capacitor to a tunable dielectric device to control a dielectric constant of tunable dielectric material in the tunable dielectric device. A second capacitor, second charging circuit, and second switch can be used to provide voltage to the tunable dielectric device during charging or discharging of the first capacitor. The method for providing a control voltage for tunable dielectric devices performed by these circuits is also included.

107 citations


Patent
22 Jul 2002
TL;DR: A programmable capacitor array including a plurality of user-selectable, numerically weighted capacitors, each of which includes at least one fixed capacitor and one manufacturer-controlled trim capacitor, advantageously provides a variety of selectable capacitance values for a programmable analog integrated circuit as mentioned in this paper.
Abstract: A programmable capacitor array including a plurality of user-selectable, numerically weighted capacitors, each of which includes at least one fixed capacitor and one manufacturer-controlled trim capacitor, advantageously provides a variety of selectable capacitance values for a programmable analog integrated circuit. When coupled to a memory, for example a static memory, switches can be controlled that determine whether a particular fixed capacitor (user-selectable) or trim capacitor (manufacturer-selectable) is electrically coupled into the circuit. User access to those portions of memory controlling switches associated with the trim capacitors can be restricted via an I/O interface and security command. Such programmable capacitor arrays allow efficient implementation of user-programmable filter circuits where the user can conveniently program or reprogram a variety of filter parameters.

94 citations


Patent
02 Oct 2002
TL;DR: In this paper, an energy accumulating capacitor such as an excimer laser is prevented from being overcharged by stored energy in a resonance inductance device by switching off a first semiconductor switch and switching on or off a second switch when reaching the target voltage.
Abstract: An energy accumulating capacitor such as an excimer laser is prevented from being overcharged by stored energy in a resonance inductance device. In a resonant capacitor charging circuit, when it is forecast that an energy accumulating capacitor can be charged to a target charge voltage by the magnetic energy of a resonant inductance device after a first semiconductor switch is switched off, the first semiconductor switch is switched off, and when actually reaching the target charge voltage, a second semiconductor switch is switched on or off, in order to charge with high accuracy.

90 citations


Patent
04 Sep 2002
TL;DR: In this article, an electronic control system and process for infusion devices and pump configurations can provide highly efficient use of electrical power, which can include a capacitor (28) which is controlled to partially, but not fully discharge, to provide a power pulse to a pump coil.
Abstract: An electronic control systems and process for infusion devices and pump configurations can provide highly efficient use of electrical power. The system may include a capacitor (28), which is controlled to partially, but not fully discharge, to provide a power pulse to a pump coil (24). A power cut-off switch (40) may be provided to control the discharge of the capacitor such that the capacitor (28) is stopped from discharging prior to the actual end of the armature stroke. The time at which the capacitor discharge is stopped may be selected such that energy remaining in the coil (24) after the capacitor (28) stops discharging is sufficient to continue the pump stroke to the actual end of the stroke. A power disconnect switch (41) may be provided between the capacitor (28) and the battery (26), to allow the capacitor (28) to be electrically disconnected from the battery (26) during storage or other periods of non-use.

85 citations


Patent
19 Nov 2002
TL;DR: In this paper, an AC/DC/AC power converter is constructed without using any electrolytic capacitor, such that it is more compact, durable and reliable, and it can be easily obtainable with other types of capacitors such as film or ceramic type.
Abstract: An AC/DC/AC power converter is constructed without using any electrolytic capacitor, such that it is more compact, durable and reliable. This converter only required a small capacitance for its DC link and this capacitor can be easily obtainable with other types of capacitors such as film or ceramic type. The system further includes means to disconnect both input and output to this DC bus capacitor. A controller capable of fast monitoring the DC bus voltage is also able of quickly disconnecting the capacitor out of either input or output energy path to prevent the capacitor from being charged to over-voltage. The controller also possesses capability of re-connecting the disrupted energy path once the DC bus voltage returns to normal.

81 citations


Journal ArticleDOI
10 Dec 2002
TL;DR: In this paper, the authors present a method for analyzing multilayered rectangular and irregular shaped power distribution planes in the frequency and time domain using a two dimensional array of distributed RLCG circuit elements.
Abstract: This paper presents a method for analyzing multilayered rectangular and irregular shaped power distribution planes in the frequency and time domain. The analysis includes the effect of vias on the power distribution network. The planes are modeled using a two dimensional array of distributed RLCG circuit elements. Planes are connected in parallel using vias, which are modeled as self and mutual inductors. For the computation of the power distribution impedances at specific points in the network, a multiinput and multioutput transmission matrix method has been used. This is much faster than Spice and requires smaller memory. Using the transmission matrix method, via effects and the effects of multiple rectangular power/ground plane pairs without and with decoupling capacitors have been analyzed for realistic structures.

81 citations


Journal ArticleDOI
10 Dec 2002
TL;DR: In this article, a test board with a local decoupling capacitor was studied and the noise mitigation effect due to the capacitor placed adjacent to an input test port was measured, and closed-form expressions for self and mutual inductances of vias were developed, so that the noise mitigating effect can then be estimated using the previously developed expression.
Abstract: Local decoupling, i.e., placing decoupling capacitors sufficiently close to device power/ground pins in order to decrease the impedance of power bus at frequencies higher than the series resonant frequency, has been studied using a modeling approach, a hybrid lumped/distributed circuit model established and an expression to quantify the benefits of power bits noise mitigation due to local decoupling developed. In this work, a test board with a local decoupling capacitor was studied and the noise mitigation effect due to the capacitor placed adjacent to an input test port was measured. Closed-form expressions for self and mutual inductances of vias are developed, so that the noise mitigation effect can then be estimated using the previously developed expression. The difference between the estimates and measurements is approximately 1 dB, which demonstrates the application of these closed-form expressions in the PCB power bus designs. Shared-via decoupling, capacitors sharing vias with device power/ground pins, is also modeled as an extreme case of local decoupling.

Proceedings ArticleDOI
07 Apr 2002
TL;DR: Experimental results show that power grid noise can be significantly reduced after a judicious optimization of decap placement, with little change of the total chip area.
Abstract: With technology scaling, the trend for high performance integrated circuits is towards ever higher operating frequency, lower power supply voltages and higher power dissipation. This causes a dramatic increase in the currents being delivered through the on-chip power grid and is recognized in the International Technology Roadmap for Semiconductors as one of the difficult challenges. The addition of decoupling capacitances (decaps) is arguably the most powerful degree of freedom that a designer has for power-grid noise abatement and is becoming more important as technology scales. In this paper, we propose and demonstrate an algorithm for the automated placement and sizing of decaps in ASIC-like circuits. The adjoint sensitivity method is applied to calculate the first-order sensitivity of the power grid noise with respect to every decap. We propose a fast convolution technique based on piecewise linear (PWL) compressions of the original and adjoint waveforms. Experimental results show that power grid noise can be significantly reduced after a judicious optimization of decap placement, with little change of the total chip area.

Patent
15 Apr 2002
TL;DR: A dielectric composed of a core material between two polymer layers that have permittivity values less than the core material was proposed in this paper to reduce noise in electronic devices.
Abstract: A dielectric composed of a core material between two polymer layers that have permittivity values less than the core material. The polymer layers provide structural integrity for the dielectric. The dielectric can be employed in a capacitor to fine tune the capacitance of the capacitor. The dielectric and the capacitor may have a thickness in the micron range. Accordingly, the dielectric and capacitor provide for the miniaturization of electronic devices. The dielectric may be employed in decoupling capacitors to reduce noise in electronic devices.

Patent
01 Oct 2002
TL;DR: In this paper, when a control section (39) turns on a switch (31, 33, 35, 36), a capacitor (37) is connected to a secondary battery (B 1 ) in parallel.
Abstract: When a control section ( 39 ) turns on a switch ( 31, 33, 35 ), a capacitor ( 37 ) is connected to a secondary battery (B 1 ) in parallel. Accordingly, voltage between both ends of each capacitor ( 37, 38 ) reaches voltage between both polarities of each secondary battery (B 1 , B 2 ). Thereafter, when the control section ( 39 ) turns off the switch ( 31, 33, 35 ) and turns on a switch ( 32, 34, 36 ), each capacitor ( 37, 38 ) is connected to the secondary battery (B 2 , B 3 ) in parallel. The capacitor ( 37, 38 ) is charged/discharged to balance voltage between both polarities of the secondary battery (B 1 to B 3 ).

Patent
25 Apr 2002
TL;DR: In this paper, a half-bridge converter is designed to stabilize by modulating, as a function of the voltage across the DC blocking capacitor, the feedback output error signal or the ramp signal for the PWM controller of the converter.
Abstract: Typically, in a half-bridge converter A DC blocking capacitor and inductance on the primary side combines with the inductor and capacitor on the secondary side to produce complicated converter dynamic characteristics that make converter stabilization difficult The disclosed system and methods enable converter stabilization by modulating, as a function of the voltage across the DC blocking capacitor, the feedback output error signal or the ramp signal for the PWM controller of the converter The modulation removes the effect of the resonant circuit formed by the primary inductance and the DC blocking capacitor in the output voltage regulation loop Further adjustment of the duty cycle of the power switches enables keeping the output voltage undisturbed by voltage variation across the DC blocking capacitor Since, this inner compensation loop results in the voltage regulation feedback loop respond to only the output inductor-capacitor filter, the transfer function of this loop displays second order characteristics from the fourth order Hence, stability issues are simplified to conventional second order compensation network whereby the converter can be optimized for fast transient response

Patent
Patrick J. Quinn1
29 Aug 2002
TL;DR: In this article, a method, apparatus, and system for providing accurate level shifting, residue multiplication, and sample-and-hold functions for ADCs, while eliminating capacitor mismatch as a source of ADC errors is presented.
Abstract: A method, apparatus, and system for providing accurate level shifting, residue multiplication, and sample-and-hold functions for ADCs, while eliminating capacitor mismatch as a source of ADC errors. An input signal is sampled onto a first capacitor, and the complemented input signal is sampled onto a second capacitor. The sampled input signal is provided to a first input terminal of a unity gain amplifier by controllably connecting the first capacitor between the amplifier output and the first input terminal. An inverted version of the sampled complemented input signal is level shifted and provided to the amplifier's second input terminal by controllably coupling the second capacitor between a selected level-shift voltage and the second input terminal. The sampled analog input signal is added to the inverted version of the sampled complemented analog input signal, while subtracting the selected level-shift voltage, to provide a residue signal available for use in subsequent conversion stages.

Patent
10 Jan 2002
TL;DR: In this paper, a data transmission-reception unit which operates by means of the energy of a received electromagnetic wave and serves as a main circuit is constituted, with a sensor circuit (130) as an additional circuit, and a transponder (100) having a sensor power circuit (150) only connected to the sensor circuit.
Abstract: A data transmission-reception unit which operates by means of energy of a received electromagnetic wave and serves as a main circuit, is provided with a sensor circuit (130) as an additional circuit, and a transponder (100) having a sensor power circuit (150) only to the sensor circuit is constituted. From a sensor charging circuit of an interrogator (230), an electromagnetic wave of a lower frequency different from a frequency of electromagnetic wave for data communication is radiated, or loop coil-shaped charging antennas (102,202) are electromagnetic-coupled to thereby charge a capacitor for the sensor power circuit. Thereby, a secondary battery and the capacitor such as a large scale capacitor can be easily charged from an outside, and further, a power consumption for the capacitor can be restrained.

Patent
Hideki Sasaki1, Takashi Harada1
12 Nov 2002
TL;DR: In this article, a printed-circuit board characteristic evaluation system is presented, which is basically configured by an input device, data processing device, a storage device and an output device.
Abstract: A printed-circuit board characteristic evaluation system is basically configured by an input device, a data processing device, a storage device and an output device. Herein, the input device inputs layout information representing an overall layout of a printed-circuit board installing at least one active component, from which layout information data regarding a power supply circuit is extracted and is stored in the storage device. The layout information data is converted to electric circuit information representing an equivalent circuit model with respect to a selected side of the printed-circuit board. Then, calculations are performed based on the layout information data to produce impedance characteristics with respect to the power supply circuit. A decision is made as to whether resonance is caused to occur in the power supply circuit on the basis of results of comparison of the impedance characteristics. The output device outputs the impedance characteristics as well as resonance information. If it is determined that resonance is caused to occur in the power supply circuit, the system changes the layout information, from which new layout information data is being extracted. In addition, a resonance suppression technique (e.g., installation of a decoupling capacitor) is applied to a certain point of the power supply circuit or a prescribed power terminal connecting position. Thus, the system is capable of performing evaluation as to whether printed-circuit boards are well designed to suppress variations of power voltages while inhibiting radiation of unwanted electromagnetic waves from occurring due to resonance of power supply circuits.

Patent
11 Sep 2002
TL;DR: In this paper, a method for detecting failure of a relay operating in a vehicle having an ignition switch, a power supply, a capacitor, and a pre-charge circuit is presented.
Abstract: A method for detecting failure of a relay operating in a vehicle having an ignition switch, a power supply, a capacitor, and a pre-charge circuit to pre-charge the capacitor with the relay switching power from the power supply to the pre-charged capacitor, the method comprising the steps of: performing a capacitor pre-charge test; and performing a capacitor discharge test. Preferably, the capacitor pre-charge test is performed when the ignition is switched ON and the capacitor discharge test is performed when the ignition is switched OFF.

Patent
19 Jan 2002
TL;DR: In this article, an adaptive voltage power supply that finely adjusts VDD to an optimum level is proposed. But the power supply is not suitable for high-voltage applications, as it is prone to overheating.
Abstract: There is disclosed an adaptive voltage power supply that finely adjusts VDD to an optimum level. The adaptive voltage power supply comprises: 1) a first charging circuit capable of increasing a reference voltage on a charge capacitor in response to receipt of a first VDD control signal; 2) a second charging circuit capable of decreasing the reference voltage on the charge capacitor in response to receipt of a second VDD control signal; and 3) a power supply capable of receiving the reference voltage on the charge capacitor and generating an output power level, VDD, determined by a level of the reference voltage.

Patent
16 Dec 2002
TL;DR: A Miller-compensated amplifier circuit as mentioned in this paper is a Miller compensated circuit that includes an amplifier stage and a compensation capacitor arranged in parallel with the amplifier stage, and includes an inversion stage in the current multiplier circuit path.
Abstract: A Miller-compensated amplifier circuit. The circuit includes an amplifier stage, and a compensation capacitor arranged in parallel with the amplifier stage. A current multiplier circuit path, adapted to multiply a current through the compensation capacitor, includes an inversion stage in the current multiplier circuit path. The inversion stage includes a first current mirror adapted to mirror a first current corresponding to a current through the compensation capacitor, to provide a second current, as well as a second current mirror adapted to mirror and invert the second current to provide a third current and to apply the third current to the amplifier stage. In this way, the circuit is Miller compensated by only a single capacitor that has its capacitance multiplied in accordance with current-mode multiplication.

Patent
26 Feb 2002
TL;DR: In this article, the authors proposed a fully differential sampling circuit which reduces a sampling error to suppress the occurrence of a second harmonic component, which is due to voltage dependence of a capacitance of the capacitor formed on a semiconductor substrate.
Abstract: To provide a fully differential sampling circuit which reduces a sampling error to suppress the occurrence of a second harmonic component The sampling error is resulted from voltage dependence of a capacitance of the capacitor formed on a semiconductor substrate The present invention includes a first sampling capacitor 27, a second sampling capacitor 28, four switches 31, 32, 33′, and 34 for charging and discharging the first sampling capacitor 27, four switches 41, 42, 43′, and 44 for charging and discharging the second sampling capacitor 28, and a fully differential operational amplifier 20 including a first integral capacitor 25 and a second sampling capacitor 26 An upper layer electrode 28 b and a lower layer electrode 28 a of the second sampling capacitor 28 are opposite to the first sampling capacitor 27 in connecting direction (state)

Patent
David M. Fried1, Edward J. Nowak1
12 Apr 2002
TL;DR: In this article, the authors describe the design and methods for incorporating capacitors commonly used in planar CMOS technology into a FinFET based technology, where a capacitor includes at least one single-crystal Fin structure having a top surface and a first side surface opposite a second side surface.
Abstract: Device designs and methods are described for incorporating capacitors commonly used in planar CMOS technology into a FinFET based technology. A capacitor includes at least one single-crystal Fin structure having a top surface and a first side surface opposite a second side surface. Adjacent the top surface of the at least one Fin structure is at least one insulator structure. Adjacent the at least one insulator structure and over a portion of the at least one Fin structure is at least one conductor structure. Decoupling capacitors may be formed at the circuit device level using simple design changes within the same integration method, thereby allowing any number, combination, and/or type of decoupling capacitors to be fabricated easily along with other devices on the same substrate to provide effective decoupling capacitance in an area-efficient manner with superior high-frequency response.

Patent
08 Jul 2002
TL;DR: In this paper, a capacitor unit with plural electronic double layer capacitors connected in series is characterized, where a chargeable and dischargeable capacitor unit 1 with a higher state of charge is subject to discharge so that a state of charging of the respective electric double layer capacitor 11 may become approximately equal to each other.
Abstract: A capacitor unit with plural double layer capacitors eliminating irregularity in a state of charge of the respective double layer capacitor in the capacitor unit. A capacitor unit, a capacitor unit control method, a capacitor unit control apparatus and a vehicle charging system, wherein a chargeable and dischargeable capacitor unit 1 with plural electronic double layer capacitors 11 connected in series is characterized in that electric double layer capacitors 11 in a higher state of charge is subject to discharge so that a state of charging of the respective electric double layer capacitor 11 may become approximately equal to each other.

Patent
27 Nov 2002
TL;DR: A voltage supply bypass capacitor for use with a semiconductor integrated circuit chip or module comprising a ferroelectric dielectric having electromechanical properties designed to provide maximum losses at selected frequencies is described in this article.
Abstract: A voltage supply bypass capacitor for use with a semiconductor integrated circuit chip or module comprising a ferroelectric dielectric having electromechanical properties designed to provide maximum losses at selected frequencies.

Patent
19 Dec 2002
TL;DR: In this article, a fuel cell system was used to generate electric power in low-load conditions where the energy efficiency of the fuel cell was low, and switches between the fuel cells and the wiring were closed when the load becomes small and the regenerated voltage attains a predetermined level.
Abstract: An electric vehicle 10 includes a power supply apparatus 15. The power supply apparatus 15 includes a fuel cell system 22, capacitor 24 and secondary battery 26 that are connected in parallel to wiring 50. When a drive motor is performing regeneration, the capacitor 24 is collecting the regenerated electric power. The fuel cell system 22 generates electric power in accordance with the load demand. The switches 20 between the fuel cell and the wiring are closed when the load becomes small and the regenerated voltage attains a predetermined level. As a result, the generation of electric power by the fuel cell system is suspended under low-load conditions where the energy efficiency of the fuel cell system 22 is low.

Patent
05 Jun 2002
TL;DR: In this article, a soft start circuit is used to carry out the switching operation so that the charged voltage always becomes not more than the output voltage in the steady state at the start-up.
Abstract: A control section controls a switch to a charge period so as to charge a voltage-increasing capacitor at a start up. Then, the control section controls the switch to a voltage-increasing period so as to increase a voltage by a voltage-increasing capacitor and charges the output capacitor. The switching section alternately switches the charge period and the voltage-increasing period so that the charged voltage of the output capacitor, i.e., the output voltage is always stabilized within a range of the output voltage in a steady state. Here, a soft start circuit controls the switching section to carry out the switching operation so that the charged voltage always becomes not more than the output voltage in the steady state at the start-up.

Patent
Sani R. Nassif1, Haihua Su1
10 Oct 2002
TL;DR: In this paper, a method and system for reducing noise in a power grid of an integrated circuit, which optimizes the placement and sizing of decoupling capacitors in the power grid, is presented.
Abstract: A method and system for reducing noise in a power grid of an integrated circuit, which optimizes the placement and sizing of decoupling capacitors in the power grid. Logic cells are located in a first layout of the integrated circuit with empty spaces between the adjacent cells, and the placement of the cells is changed to a second layout wherein the size of the empty spaces between the adjacent cells also change. The decoupling capacitors are placed in the empty spaces of the second layout. In the example of a row-oriented cell structure, the empty spaces may be uniformly distributed along each row for the initial layout. An adjoint sensitivity analysis is performed of the sensitivity of a noise function of the integrated circuit with respect to sizes of the empty spaces between adjacent cells, and an original noise waveform is convolved with an adjoint noise waveform. The convolution may use piecewise linear compressions of the original and adjoint noise waveforms. A quadratic programming solver is then used to iteratively determine the sizes of the empty spaces between adjacent cells.

Patent
26 Jul 2002
TL;DR: Capacitive proximity sensing is carried out by detecting a relative change in the capacitance of a "scoop" capacitor formed by a conductor and a surrounding ground plane as mentioned in this paper, and the presence or absence of an object or body portion in close proximity to or contact with a device can be determined by comparing TouchVal with a predetermined threshold value.
Abstract: Capacitive proximity sensing is carried out by detecting a relative change in the capacitance of a “scoop” capacitor formed by a conductor and a surrounding ground plane Charge is transferred between the “scoop” capacitor and a relatively large “bucket” capacitor, and a voltage of the bucket capacitor is applied to an input threshold switch A state transition (eg, from low to high, or high to low) of the input threshold switch is detected and a value (TouchVal) indicative of a number of cycles of charge transfer required to reach the state transition is determined The presence or absence of an object or body portion in close proximity to or contact with a device can be determined by comparing TouchVal with a predetermined threshold value (TouchOff) In order to lessen the time required for detection, and/or improve the sensitivity thereof, the bucket capacitor may initially be charged to a repeatable non-zero reference level closer to the charge level that will cause a state transition TouchOff can be adjusted to take into account environmentally induced (non-touch related) changes in the capacitance of the scoop capacitor Power management may be provided in a user operated data input device utilizing the inventive proximity sensing

Journal ArticleDOI
TL;DR: In this paper, the role of plane resonances on power supply noise for fast current edge rates has been discussed using both time domain and frequency domain simulations, the models have been constructed to amplify certain parts of the test vehicle during simulations.
Abstract: This paper presents simulation and analysis of core switching noise for a CMOS ASIC test vehicle. The test vehicle consists of a ceramic ball grid array (CBGA) package on a printed circuit board (PCB). The entire test vehicle has been modeled by accounting for all the plane resonances using the cavity resonator method. The models included both the on-chip and off-chip decoupling capacitors. Using both time domain and frequency domain simulations, the role of plane resonances on power supply noise for fast current edge rates has been discussed. The models have been constructed to amplify certain parts of the test vehicle during simulations.