Showing papers on "Decoupling capacitor published in 2012"

Elimination of an Electrolytic Capacitor in AC/DC Light-Emitting Diode (LED) Driver With High Input Power Factor and Constant Output Current

Abstract: While LEDs enjoy relatively long lifetime up to 10 years, the lifetime of traditional LED drivers using electrolytic capacitor as storage element is limited to typically less than 5 years. In this paper, an ac/dc LED driver without electrolytic capacitor is studied. Compared with other methods to eliminate electrolytic capacitor, the proposed driver has the advantages of almost unity input power factor and constant output current for LEDs. The operation principle, detailed design procedure of the main circuit, and control strategy are presented. The feasibility of the proposed converter has been successfully verified by experiments.

Active Capacitor Voltage Balancing in Single-Phase Flying-Capacitor Multilevel Power Converters

Abstract: Two active capacitor voltage balancing schemes are proposed for single-phase (H-bridge) flying-capacitor multilevel converters. They are based on the circuit equations of flying-capacitor converters. Consequently, they can be implemented using straightforward control rules. In particular, the first technique is based on an algorithm which follows the standard multilevel modulation. Then, it utilizes a redundant state selection table for capacitor voltage balancing. In the second method, multiple duty cycles are defined and modulated in direct response to the capacitor voltages. The most important advantage of these two proposed methods is that they can be utilized to converters with any desired number of levels in their output voltage. Moreover, the analysis and implementation of both methods are straightforward. Through simulation and experimental implementation, these methods are shown to be effective on capacitor voltage regulation in flying-capacitor multilevel converters.

A Novel Valley-Fill SEPIC-Derived Power Supply Without Electrolytic Capacitor for LED Lighting Application

Abstract: The high-brightness white-light-emitting diode (LED) has attracted a lot of attention for its high efficacy, simple to drive, environmentally friendly, long lifespan, and compact size. The power supply for LED also requires long life, while maintaining high efficiency, high power factor, and low cost. However, a typical power supply design employs an electrolytic capacitor as the storage capacitor, which is not only bulky, but also with a short lifespan, thus hampering performance improvement of the entire LED lighting system. In this paper, a novel power factor correction (PFC) topology is proposed by inserting the valley-fill circuit in the single-ended primary inductance converter (SEPIC)-derived converter, which can reduce the voltage stress of the storage capacitor and output diode under the same power factor condition. This valley-fill SEPIC-derived topology is, then, proposed for LED lighting applications. By allowing a relatively large voltage ripple in the PFC design and operating in the discontinuous conduction mode (DCM), the proposed PFC topology is able to eliminate the electrolytic capacitor, while maintaining high power factor and high efficiency. Under the electrolytic capacitor-less condition, the proposed PFC circuit can reduce the capacitance of the storage capacitor to half for the same power factor and output voltage ripple as comparing to its original circuit. To further increase the efficiency of LED driver proposal, a twin-bus buck converter is introduced and employed as the second-stage current regulator with the PWM dimming function. The basic operating principle and analysis will be described in detail. A 50-W prototype has been built and tested in the laboratory, and the experimental results under universal input-voltage operation are presented to verify the effectiveness and advantages of the proposal.

A Three-port Flyback for PV Microinverter Applications With Power Pulsation Decoupling Capability

Abstract: A novel single-stage photovoltaic (PV) microinverter with power decoupling capability is proposed in this paper The proposed topology is based on three-port flyback with one port dedicated to power decoupling function so as to reduce the decoupling capacitance, thus allowing for long lifetime film capacitor to be used Operation principle is analyzed in details Key design considerations, including key parameter selections, predictive control strategy, and the dc voltage balance control across the power decoupling capacitor, are given in this paper A 100-W microinverter prototype is built to verify the proposed topology Experimental results show the proposed topology can achieve power decoupling, while maintaining good efficiency

Capacitor Voltage Balancing of Flying Capacitor Multilevel Converters by Space Vector PWM

Abstract: Proper operation of a multilevel flying capacitor converter (FCC) necessitates a closed-loop voltage balancing strategy. This paper proposes a space vector modulation (SVM)-based approach that benefits from the switching state redundancy of an n-level FCC to implicitly carry out the voltage balancing task within the switching strategy. Based on the voltage deviations of the capacitor voltages, a cost function is defined and minimized to choose the proper redundant switching states among the available switching states. The performance of a grid-connected four-level FCC under the proposed SVM strategy for various operating conditions is studied and evaluated based on time-domain simulations in the PSCAD/EMTDC environment, and experimentally verified. The studies demonstrate the capability of the proposed SVM strategy to regulate the capacitor voltages at their nominal reference values.

Minimization of the capacitor voltage fluctuations of a modular multilevel converter by circulating current control

Abstract: The modular multilevel converter (MMC) is one of the most potential converter topologies for medium/high power/voltage applications. One of the main technical challenges of an MMC is to eliminate/minimize the circulating currents within the legs. Circulating currents, if not properly controlled, increase the amplitude of capacitor voltage variations, rating values of the converter components and converter losses. This paper proposes a closed-loop circulating current control strategy for an MMC to specifically minimize the amplitude of capacitor voltage variations. The proposed strategy is based on adding an offset signal to the modulating signal of each arm. To minimize the amplitude of the capacitor voltage oscillations, an optimal circulating current component is determined and used as a reference signal for the current control of each MMC leg. Performance of the proposed control strategy is evaluated based on simulation studies in the MATLAB/Simulink environment. The reported study results demonstrate effectiveness of the proposed strategy to reduce the amplitude of the capacitor voltage oscillations.

Behavioral Average Modeling and Equivalent Circuit Simulation of Switched Capacitors Converters

Abstract: A generic behavioral average circuit model of a switched capacitor converter (SCC) is proposed and demonstrated by a unity conversion SCC The model is based on the average currents concept and can be used to calculate or simulate the average values of the SCC variables such as output voltage, capacitor voltages, and subcircuit currents The model is valid for all operational ranges of an SCC (complete, partial, and no charge) and is compatible with any circuit simulator that includes dependent sources Excellent agreement was found between full switched-circuit simulation, average simulation by proposed model, and experimental results

Capacitive field sensor with sigma-delta modulator

Abstract: A capacitive sensor includes a switching capacitor circuit, a comparator, and a charge dissipation circuit. The switching capacitor circuit reciprocally couples a sensing capacitor in series with a modulation capacitor during a first switching phase and discharges the sensing capacitor during a second switching phase. The comparator is coupled to compare a voltage potential on the modulation capacitor to a reference and to generate a modulation signal in response. The charge dissipation circuit is coupled to the modulation capacitor to selectively discharge the modulation capacitor in response to the modulation signal.

On the Limit of the Output Capacitor Reduction in Power-Factor Correctors by Distorting the Line Input Current

Abstract: Active power-factor correctors (PFCs) are needed to design ac-dc power supplies with universal input voltage range and sinusoidal input current. The classical method to control PFCs consists in two feedback loops and an analog multiplier. Hence, the input current is sinusoidal and it is in-phase with the input voltage. However, a bulk capacitor is needed to balance the input and the output power. Due to its high capacitance, an electrolytic capacitor is traditionally used as a bulk capacitor in PFCs. As a consequence, the lifetime of the ac-dc power supply is limited by the electrolytic capacitor's, which becomes insufficient to some applications (e.g., high-brightness LEDs). This paper proposes a reduction of the output voltage ripple (which allows reduction of the output capacitance) by distorting the input current, but maintaining the harmonic continent compatible with EN 61000-3-2 regulations. The limits of this output capacitor reductions are deduced. Also, a control strategy based on a low-cost microcontroller is developed to put the proposed study into practice. Finally, the theoretical results are validated in a 500-W prototype.

Dynamic power supply employing a linear driver and a switching regulator

Abstract: A highly efficient, high control bandwidth and high-speed power supply with a linear driver and a switching regulator for regulating an output based on a control signal. The linear driver has a first input for receiving the control signal and a second input connected to the output for receiving negative feedback. The driver's output is controlled by its two inputs and has a capacitor connected in series with it to generate a capacitor voltage V C responsive to the DC and low frequency components in the driver's output. The switching regulator has a control input and a regulator output connected in a regulator feedback loop. The control input receives capacitor voltage V C and the regulator feedback loop minimizes capacitor voltage V C . Thus, switching regulator takes over the generation of DC and low frequency components, while the linear driver provides high frequency output current components.

A segmented traction drive system with a small dc bus capacitor

Abstract: The standard voltage source inverter (VSI), widely used in electric vehicle/hybrid electric vehicle (EV/HEV) traction drives, requires a bulky dc bus capacitor, typically made of polypropylene films, to absorb the large ripple currents generated by the pulse width modulated switching actions and prevent them from damaging and shortening the battery's life. The dc bus capacitor presents a significant barrier to meeting the U.S. DRIVE targets for cost, volume, and weight for inverters. Currently the dc bus capacitor contributes up to 20% of the cost and weight of an inverter and up to 30% of an inverter's volume. The large ripple currents become even more problematic for the film capacitors (the capacitor technology of choice for EVs/HEVs) in high temperature environments as their ripple current handling capability decreases rapidly with rising temperatures. There is thus an urgent need to reduce the ripple currents. This paper presents a segmented traction drive system that can significantly decrease the ripple currents and thus the size of the dc bus capacitor.

Stacked switched capacitor energy buffer architecture

Abstract: Electrolytic capacitors are often used for energy buffering applications, including buffering between single-phase ac and dc. While these capacitors have high energy density compared to film and ceramic capacitors, their life is limited and their reliability is a major concern. This paper presents a stacked switched capacitor (SSC) energy buffer architecture and some of its topological embodiments which overcome this limitation while achieving comparable effective energy density without electrolytic capacitors. The architectural approach is introduced along with design and control techniques. A prototype SSC energy buffer using film capacitors, designed for a 320 V dc bus and able to support a 135 W load has been built and tested with a power factor correction circuit. It demonstrates the effectiveness of the approach.

Distributed On-Chip Power Delivery

Abstract: The performance of an integrated circuit depends strongly upon the power delivery system. With the introduction of ultra-small on-chip voltage regulators, novel design methodologies are needed to simultaneously determine the location of the on-chip power supplies and decoupling capacitors. In this paper, a unified design methodology is proposed to determine the optimal location of the power supplies and decoupling capacitors in high performance integrated circuits. Optimization algorithms widely used for facility location problems are applied in the proposed methodology. The effect of the number and location of the power supplies and decoupling capacitors on the power noise and response time is discussed.

Methods and apparatus for forming package-on-packages

Abstract: Methods and apparatus are disclosed for a package or a package-on-package (PoP) device. An IC package or a PoP device may comprise an electrical path connecting a die and a decoupling capacitor, wherein the electrical path may have a width in a range from about 8 um to about 44 um and a length in a range from about 10 um to about 650 um. The decoupling capacitor and the die may be contained in a same package, or at different packages within a PoP device, connected by contact pads, redistribution layers (RDLs), and connectors.

Pre-charge of switched capacitor circuits with cascoded drivers

Abstract: An apparatus for voltage conversion includes a switched capacitor circuit, a pre-charge circuit, a voltage divider stage, and a driver stage. The switched capacitor circuit has pump capacitors to transfer energy and a steady-state operating mode and a pre-charge mode. The pre-charge circuit initially charges the pump capacitors when the switched capacitor circuit operates in the pre-charge mode. It includes a voltage divider stage having one or more nodes, each of which provides voltage at one of a corresponding one or more voltage levels, and a driver stage having one or more cascoded drivers, each of which comprises a first terminal for receiving a drive signal that depends at least in part on a voltage level at a corresponding one of the nodes, and a second terminal for coupling to a pump capacitor and to another of the drivers.

Power conversion with added pseudo-phase

Abstract: Methods and systems for power conversion. An energy storage capacitor is contained within an H-bridge subcircuit which allows the capacitor to be connected to the link inductor of a Universal Power Converter with reversible polarity. This provides a “pseudo-phase” drive capability which expands the capabilities of the converter to compensate for zero-crossings in a single-phase power supply.

A DC bus capacitor design method for various inverter applications

Abstract: This paper involves the selection and sizing of the appropriate type of dc bus capacitor for various applications utilizing PWM operated three-phase voltage source inverters, such as battery operated systems, PV (photovoltaic) systems, UPSs, and motor drives. It classifies the power converter topologies based on dc bus ripple current frequency characteristics. A general approach for ripple current characterization is provided. Based on these characteristics, the two capacitor types suitable for this purpose, the electrolytic and film capacitors, used in inverter applications are reviewed. Capacitor power loss and voltage ripple calculation are provided for both types. Then, a thorough algorithm for dc bus capacitor design is provided. The application of the proposed design method is demonstrated through several design examples. Overall, the paper helps the power electronics development and design engineer in the design and performance evaluation procedure of dc bus capacitors for three-phase inverters. The method is simple but rigorous and accurate.

A novel active power decoupling method for single-phase photovoltaic or energy storage applications

Abstract: Conventional single-phase inverters exhibit double line frequency power pulsating, which affects dc sources such as photovoltaic performance and battery lifetime. Bulky dc-link electrolytic capacitors are typically employed as transient energy buffer to decouple the pulsating ac power from constant dc power, but such passive components suffer from temperature and aging concerns. For high reliability and high power density, active power decoupling approach is preferred. This paper presents a novel active power decoupling method by using a six-switch single-phase inverter topology. A small film capacitor is used as pulsating energy buffer in ac side, which not only improves the reliability but also the efficiency. A novel vector PWM for this topology is also proposed to maximize the dc voltage utilization, and to achieve the independent controls of the inverter output power and power decoupling. The simulation results have verified the proposed power decoupling method.

Controlling Conducted Emissions by Design

Abstract: I. Fundamentals of Conducted Emission Design.- 1. Designing for EMC.- 1.1 Noise (EMI).- 1.2 EMI Source, Path, and Victim.- 1.3 Conductive Paths.- 1.4 Conduction or Radiation?.- 1.5 Design to Control Conducted Emissions.- 2. EMI Spectrum.- 2.1 Time and Frequency Domains.- 2.2 Description of FFT Software.- 2.3 Data Interpretation.- 2.4 Bare Bones FFT.- 2.5 Methods of Inputting Data to FFT.- 2.6 An Enhanced Version of FFT.- 2.7 Examples of FFT Conversions from Time to Frequency Domains.- 2.8 Some Possible Pitfalls.- 2.9 Subharmonics.- 3. Capacitor Modeling.- 3.1 The Capacitor Model.- 3.2 Parasitic Elements of Capacitors.- 3.3 Capacitor Types.- 3.4 Capacitor Voltage Ratings.- 4. Inductor Modeling.- 4.1 Inductor Losses.- 4.2 Inductor Capacitance.- 4.3 Air Core with Conductor Near Experiment.- 4.4 Inductor Cores Form Capacitive Paths.- 4.5 Inductor Impedance Curve.- 4.6 Parasitic Elements of Inductors.- 4.7 Simulation.- 5. Balun Modeling.- 5.1 Differential Mode Flux.- 5.2 Common Mode Flux.- 5.3 The Truth about Windings on Inductor Cores.- 5.4 Coupling K Factor.- 5.5 Differential Balun Inductance.- 5.6 Common Mode Balun Inductance.- 5.7 Effects of Load and Source Resistances on Attenuation.- 5.8 Balun Driving Impedance.- 5.9 Balanced Circuits.- 5.10 Design Criteria.- 5.11 Model.- 6. Filters.- 6.1 Parasitic Inductances and Capacitances.- 6.2 Academic LC Filter.- 6.3 Simple Real World LC Filter.- 6.4 Control Parasitics by Design.- 6.5 Parasitics Caused by Circuit Layout.- 6.6 Filter Circuit Design.- 6.7 Characteristic Impedance of LC Filters.- 6.8 Parallel Capacitors to Lower the ESR.- 6.9 LC Filter.- 6.10 Line Impedance Stabilization Networks.- 6.11 Filter Layout and Packaging Design.- 7. Grounding Electronic Circuits.- 7.1 Grounding.- 7.2 Safety Grounds.- 7.3 Ground Geometries.- 7.4 Ground Design for Packaging ElectronicCircuitry.- 7.5 Shielding.- 8. EMI Analysis.- 8.1 EMI Modeling.- 8.2 EMI Analysis Using SPICE.- II. Advanced Conducted Emission Design.- 9. EMC Regulations.- 9.1 FCC.- 9.2 VDE.- 9.3 MIL-STD-461.- 9.4 Voltage/LISN Measurement Method.- 9.5 Current/Capacitor Measurement Method.- 9.6 A Comparison of Some of the RF Conducted Emissions Standards.- 10. Switch Mode Power Supplies.- 10.1 Typical Power Supply Block Diagram.- 10.2 Typical Switch Mode Power Supply EMI Problem Areas.- 10.3 EMI Simulation and Laboratory EMI Test Setup.- 10.4 SMPS EMI Design Example.- 10.5 Model the Problem.- 10.6 Simulation Problems.- 10.7 Back to Fundamental Model.- 10.8 Identify the Players.- 10.9 Other Types of EMI Modeling for SMPS.- 10.10 Conclusion.- 11. Transistor and Diode Packaging Problem for EMI.- 11.1 New Semiconductor Device Packages.- 11.2 Common Mode Shorting Screens.- 11.3 Typical System with Power Conversion.- 11.4 Common Mode Current Paths.- 11.5 Conducted Emissions Reduction by Choice of Package.- 12. Circuit Examples.- 12.1 Example 1.- 12.2 Example 2.- 12.3 Example 3 (FFT).- 13. Computers and Digital Logic Circuitry.- 13.1 Conducted Emissions Coupling Paths.- 13.2 Sequential Logic and Clocks.- 13.3 Example of Internal Conducted Emissions.- 13.4 What Is the Best Bypass Capacitor?.- 13.5 Power Entry Capacitor.- 14. What This Analysis Method Is Not.- 14.1 Diagnostics.- 14.2 Fields.- 14.3 Radiation.- 14.4 Characteristic Impedances of Common Pairs of Conductors.- 14.5 Shortcomings of EMI Test Simulation as Described Herein.- 15. Magnetic Saturation Modeling.- 15.1 The Polarization of Magnetic Domains.- 15.2 Device, Core, and Material Properties.- 15.3 Core Geometry Effects.- 15.4 Effects of Cores Made of Two Different Materials.- 15.5 Some Crucial Parameters to Model Saturation.- 15.6 Methods of Integrating Voltage.- 15.7 Dr. Lauritzen's Saturation Model.- 15.8 The Core Geometry and Material Porosity Region of the B-H Loop.- 15.9 Curve Fitting versus Parametric Models.- 15.10 Conclusion.- Appendix. BASIC FFT.

Study on Self-Healing and Lifetime Characteristics of Metallized-Film Capacitor Under High Electric Field

Abstract: A high-energy-density capacitor is a key device in power supply source in an electromagnetic-gun system. In order to increase the reliability of the power source equipment, the lifetime of the capacitor must be extended. The increasing of the lifetime is mainly beneficial from the self-healing characteristic of the capacitor. First, this paper verifies the effects of sheet resistance (Rs>;30Ω/□) and pressure between layers on the self-healing characteristic through experiments. The experimental results show that the self-healing energy is approximately inversely proportional to the square of sheet resistance. When the sheet resistance is reasonable, the self-healing energy can be limited to less than 40 mJ. In addition, the self-healing energy decreases with the increase of the pressure. When the pressure is greater than 200 kPa, the self-healing energy can be limited to less than 10 mJ. Then, the effect of interlayer air on the discharge arc in the self-healing process is analyzed. Meanwhile, this paper presents that the lifetime of the capacitors can be extended through excluding or decreasing the interlayer air. At last, two methods are provided: wrap strengthening and impregnation in vacuum. The experimental results show that the lifetime of the capacitors can be increased up to 1.6 times and 4-5 times through these two methods, respectively.

RF switching converter with ripple correction

Abstract: This disclosure relates generally to radio frequency (RF) switching converters and RF amplification devices that use RF switching converters. In one embodiment, an RF switching converter includes a switching circuit operable to receive a power source voltage, a switching controller configured to switch the switching circuit so that the switching circuit generates a pulsed output voltage from the power source voltage, and an RF filter configured to convert the pulsed output voltage into a supply voltage, wherein the RF filter includes a decoupling capacitor configured to receive the supply voltage. The switching controller is configured to generate a ripple correction current that is injected into the decoupling capacitor such that the decoupling capacitor filters the ripple correction current. The decoupling capacitor outputs the ripple correction current such that the ripple correction current reduces a ripple variation in a supply current level of a supply current resulting from the supply voltage.

Closed-Form Expressions for the Maximum Transient Noise Voltage Caused by an IC Switching Current on a Power Distribution Network

Abstract: Closed-form expressions for transient power distribution network (PDN) noise caused by an IC switching current are derived for a PDN structure comprised of traces with decoupling capacitors. Criteria for identifying a dominant decoupling capacitor for an impulse switching current are also proposed. The derived PDN noise expressions are validated with measurements of currents at both local and bulk capacitors, the PDN impedance, and the total voltage noise in an operating consumer device.

A fully on-chip area-efficient CMOS low-dropout regulator with fast load regulation

Abstract: Fully integrated voltage regulators with fast transient response and small area overhead are in high demand for on-chip power management in modern SoCs. A fully on-chip low-dropout regulator (LDO) comprised of multiple feedback loops to tackle fast load transients is proposed, designed and simulated in 90 nm CMOS technology. The LDO also adopts an active frequency compensation scheme that only needs a small amount of compensation capacitors to ensure stability. Simulation results show that, by the synergy of those loops, the LDO improves load regulation accuracy to 3 μV/mA with a 1.2 V input and 1 V output. For a 100 mA load current step with the rise/fall time of 100 ps, the LDO achieves maximum output voltage drop and overshoot of less than 95 mV when loaded by a 600 pF decoupling capacitor and consumes an average bias current of 408 μA. The LDO also features a magnitude notch in both its PSRR and output impedance that provides better suppression upon the spectral components of the supply ripple and the load variation around the notch frequency. Monte Carlo simulations are performed to show that the LDO is robust to process and temperature variations as well as device mismatches. The total area of the LDO excluding the decoupling capacitor is about 0.005 mm2. Performance comparisons with existing solutions indicate significant improvements the proposed LDO achieves.

High efficiency switched capacitor buck-boost converter for PV application

Abstract: A switched capacitor buck-boost DC/DC converter is proposed for the parallel connected distributed photovoltaic (PV) power generation application: an uncontrolled switched capacitor resonant converter is in parallel connection with a buck-boost converter where their outputs are summed to support the load. The switched capacitor converter is operated with a fixed conversion gain whereas the buck-boost converter is controlled to do the MPPT regulation and only a small portion of energy flows through it. In order to obtain ZVS for switched capacitor circuit in the full load range, an auxiliary inductor is added. The converter's performance has been evaluated on a 240W experimental prototype. The test results show that 92.5% efficiency is achieved to generate 200V high output voltage from a 60 cells crystalline PV module with V mpp =30V.

Capacitor voltage balancing in modular multilevel converters

Abstract: A universal capacitor voltage control method for converters built from series connected modules is presented. It fully exploits both the circulating currents and the common-mode voltage without affecting the phase current control. The controllability of the capacitor voltages in various such converters is investigated. It is found that the nonzero branch currents and terminal voltages are necessary for capacitor voltage balancing. (5 pages)

A transformerless galvanically isolated switched capacitor LED driver

Abstract: The design and test of a capacitor-isolated LED driver, suitable for screw-in, residential lighting applications, is reported. The design relies on a pair of high voltage isolation capacitors, comprising part of a series resonant tank. The series resonant tank is integrated with a balanced ladder step-down switched capacitor front-end, enabling the series resonant conversion stage to function conveniently with any line voltage, while still preserving the efficient voltage regulation capability of the resonant stage. Dimming and power control are effected with a low frequency PWM control loop. The tested prototype delivers 15.5 W at 425 mA at rated power into a string of 12 LEDs at 92% efficiency. Efficiency exceeding 85% is maintained over more than a 10:1 dimming range, and also over a wide range of line voltages.

Light-emitting diode driving device for reducing light off period

Abstract: An LED driving apparatus is provided. The apparatus includes an LED Portion 10 , a charging/discharging capacitor 111 , a capacitor charging and discharging paths, and a capacitor charging constant current portion 110 . The LED driving portion 3 controls a current in the LED portion 10 . The capacitor 111 is connected in parallel to the LED portion 10 . The charging and discharging paths are connected to the capacitor whereby charging and discharging the capacitor, respectively. The constant current portion 110 is connected on the charging path and controls a charging current so that the capacitor is charged at a constant current. When rectified voltage applied to the LED portion becomes high, the capacitor is charged with the charging current through the charging path. When the voltage becomes low, the capacitor is discharged at a discharging current through the discharging path so that the discharging current is applied to the LED portion.

Power converter and method for controlling same

Abstract: A power converter 100 includes a DC capacitor C, semiconductor switch groups each of which includes semiconductor switches connected in series to each other, bridge-cells 11 u - j , 11 v - j , and 11 w - j each of which includes the DC capacitor C and two semiconductor switch groups connected in parallel to the DC capacitor C, a delta connection unit 10 including delta-connected bridge-cells and a integrated control unit 1 for controlling a circulating current flowing in the delta connection unit such that each of DC-capacitor by-phase average values follows a DC-capacitor three-phase average value, each of the DC-capacitor by-phase average values being obtained by averaging voltage values of the DC capacitors at a corresponding phase of three phases, and the DC-capacitor three-phase average value being obtained by averaging voltage values of the DC capacitors at all of the three phases.

Decoupling circuits for filtering a voltage supply of multiple power amplifiers

Abstract: Embodiments for at least one method and apparatus of a voltage supply are disclosed. One voltage supply apparatus includes a voltage supply, a plurality of power amplifier (PA) decoupling circuits, and a plurality of power amplifiers. Each PA decoupling circuit is connected to the voltage supply and provides a filtered voltage supply to a corresponding one of the plurality power amplifiers. Each PA decoupling circuit configured to suppress noise of the provided filtered voltage supply below a threshold at one or more selected frequencies, wherein the suppression is provided by the PA decoupling circuit operating in conjunction with at least one other of the plurality of PA decoupling circuits.

Cascaded flying capacitor modular high voltage inverters

Abstract: A high voltage inverter is provided which includes a plurality of k-level flying capacitor H bridge modules, k being greater than 2, each having a positive dc terminal, a negative dc terminal, and two ac terminals, a connecting unit for connecting said ac terminals of said plurality of k-level flying capacitor H bridge modules in series to form a cascading set of modules, and a dc source connected to an ac source and having a transformer, a rectifier rectifying an output voltage of said transformer, and a capacitor connected between the positive and negative dc terminals.