Showing papers on "Decoupling capacitor published in 2022"

Self-Balanced Switched-Capacitor Thirteen-Level Inverters With Reduced Capacitors Count

Abstract: This letter describes two improved 13-level inverters based on switched-capacitor. Compared with their original structure, which is published recently, one less high-voltage capacitor is required in the proposed inverters and the blocking voltage of their inverting half-bridge is reduced by half. In addition, the new inverters inherit various advantages of the original structure, such as a high boost factor of 6, self-balanced capacitor voltages, and reduced voltage ripples. Circuit description, operation principle, hybrid PWM modulation, and capacitor voltage ripples are analyzed and the feasibility of the proposed inverters is finally verified by experimental results.

Self-Balanced Switched-Capacitor Thirteen-Level Inverters With Reduced Capacitors Count

Abstract: This letter describes two improved 13-level inverters based on switched-capacitor. Compared with their original structure, which is published recently, one less high-voltage capacitor is required in the proposed inverters and the blocking voltage of their inverting half-bridge is reduced by half. In addition, the new inverters inherit various advantages of the original structure, such as a high boost factor of 6, self-balanced capacitor voltages, and reduced voltage ripples. Circuit description, operation principle, hybrid PWM modulation, and capacitor voltage ripples are analyzed and the feasibility of the proposed inverters is finally verified by experimental results.

Investigation of Capacitor Voltage Balancing in Practical Implementations of Flying Capacitor Multilevel Converters

Abstract: Capacitor voltage natural balancing is an attractive feature of flying capacitor multilevel (FCML) converters. However, with the commonly used phase-shifted pulsewidth modulation, the capacitor voltages still can deviate, and active balancing is often required. Although the natural balancing mechanism and its dynamics have been extensively studied in existing literature, some sources that are responsible for capacitor imbalance in engineering practice are still unclear. This article experimentally investigates the origins of the voltage imbalance in practical implementations of such converters. It presents the corresponding circuit analysis as well as solutions that improve balancing. It is shown that the source impedance and the input capacitance can greatly deteriorate capacitor balancing. Moreover, we also demonstrate in theory and with experiments that an FCML converter with an even number of levels inherently has stronger immunity to such disturbance than that with an odd number of levels. It is also found that the gate signal propagation delay mismatch in half-bridge gate drivers can lead to capacitor imbalance, and this problem is addressed by an alternative gate drive power supply design. Finally, the variations of on -state resistance among different switches are found to have a relatively small impact on capacitor voltage balancing.

Capacitor-Based Synaptic Devices for Hardware Spiking Neural Networks

Abstract: In this work, we present a hardware neural network with capacitor-based synaptic devices. A capacitor-based synaptic device was developed using a MOS capacitor structure with a charge trapping layer. Due to the flat band voltage shift by charge trapping and its non-linear ${C} - {V}$ characteristics, multilevel weight values could be implemented by the charge occurring when charging and discharging the capacitor. The vector-matrix multiplication (VMM) function was also experimentally verified using a fabricated synapse array based on NAND flash structure.

A Highly Integrated PCB Embedded GaN Full-Bridge Module With Ultralow Parasitic Inductance

Abstract: To fully take the high-frequency advantage of gallium nitride (GaN) devices, this article presents a face-up integrated power module based on the printed circuit board embedding technology to tackle the challenges caused by the conventional discrete solutions. The proposed GaN module highly integrates a GaN-bare-dies-based full bridge, driving circuits, and decoupling capacitors, in which the advanced bismaleimide-triazine material is used as the packaging material and the copper-filled laser microvias are used for low-parasitic-inductance and high-thermal-conductivity interconnection. Careful electro-thermal codesign and optimization of power loop is conducted to make the tradeoff between power loop inductance and thermal performance. The proposed full bridge power module achieves the lowest power loop inductance of about 0.305 nH in power modules with the same power level. The maximum thermal resistances from the embedded GaN bare dies to top and bottom surface are 3.39 and 0.42 °C/W, respectively. Benefitting from the ultralow power loop parasitic inductances, the switching speed of GaN devices reaches to 57.5 V/ns, while the voltage overshoot is not higher than 5.35% of the dc bus voltage. The superior performance of the proposed integrated GaN module makes it a promising application prospect in high frequency high power density converters.

A Second Harmonic Current Suppressing Method Based on Negative-Order Capacitor

Abstract: In microgrid system, current in dc bus may contain a lot of undesired low-order harmonics when converters are employed, especially the second harmonic current (SHC). To address the issue, this article proposes a method based on fractional-order capacitor (FOC) to suppress the SHC. The FOC, of which the order α is “−1,” has the same characteristics of dc blocking and ac conducting as conventional capacitor; while it can resonate with a conventional capacitor like an inductor, which could be called a negative-order capacitor (NOC) as well. The proposed circuit has good SHC suppression performance, faster dynamic response, and soft switching realization. It parallels on the dc side of an inverter instead of the large bus capacitor, increasing power density and reducing design cost and loss.The secondary power will only circuit between the ac side of inverter and the NOC circuit. In addition, the NOC circuit can adjust zero impedance to specific harmonics; so it can be expanded to suppress harmonic current at other frequencies in the system. The simulation and experimental results are presented to validate the feasibility of the proposed method.

A Single-Stage Electrolytic Capacitor-Less EV Charger With Single- and Three-Phase Compatibility

Abstract: This article proposes a modular single-stage electrolytic capacitor-less electric vehicles charger with single and three-phase grid compatibility. The proposed single-stage structure inherently maintains dc charging current for three-phase grid. For single-phase grid, a phase module is reconfigured to operate as a power decoupling circuit, making battery current to be dc. Furthermore, the proposed single-stage on-board charger is able to achieve zero voltage switching under wide grid and battery voltage ranges with only one control variable of phase shift angle. A balancing control method is proposed to ensure pure dc battery charging under unbalanced grid conditions. An optimized design of the planar core with Litz wire for achieving low profile is presented. Finally, a 11-kW prototype of the proposed charger achieved a power density of 5.25 kW/L and demonstrated 97.01% peak efficiency.

Direct Sliding Mode Control for Dynamic Instabilities in DC-Link Voltage of Standalone Photovoltaic Systems with a Small Capacitor

Abstract: Large electrolytic capacitors used in grid-connected and stand-alone photovoltaic (PV) applications for power decoupling purposes are unreliable because of their short lifetime. Film capacitors can be used instead of electrolytic capacitors if the energy storage requirement of the power conditioning units (PCUs) is reduced, since they offer better reliability and have a longer lifetime. Film capacitors have a lower capacitance than electrolytic capacitors, causing enormous frequency ripples on the DC-link voltage and affecting the standalone photovoltaic system’s dynamic performance. This research provided novel direct sliding mode controllers (DSMCs) for minimizing DC-link capacitor, regulating various components of the PV/BES system that assists to manage the DC-link voltage with a small capacitor. DSMCs were combined with the perturb and observe (P&O) method for DC boost converters to increase the photovoltaic system’s dynamic performance, and regulate the battery’s bidirectional converter (BDC) to overcome the DC-link voltage instabilities caused via a lower DC-link capacitor. The system is intended to power both AC and DC loads in places without grid connection. The system’s functions are divided into four modes, dependent on energy supply and demand, and the battery’s state of charge. The findings illustrate the controllers’ durability and the system’s outstanding performance. The testing was carried out on the MT real-time control platform NI PXIE-1071 utilizing Hardware-In-The-Loop experiments and MATLAB/Simulink.

A Dual-DC Output Three-Phase Three-Level AC–DC Converter for Low-Frequency Pulsed Power Decoupling Applications

Abstract: A dual-dc output three-phase three-level ac–dc converter is proposed for low-frequency pulsed power decoupling applications. One of the dc output is connected to the dc pulsed load, whereas the other one is used as power decoupling port and connected to the decoupling capacitor. The voltage of the power decoupling dc port can vary in a wide range to reduce the value and volume of the power decoupling capacitor. A buck/boost converter is employed to interface the power decoupling port with the dc pulsed load. A modified space vector pulsewidth modulation strategy is proposed for the ac–dc converter, based on which independent voltage and power regulation of the two dc outputs is achieved. The steady-state power is directly fed to the dc load with single power conversion stage, and the low frequency pulse power is fed to the power decoupling port. As a result, high-power quality and efficient power decoupling with reduced power conversion stages are achieved. Operation principles, modulation, and control strategies of the ac–dc converter are analyzed in detail. A prototype is built and tested to verify the effectiveness and feasibility of the proposed ac–dc converter for pulsed load.

Partial Power Processing for Power Decoupling Network in Three-Phase Three-Leg Four-Wire Three-Level T-Type Inverter With Reduced Split DC-Bus Capacitance

Abstract: The three-phase three-leg four-wire (3P3L4W) three-level (3L) inverter demands large split dc-bus capacitors for limiting the voltage ripple resulting from the neutral current, which mainly pulsates at the fundamental output frequency, and the midpoint current, which mainly pulsates at triple the output frequency. This article embeds a power decoupling network (PDN) in the basic 3P3L4W 3L inverter for reducing the split dc-bus capacitance. To curb excessive power losses, partial power processing is proposed to make the PDN partially bypass the neutral current and the midpoint current, such that the split dc-bus capacitance could be reduced at the expense of affordable power losses. Finally, a 10-kVA PDN embedded 3P3L4W 3L T-type inverter is built and tested in the laboratory, and experimental results are presented to verify the feasibility of the proposed work.

Distributed Neural Network Observer for Submodule Capacitor Voltage Estimation in Modular Multilevel Converters

Abstract: Modular multilevel converters (MMCs) have become one of the most popular power converters for medium/high-power transmission systems and motor drive applications. Standard control schemes for MMCs use a voltage measurement per submodule (SM) to balance the capacitor voltages and govern the MMC. Consequently, the control system requires a significant amount of sensors and the effective communication of sensitive data under relevant electromagnetic interference (EMI), impacting the reliability and cost of the MMC. This work presents a distributed neural network (DNN) observer inspired by a general predictor-corrector structure for estimating the capacitor voltages at each SM. The proposed observer predicts each SM capacitor voltage using a standard average model. Then, each prediction is corrected and denoised by a neural network of reduced computational complexity. As a result, the proposed observer reduces the number of required voltage sensors per arm to only one and filters the high-frequency noise without noticeable delay in the estimated SM capacitor voltages for both transient and steady-state operations. Experiments conducted in a three-phase MMC with 24 SMs confirm the effectiveness of the proposed DNN observer.

Novel Control Scheme for Five-Level Hybrid Flying-Capacitor Inverters Without DC-Link Balancing Circuits

Abstract: In this article, a novel control scheme for five-level hybrid flying-capacitor inverters is proposed, which can balance the neutral-point voltages across split dc-link capacitors and simultaneously regulate the flying-capacitor voltages.Each capacitor voltage is maintained by regulating the currents that flow through the dc-link neutral points and the flying capacitors. The key components affecting these currents are analyzed to construct a control scheme based on the injection of zero-sequence voltage to the modulation voltage reference.This technique eliminates the need for the auxiliary balancing circuit, which was previously used in the conventional operating schemes to regulate the dc-link capacitor voltages and, thus, reduces the device count and converter volume. The effectiveness of the proposed method for maintaining the capacitor voltages within the allowable range has been verified under various operating conditions through the simulation and experimental results.

A Real-Time Estimator for Capacitor Voltages in the Flying Capacitor Multilevel Converter

Abstract: This work presents a practical method for estimating the flying capacitor voltages in flying capacitor multilevel (FCML) converters in real-time via direct measurements of only the input voltage and switched node voltage. The proposed technique greatly simplifies the circuitry required to sense flying capacitor voltages. The estimator is designed to run under variable operating points and to be compatible with arbitrary modulation strategies, making it highly suitable for feedback control of the flying capacitor voltages. We analyze the observability under practical sampling constraints, and present a real-time implementation on a commercial digital signal processor.

Functional Interposer Embedded with Multi-Terminal Si Capacitor for 2.5D/3D Applications Using Planarization and Bumpless Chip-on-Wafer (COW)

Abstract: A multi-terminal Si capacitor with low equivalent series inductance (ESL) for power delivery systems in 2.5D/3D applications was demonstrated. The shortest parallel interconnects with a length of 20 μm from a power delivery network of RDL to the capacitor were successfully fabricated, in a 3D functional interposer, a Si capacitor is connected through Cu pads and through silicon vias (TSVs) formed by a bumpless Chip-on-Wafer (COW) process. By optimizing the capacitor direct-stack process with an adhesive curing profile and a TSV profile hy dry etching, 700 TSV connections with no open failures were achieved.

A Robust Testing Method for DC and AC Capacitors With Minimum Required Power Supply

Abstract: This letter proposes a testing method to emulate realistic stress conditions of dc and ac capacitors, with minimum required power supply and robust operation at the presence of capacitor degradation. It is especially suitable for parameter characterization and accelerated degradation testing of high-voltage and high-ripple current power electronic capacitors. The circuit architecture of the proposed testing method and the constraints of the testing samples under given designs are discussed. Proof-of-concept experiments on both dc and ac capacitors verify the feasibility.

Minimizing the Number of X/Y Capacitors in an Autonomous Emergency Brake System Using the BPSO Algorithm

Abstract: This article proposes an efficient model to reduce the conducted emission in a motor-driven autonomous emergency braking system. Many X/Y decoupling capacitors have been employed in this system to repress the switching noises, which is a very important consideration for the reliability/safety of the system. However, the locations of the decoupling capacitors, have basically been determined, thus, far by trial and error. The proposed model, in this article, consists of a circuit of the permanent magnet synchronous motor-driven braking system which is combined with electromagnetic simulation models, and the whole models are integrated into a SPICE simulator. The effect of decoupling capacitors was analyzed, and a binary particle swarm optimization algorithm was applied to determine the most effective decoupling capacitor locations to minimize the number of capacitors in the system. An automation program with the optimization algorithm was developed using Python language. The optimized results showed the number of decoupling capacitors could be reduced from 36 to 28 in the specific motor-driven autonomous emergency braking system while still satisfying the electromagnetic interference specification of automaker requirements, which validates the effectiveness of the proposed methodology.

Capacitor Technologies: Characterization, Selection, and Packaging for Next-Generation Power Electronics Applications

Abstract: DC-bus capacitors take up substantial space in an electric vehicle (EV) traction inverter, limiting the traction drive’s volumetric power density. Film capacitors are typically used, but other capacitor technologies with higher energy densities can help reduce the overall size. In this article, several commercial capacitor technologies are considered for use as dc-bus capacitors for EV traction inverters. They are characterized, evaluated, and compared for optimized design for volume reduction. This article also proposes a novel capacitor packaging technique that utilizes symmetrically distant parallel capacitor branches from termination, which improves electrical and thermal performance compared to a traditional flat-printed circuit board-based design. The proposed design was prototyped for a 100-kW traction inverter, and then, the thermal and electrical characteristics were evaluated under various operating conditions. Results show that the proposed symmetrical design has 40% lower layout inductance and 80% lower temperature difference than a traditional package among the parallel capacitor branches.

Capacitor Condition Monitoring for the Low-Capacitance StatCom: An Online Approach

Abstract: The cascaded H-bridge low-capacitance static compensator (LC-StatCom) uses relatively small capacitors subjected to large voltage oscillations. When a capacitor degrades, its capacitance differs from the nominal value, and this deteriorates the StatCom operation and safety. This is an important reason to monitor the capacitors condition in StatComs. This letter presents a detailed analysis of the capacitor voltage oscillations and their dependence on the capacitance values. The analysis allows monitoring the condition of the capacitors using a closed-loop approach that feedbacks the error in voltage oscillations. The proposed method is a hardware-free online solution for capacitor condition monitoring (CCM) in LC-StatComs. The letter presents simulation and experimental results that corroborate the effectiveness of the proposed CCM loop.

Low-Frequency Voltage Ripples Decoupling With Switched-Capacitor Conversion for an MMC-Based SST

Abstract: The modular multilevel converter based solid state transformer (MMC-SST) is characterized by a large number of switches and large-size submodule (SM) capacitors, complex system control schemes. In this article, a novel high-frequency link (HFL) interconnection scheme based on MMC-SST (MHFL-SST) is proposed. All the SM capacitors are connected to the common bus (CB) through the full bridges triggered by the same driver signals, operating as a switched-capacitor conversion. The low frequency currents of SMs are decoupled on the CB; thus, the SM capacitance value can be reduced significantly and the circulating currents are also suppressed substantially. Furthermore, the voltages of all SM capacitors are always clamped with each other to be the same due to the switched-capacitor circuits. The bidirectional power conversion of the low voltage dc bus is implemented by phase shift control between a multiplexed H-bridge cell and the CB. The parameter constraint of the switched-capacitor loop circuit and the closed-loop control scheme for MHFL-SST are also carried out. The correctness and effectiveness of the proposed scheme are verified by simulations and experiments.

A novel compensation power‐decoupling strategy for single‐phase three‐level flying capacitor PV micro‐inverters

Abstract: The traditional power‐decoupling controller for single‐phase photovoltaic (PV) micro‐inverters suffers from complex control structure, complicated parameter design and poor stability. In this paper, a novel compensation power‐decoupling strategy is proposed for a single‐phase three‐level flying capacitor PV micro‐inverter. The proposed strategy is aimed at tackling the problem of unbalanced charging and discharging of the flying capacitor, and hence makes the micro‐inverter highly stable and reliable. First, the topology and operating principle of the studied micro‐inverter are discussed, followed by the mathematical models established. Afterwards, the state‐space equations of the micro‐inverter are established for all the operating states, of which two transition variables are introduced to realize a linear presentation. On this basis, a double closed‐loop control method is designed to regulate the DC‐link voltage and current. Meanwhile, the flying capacitor voltage is controlled in a closed‐loop form to do the job of a power pulsating buffer (PPB). Following this, the proposed compensation power‐decoupling strategy is elaborated. Finally, some experimental results are presented to indicate the high performance of the studied micro‐inverter and verify the effectiveness of the proposed strategy.

A Traveling Wave Based Method for Protection of Shunt Capacitor Bank

Abstract: This paper proposes a traveling wave based scheme for wye-connected shunt capacitor bank protection. The proposed method provides high sensitivity and fast response, assisting in mitigating capacitor damage during internal cascading failure. The available protection schemes for capacitor bank use RMS values of voltage and current phasors for trip decision. Threshold selection is required in these methods which needs accurate estimation of equivalent capacitance of the bank. In addition, phasor being estimated from one-cycle running data window, such a method is slow. The proposed traveling wave based method identifies an internal fault in case of opposite polarities of traveling waves seen in the terminal voltage and current signals of the faulted phase. If the mid-point tapping is available in capacitor bank, the faulted half can be identified using the traveling wave of tap voltage. The magnitude of the traveling wave in terminal voltage reveals the number of failed capacitor elements. Such information assists in expediting maintenance. The performance of the proposed method is tested using PSCAD/EMTDC simulation data for various situations, including internal short circuit, external, and identical faults in the shunt capacitor bank. Comparative analysis highlights its higher sensitivity and better accuracy in comparison to available protection methods.

A Heterogeneously Integrated Double-Sided Cooling Silicon Carbide Power Module

Abstract: A novel half-bridge silicon carbide (SiC) double-sided cooling power module with integrated gate drivers, decoupling capacitors (C dec ), temperature sensors, and a current sensor is proposed. 45-degree vertical connection blocks to provide maximum heat dissipation path were proposed. It electrically connects the bottom to the top direct bond copper (DBC) substrate to complete the half-bridge assembly. A low temperature co-fired ceramic (LTCC) based interposer providing mechanical strength between the two substrates and electrical isolation is used. The gate driver die integrated inside the module is a non-isolated single-channel driver with a variable drive strength control feature that can safely operate up to 175ºC. Giant magnetoresistance (GMR) based current measurement solution is implemented, which is contactless and can measure both AC and DC current. A multi-layer LTCC or printed circuit board (PCB) based AC power terminal is proposed to integrate the GMR sensor into the module. The power loop inductance of this highly integrated power module is 1.5 nH. The thermal resistance of this power module package is only 0.06 K/W. This work seeks to overcome the volumetric power density limitations of conventional packaging technologies.

Review of the designs in low inductance SiC half‐bridge packaging

Abstract: Silicon carbide (SiC) device has become the primary choice for high-efficiency power electronic equipment due to its excellent performance. However, its higher switching frequency and faster switching speed have also incurred new challenges, such as low parasitic inductance packaging. Despite a significant amount of literature to overview the low parasitic inductance packages, most of them focus on total parasitic inductance from different packaging technology. Here, from the viewpoint of partial inductance which includes gate loop, power loop and common source, the designs for different inductances are surveyed. The power loop is further discussed from power terminals, bonding wires and direct bonded copper (DBC) conductor traces. The effects and sources of these inductances are analyzed. Furthermore, the typical design solutions to reduce the inductances are summarized. Finally, the challenges of SiC packages are presented.

Comparative Efficiency Analysis between a Conventional Single-Phase Inverter and an Inverter with a Minimalist Active Power Decoupling Circuit

Abstract: This paper focuses on a comparative analysis between the conventional single-phase H-bridge inverter and an inverter implementing a minimalist active power decoupling method, which is used to eliminate the power ripple of twice the fundamental frequency at the DC link. This method allows minimising the need for large electrolytic DC link capacitors, with only two smaller film capacitors being required on the hardware side. The implemented 1 kW inverter makes use of silicon carbide (SiC) MOSFETs, offering the main advantage of high switching frequencies, reduced size, and improved efficiency. The performance analysis, including switching and conduction losses and the inverter efficiency, is done through the results obtained from simulations and experiments.

Decoupling Capacitor Minimization of an MMC-Based Photovoltaic System With Three-Winding Power Channel

Abstract: This article proposed a grid-connected photovoltaic (PV) converter based on modular multilevel converter (MMC), which can realize long-distance dc transmission while realizing the local consumption of PV. In addition to the advantage that there is no PV power mismatch between the upper and lower arms, the isolation transformer couples the two submodules of the upper and lower arms on a three-port transformer, and the differential-mode components of the capacitor voltage ripples in the upper and lower arms can be canceled between each other. Besides, through the double fundamental frequency circulating current control, the power exchange among MMC phase units can be realized, thereby eliminating the common-mode component of the capacitor voltage ripple. Through the combination of topology and control strategy, the low-frequency components of the voltage ripple can be completely canceled. Since the decoupling capacitance is reduced dozens of times, the volume and cost of the system are significantly reduced. Therefore, the life and reliability of the system are increased. Simulation and experimental results verify the effectiveness of the proposed topology and its control strategy.

Research on High Efficiency and High Density 48 V-5 V Multi-Resonant Switched Capacitor Converter

Abstract: Multi-resonant switched capacitor converter can make efficient use of active and passive components, and has two characteristics of high efficiency and highly power density. Therefore, we propose a 9:1 cascaded multi-resonant switched capacitor converter and further explore ways to improve the performance of the converter in this paper. On the one hand, by analyzing the coupling relationship between the first and second circuit topology, we propose a method to reduce the intermediate decoupling capacitance. On the other hand, by adjusting the dead time of the control signal, the zero-voltage switch (ZVS) of most switching devices is realized, and the efficiency of the converter is improved. Therefore, a 48 V-5 V resonant converter prototype with rated power of 120 W, power density of 330 W/in3, peak efficiency of 98.1% and maximum output current of 23.7 A is designed in this paper. From 20% to full load, the efficiency is always maintained at more than 92% (including driving loss), and most of the loss is reflected in the conduction path, reflecting great optimal space and application potential.

Investigation of Leakage Current in Micro M-I-M Structure Using Multilayer High-K Dielectric Materials with COMSOL Multiphysics

Abstract: Micro Metal-Insulator-Metal (M-I-M) capacitor structures are well-known passive components that have been broadly used in integrated circuits, Radio Frequency (RF) decoupling, Micro Electro Mechanical Systems (MEMS) sensors, and health monitoring systems. Thanks to its small dimensions, it can be easily integrated into microelectronics. With the acceleration of the scalling dawn of integrated circuits and systems, the size of the capacitor and other components must be reduced. It has become challenging to fabricate a micro M-I-M capacitor with low leakage current and high-capacity density since the leakage current and depletion effect are reported as the main factors of the gradual loss of electrical energy in the micro-M-I-M capacitor. Thus, minimizing the leakage current and the depletion effect became a new research trend. This paper presents a penta-layer high-K dielectric between the electrodes to reduce the leakage current in the micro-M-I-M capacitor. For this purpose, various dielectric materials were investigated. It was found that niobium pentaoxide (Nb2O5) and hafnium dioxide (HfO2) as penta-layer dielectric materials provide the lowest leakage current between the two electrodes. The recorded values of leakage current density are reduced to a mere 0.95 µAmps/mm2 from several µAmps/mm2 at the operating voltage of 1 V. The reported micro-M-I-M capacitor has potential application as an energy storage device.

Single‐phase small capacitor motor drive system with high‐efficiency buck active power decoupling converter

Abstract: This paper proposes a novel active power decoupling circuit (APDC) based on modified Buck converter to reduce the DC-link voltage ripple of small capacitor motor drive systems. The APDC is placed between the Boost PFC circuit and the DC-link, and has two energy flow paths, and the sum of the power decoupling capacitor and the DC-link capacitor voltage equals to the output voltage of the Boost converter. With these configurations, the voltage of the decoupling capacitor can be precisely controlled to be the same as the AC component of the output voltage of the Boost converter, thereby effectively reducing the DC-link voltage ripple. Another unique feature of the proposed APDC is that the inductor works in discontinuous current mode and only work for half of the time, which not only reduces the current stress of power switches, but also further improves the efficiency of the proposed APDC. Then, an instantaneous voltage control method is investigated to reduce the DC-link voltage drop, which significantly improve the dynamic performance of the motor. The design guideline of key components is given in detail. The feasibility of the small capacitor motor drive system based on the proposed APDC is verified by experimental results.