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Showing papers on "Degree of parallelism published in 1982"


Proceedings ArticleDOI
29 Mar 1982
TL;DR: This work expands this idea to parallel readers and writers on numerical data types, proving that under certain conditions the result of such concurrent operations is consistent in the sense that it is equal to some serial schedule.
Abstract: In many large database applications there are certain elements mostly containing aggregate information, which are very frequently referred to (read and modified) by many transactions. If access to such fields has to obey to conventional two-phase lock protocols (1,2), transactions will be serialized in front of these "hot spots", i.e. the degree of parallelism is reduced. To avoid this kind of lock contention some improved lock protocols have been proposed, the most interesting of which is the one implemented in IMS Fast Path (3,4), where add and subtract may be performed concurrently on numerical fields, since backout is always possible with the unique inverse of each operand. A similar scheme is proposed in (10). We expand this idea to parallel readers and writers on numerical data types, proving that under certain conditions the result of such concurrent operations is consistent in the sense that it is equal to some serial schedule (2,5).

71 citations


Book ChapterDOI
01 Jan 1982
TL;DR: The picture processing approach is investigated by defining a set of operations which acts on the image as a whole which provides an efficient conceptual framework for picture processing tasks and allows them to be implemented in computer hardware architectures employing a high degree of parallelism thus eliminating the costs of iteration.
Abstract: The serial nature of conventional computers seems to restrict or, at least, obscure their usefulness as image or picture processors Since each computer instruction typically affects only one or two pieces of data, manipulations of an entire image must be accomplished through explicit iteration which costs heavily in both time and conceptual distraction The picture processing approach we are investigating avoids these problems by defining a set of operations which acts on the image as a whole This provides an efficient conceptual framework for picture processing tasks In addition, the cellular nature of these operations allows them to be implemented in computer hardware architectures employing a high degree of parallelism thus eliminating the costs of iteration To describe this type of picture processing computer we have coined the term “cytocomputer” after the Greek “cyto” which means “cell” A first generation cytocomputer has been developed at the Environmental Research Institute of Michigan (ERIM)

62 citations


ReportDOI
18 Aug 1982
TL;DR: The Traveling Salesman Problem is solved on the Cm*, a multiprocessor system, using two implementations based on a branch and bound algorithm, one of which is synchronous and has a granularity that increases wit the degree of parallelism, while the other is asynchronous and have a constant granularity.
Abstract: : The Traveling Salesman Problem is solved on the Cm*, a multiprocessor system, using two implementations based on a branch and bound algorithm. One of these implementations is synchronous and has a granularity that increases wit the degree of parallelism, while the other is asynchronous and has a constant granularity. With increasing degree of parallelism, the first implementation requires increasing amount of computation to solve the problem, leading to a speedup that saturates at a low value. The second implementation requires nearly the same amount computation at all degrees of parallelism and has reasonable speedup characteristic. The difference between the speedup of this implementation and linear speedup is attributed to processors idling because of resource contention.

24 citations


Journal ArticleDOI
TL;DR: Two examples of highly parallel and practical codes are presented, which illustrate the compactness of code and the close relationship between the mathematical description of the problem and the FORTRAN implementation.

6 citations



01 Aug 1982
TL;DR: The microeclipse microprocessor, incorporating a high degree of parallelism to achieve big system performance and capability, has been achieved in the Microcomputer arena.
Abstract: When manufacturers try to eclipse one another in the Microcomputer arena, some novel architectural schemes evolve; for example, incorporating a high degree of parallelism to achieve big system performance and capability. This has been achieved in the microeclipse microprocessor which is examined in this article.

3 citations