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Degree of parallelism

About: Degree of parallelism is a research topic. Over the lifetime, 1515 publications have been published within this topic receiving 25546 citations.


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Book ChapterDOI
26 Aug 2008
TL;DR: This work uses High-Level Petri Nets (HLPN) to intuitively describe the parallel implementations for distributed- memory machines and identifies parallel functions that can be implemented efficiently on the GPU.
Abstract: Modern Graphics Processing Units (GPUs) consist of several SIMD-processors and thus provide a high degree of parallelism at low cost. We introduce a new approach to systematically develop parallel image reconstruction algorithms for GPUs from their parallel equivalents for distributed-memory machines. We use High-Level Petri Nets (HLPN) to intuitively describe the parallel implementations for distributed- memory machines. By denoting the functions of the HLPN with memory requirements and information about data distribution, we are able to identify parallel functions that can be implemented efficiently on the GPU. For an important iterative medical image reconstruction algorithm --the list-mode OSEM algorithm--we demonstrate the limitations of its distributed-memory implementation and show how our HLPN-based approach leads to a fast implementation on GPUs, reusable across different medical imaging devices.

3 citations

Proceedings ArticleDOI
01 Sep 2017
TL;DR: An efficient scheduler that calculates the optimal number of cores required to schedule an application, gives a heuristic scheduling solution and evaluates its cost is described and compared with Preesm scheduler results and it is proved that the proposed scheduler achieves better scheduling in terms of latency andnumber of cores.
Abstract: Over these last years, the number of cores witnessed a spectacular increase in digital signal and general use processors. Concurrently, significant researches are done to get benefit from the high degree of parallelism. Indeed, these researches are focused to provide an efficient scheduling from hardware/software systems to multicores architecture. The scheduling process consists on statically choose one core to execute one task and to specify an execution order for the application tasks. In this paper, we describe an efficient scheduler that calculates the optimal number of cores required to schedule an application, gives a heuristic scheduling solution and evaluates its cost. Our proposal results are evaluated and compared with Preesm scheduler results and we prove that ours achieves better scheduling in terms of latency and number of cores.

3 citations

Patent
05 Aug 1998
TL;DR: In this article, generalized base hypercube transformations are applied to factorizations of generalized spectral analysis transformation matrices, and in particular to Generalized Walsh-Chrestenson transformation matrix of which the Discrete Fourier transform is but a special case.
Abstract: General base hypercube transformations using general base perfect shuffles and Kronecker matrix products are applied to the problem of parallel, to massively parallel processing of sparse matrices. The approach is illustrated by applying the hypercube transformations to general base factorizations of generalized spectral analysis transformation matrices. Hypercube transformations lead to optimal scheduling with contention-free memory allocation at any level of parallelism and up to massive parallelism. The approach is illustrated by applying the generalized-parallelism hypercube transformations to factorizations of generalized spectral analysis transformation matrices, and in particular to Generalized Walsh-Chrestenson transformation matrices of which the Discrete Fourier transform and hence the Fast Fourier transform are but a special case. These factorizations are a function of four variables, namely, the general base p, the number of members of the class of matrices n, a parameter k describing the matrix structure and the number M of parallel processing elements. The degree of parallelism, in the form of M=pm processors can be chosen arbitrarily by varying m between zero to its maximum value of n−1. The result is an equation describing the solution as a function of the four variables n, p, k and m.

2 citations

Patent
02 Apr 2008
TL;DR: In this article, the authors propose to perform parallel I/offline I/O with the expected degree of parallelism while temporarily securing the necessary number of O/O nodes.
Abstract: PROBLEM TO BE SOLVED: To perform parallel I/O with the expected degree of parallelism while temporarily securing the necessary number of I/O nodes even when a job for executing the parallel I/O does not own enough I/O nodes to obtain the expected degree of parallelism when the parallel I/O is started. SOLUTION: When starting the job, enough I/O nodes to perform parallel I/O with the expected degree of parallelism are not secured but only a small number of I/O nodes are secured. When the parallel I/O is started, nodes in short supply are selected by an I/O node security/release part for the parallel I/O and an I/O node group change part from the I/O node for a normal I/O group owned by the other job to temporarily snatch from another job being executed. Also, by an I/O node management table and a job management table, information about the I/O nodes snatched and that about the job from which nodes are snatched are simultaneously managed. For the purpose, I/O nodes are grouped. COPYRIGHT: (C)2011,JPO&INPIT

2 citations

Journal ArticleDOI
TL;DR: A MapReduce algorithm—data aware scalable clustering (DASC), which is capable of handling the 3 Vs of big data by virtue of being single scan and distributed to handle Volume, incremental to cope with Velocity and versatile in handling numeric and categorical data to accommodate Variety is presented.
Abstract: Emergence of MapReduce (MR) framework for scaling data mining and machine learning algorithms provides for Volume, while handling of Variety and Velocity needs to be skilfully crafted in algorithms. So far, scalable clustering algorithms have focused solely on Volume, taking advantage of the MR framework. In this paper we present a MapReduce algorithm--data aware scalable clustering (DASC), which is capable of handling the 3 Vs of big data by virtue of being (i) single scan and distributed to handle Volume, (ii) incremental to cope with Velocity and (iii) versatile in handling numeric and categorical data to accommodate Variety. DASC algorithm incrementally processes infinitely growing data set stored on distributed file system and delivers quality clustering scheme while ensuring recency of patterns. The up-to-date synopsis is preserved by the algorithm for the data seen so far. Each new data increment is processed and merged with the synopsis. Since the synopsis itself may grow very large in size, the algorithm stores it as a file. This makes DASC algorithm truly scalable. Exclusive clusters are obtained on demand by applying connected component analysis (CCA) algorithm over the synopsis. CCA presents subtle roadblock to effective parallelism during clustering. This problem is overcome by accomplishing the task in two stages. In the first stage, hyperclusters are identified based on prevailing data characteristics. The second stage utilizes this knowledge to determine the degree of parallelism, thereby making DASC data aware. Hyperclusters are distributed over the available compute nodes for discovering embedded clusters in parallel. Staged approach for clustering yields dual advantage of improved parallelism and desired complexity in $$\mathcal {MRC}^0$$MRC0 class. DASC algorithm is empirically compared with incremental Kmeans and Scalable Kmeans++ algorithms. Experimentation on real-world and synthetic data with approximately 1.2 billion data points demonstrates effectiveness of DASC algorithm. Empirical observations of DASC execution are in consonance with the theoretical analysis with respect to stability in resources utilization and execution time.

2 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20221
202147
202048
201952
201870
201775