Showing papers on "Depletion region published in 1969"

Current gain and cutoff frequency falloff at high currents

Abstract: A theoretical and experimental study of the effects of high-level injection of carriers into a reverse-biased collector-base junction has been performed. Two models which describe the high-current behavior of the junction space-charge region are discussed. The first deals with the formation of a current-induced base region at space-charge-limited current densities. The second model assumes that two-dimensional effects are predominant; at current densities corresponding to the onset of space-charge-limited current, lateral injection of carriers takes place. These phenomena were studied experimentally using silicon double-diffused transistor structures. The existence of space-charge-limited current in the reverse-biased collector depletion layer manifests itself in significant changes in the ac and dc parameters of the transistor. In particular, it is shown that the cutoff frequency (f T ) and large-signal current gain (h FE ) begin to decrease rapidly with increasing current at the onset of the space-charge limitation. A comparison of experimental results with predictions of the above theories indicates that, while both the formation of a current-induced base region and lateral injection do take place, the latter mechanism controls conventional device performance.

A technique for directly plotting the inverse doping profile of semiconductor wafers

Abstract: A new technique for plotting doping profiles of semiconductor wafers is described. This technique involves driving a Schottky diode deposited on the surface with a small constant RF current (a few hundred microamperes at 5 MHz). The depth of the depletion layer is varied by changing the dc bias, but this is the only role of the dc voltage. The inverse doping profile n-1(x) is obtained by monitoring the voltage across the diode at the fundamental frequency, which is proportional to the depth x, and the second harmonic voltage, which is proportional to n-1. This type of plotter has the advantages of simplicity, high resolution (limited only by the Debye length in most cases), immediate results, and economy.

Surface State and Interface Effects on the Capacitance‐Voltage Relationship in Schottky Barriers

Abstract: In the presence of an interfacial layer and semiconductor surface states, a Schottky barrier height φb decreases with increasing electric field E at the surface of the semiconductor. If the semiconductor doping concentration Nd is uniform throughout the depletion region and if [ (qNd/e) (dφb/dE)−E] [ (d2φb/dE2) (dE/dV) ]≪1, where V is the applied voltage and e is the semiconductor permittivity, the slope of the (capacitance)−2 vs voltage relationship is constant and can be interpreted to give Nd. The voltage intercept of the relationship yields an apparent barrier height φa related to the true barrier φb by φa=φb−E (dφb/dE) + (qNd/2e) (dφb/dE)2, where q is the electron charge. From the measured variation of φa with Nd and one absolute measure of φb at one value of Nd, φb(E), and dφb(E)/dE may be deduced. From dφb(E)/dE the surface state density as a function of energy in the bandgap and the minimum value of interface thickness divided by relative interface permittivity can be obtained. Using the data of Archer and Atalla for vacuum cleaved Au‐Si diodes to illustrate our method, the surface state density is found to peak at a value of ∼2×1014 cm−2·eV−1 at about 0.83 below the conduction band and the minimum value of interface thickness divided by relative dielectric constant is found to be of the order of 5 A. Criteria are given which show how Schottky diode capacitance‐voltage data may be further used, in conjunction with photoelectric barrier measurements, to detect the presence of deep lying impurities or the penetration of surface state charge into the body of the semiconductor.

Non-equilibrium C-V and I-V characteristics of metal-insulator-semiconductor capacitors

Abstract: The C-V characteristics of metal-insulator-semiconductor (MIS) structures exhibit considerable departure from their quasi-equilibrium behavior under the application of large depleting voltages. The deviation is the result of d.c. current flowing through the insulator, so that steady state non-equilibrium conditions exist in the semiconductor. The primary effects are a lowering of the high frequency capacitance below its quasi-equilibrium minimum value C ∞ , a deviation of the I-V characteristics of the structure from those of the insulator and the development of a large voltage drop across the semiconductor. The low and high frequency capacitances coincide in this non-equilibrium range. The non-equilibrium properties have been observed for deposited films of Si 3 N 4 , SiO 2 , and Al 2 O 3 . Experimental data are presented for films of pyrolytically deposited Si 3 N 4 on p - and n -type silicon substrates, in the dark and for various levels of illumination. A model is developed in which current in the semiconductor occurs through the generation of carriers in the depletion region, and bulk diffusion of carriers in the case of illumination, and where the insulator current proceeds through the Poole-Frenkel mechanism. Agreement between theory and experiment is obtained, and the possible use of the non-equilibrium effect in determining the minority carrier lifetime of the substrate is indicated.

Low‐temperature high‐frequency capacitance measurements of deep‐and shallow‐level impurity center concentrations

Abstract: A simple method is proposed and demonstrated for the determination of a minute amount of deep‐level impurities in the transition region of p‐n junctions from the high‐frequency capacitance change when the junction temperature is lowered from room temperature to 77°K and the junction bias is switched to zero and back to the large reverse bias to set the charge trapped at these centers to the equilibrium value. Sensitivity of 1011 atoms/cm3 and 105 total atoms in the depletion layer is demonstrated in junction gettered by phosphorus glass. Examples are also given for Ni‐ and Audoped silicon diodes and transistors.

Kinetics of Red Luminescence in GaP

Abstract: A model is presented and analyzed which describes the recombination kinetics of red luminescence in GaP. The need for the model arose with the recent observation of a substantially different bias variation of red electroluminescent intensity, in GaP diodes (Zn–O doped p‐layers) produced by the liquid‐phase epitaxial (LPE) process. It was previously observed that at low bias the intensity varied as exp (qV/kT), and at high bias it varied as exp (qV/2kT). The LPE diodes show the same low‐level bias variation but at high biases the intensity varies as V (nonexponentially). Previous models for the recombination kinetics described the observed bias variations in terms of saturation of radiative recombination centers by electrons injected into the p‐type bulk (Nelson) and in the space charge region (Morgan) of the diodes. In the present model, which is essentially an extension of Nelson's, a parallel, nonsaturable route is added so that the electron lifetime can remain finite even though the radiative centers s...

AVALANCHE SHOCK FRONTS IN p‐n JUNCTIONS

Abstract: A new transient mode of avalanche breakdown in p‐n junctions is described. For sufficiently high current, a region of impact ionization of carriers advances as a shock front whose velocity can be several times faster than the carrier‐saturated drift velocity. Since the passing disturbance rapidly fills the depletion region with a dense plasma of holes and electrons, it has been used to interpret the observed high‐efficiency microwave oscillations of the trapped‐plasma ``TRAPATT'' mode. An approximate analysis is given, and compared with numerical calculations.

Surface depletion layer photodevice

Abstract: A semiconductor photodevice sensitive to blue light is produced by placing an oxide layer containing a selected surface state charge density over one surface of the device. The fixed surface state charge density creates a surface depletion region in the semiconductor material immediately underlying the oxide. Blue light incident on the device, which is normally absorbed before reaching the depletion region associated with a PN junction strikes the surface depletion layer and produces photocurrent therein.

Variable integrated coupler

Abstract: Described is an integrated circuit variable coupler utilizing metal oxide semiconductor (MOS) techniques, wherein the degree of coupling or capacitance of the coupler is a function of the size of the depletion region of a PN junction which can be varied by a voltage applied across a thin film resistor deposited on an oxide layer.

Boundary conditions for the space-charge region of a P-N-junction

Abstract: The purpose of this paper is to show that the controversy concerning the relation of the applied potential difference to the difference across the space-charge region of a P - N -junction is due to a neglect of the non-zero gradients of the electrochemical potentials. By incorporating these quantities and by a suitable modification of the Fletcher boundary conditions, the inconsistencies discovered by Van Vliet and Gummel can be removed.

Absorptionsspektroskopie angeregter Cäsiumatome

Abstract: Cesium atoms, enclosed in a glass vessel, are excited by a weak electrical discharge and irradiated by monochromatic light with wavelengths corresponding to the sharp, diffuse, and fundamental series. By light absorption, highly excited atoms are produced, which are ionized by electron collisions. These ions diffuse into the space charge region of a diode path, compensate partially the space charge, and increase the thermionic diode current.

Depletion layer and capacitance calculations for Gaussian diffused junctions

Abstract: Expressions are derived for the voltage dependence of the depletion layer width, the maximum electric field and the capacitance of Gaussian diffused plane, cylindrical and spherical p - n junctions. These are also shown in graphical form for junctions in silicon for a ratio of surface to background concentration covering the range 10 2 -10 7 . It is shown that the junctions can be considered to be either linearly graded or abrupt, depending on the voltage, with a transition range covering about 2 decades of voltage. Expressions are also given for the capacitance of rectangular and circular planar junctions and for an over depleted circular planar PIN diode.

Carrier Heating or Cooling in a Strong Built‐in Electric Field

Abstract: A recently published calculation for the effective carrier mobility in a semiconductor space charge region with a strong built‐in field is shown to lead to an unphysical result. A method for deriving the volt‐current characteristic for small perturbations from equilibrium is presented.

Minority Carrier Lifetime in GaP Electroluminescent Diodes

Abstract: Diffusion length of minority carriers in GaP EL, diodes was determined by measurements of diode photocurrent. Observations of angle-lapped diodes by scanning of electron beam and laser light enabled us to divide the sum of diffusion lengths into the diffusion lengths of electron and hole. Minority carrier lifetime in the space-charge region obtained from I-V characteristics is in reasonable agreement with that determined from photocurrent. The minority carrier lifetime is limited by deep recombination centers which are common in both the depletion layer and its adjacent regions. These centers were found to be annihilated by annealing. For diodes annealed under optimum conditions, the minority carrier lifetime varies proportionally to an inverse of the donor concentration of starting n type GaP crystals and is proportional to an inverse square of the free carrier concentration in the vicinity of the junction. These results suggest that an Auger process is predominant in the nonradiative recombination.

On the theory of logorithmic silicon diodes

Abstract: A logarithmic diode is defined as one showing a forward characteristic I α exp (eV/mkT) where the factor m is independent of voltage (though not necessarily of temperature) over at least four decades of current. Many commercial diodes show such a characteristic with m in the region of 1.5. It is shown that this behaviour cannot be explained by the theory of Sah, Noyce and Shockley and a modified theory is proposed, based on the assumption that the diode current is predominantly due to Shockley-Read-Hall traps non-uniformly distributed in the depletion layer. The theory is shown to be consistent with observed currentvoltage-temperature characteristics of a number of specimens.

Depletion layer calculations for error function diffused junctions

Abstract: Expressions are derived for the voltage dependance of the depletion layer width, the maximum electric field and the capacitance of error function diffused plane cylindrical and spherical p - n junctions. These are also shown in graphical form for junctions in silicon for ratios of surface to background concentration covering the range 10 2 -10 7 . It is shown that the junctions can be considered to be either linearly graded or abrupt with a transition range covering about 2 decades of voltage. The results obtained are very similar to those for gaussian diffused junctions.

High-voltage mos transistor method and apparatus

Abstract: An MIS FET device and method of making the same wherein a device of nominal topology is made capable of sustaining drain to source potentials substantially higher than the normal breakdown potentials of prior art devices. The present invention is constructed with linearly graded PN junctions and the diffusion profile, as related to the geometry of the gate, is such that the junction depletion layer will extend into the drain region to a point under the thick field oxide so that a critical electric field is not produced in the thin gate oxide causing rupture thereof.

Variable capacitance rectifying junction diode

Abstract: A variable capacitance diode comprising a super abrupt junction therein, said diode comprising a semiconductor wafer including a semiconductor region having a graded impurity concentration, and a metal layer deposited on one surface of said semiconductor region to form a surface barrier at said one surface of the semiconductor region.

Solid-state delay line

Abstract: A solid-state delay line is disclosed which includes a field effect transistor with a gate electrode which is considerably extended in the direction of the semiconductor current channel. Two DC voltage sources are connected to the source and drain electrodes and to the ends of the gate electrode, respectively, and cause currents to be adjusted such that the voltage drops per unit length in the semiconductor channel and in the gate electrode are equal. A uniform thickness of the charge carrier variation zone, i.e., a depletion zone or an enhancement zone, is obtained in the semiconductor channel and the delay of signals propagating through the semiconductor channel is proportional to the length of the extended gate electrode.

Depletion layer capacitor in particular for monolithic integrated circuits

Abstract: This is a depletion layer capacitor which can be simultaneously formed with other planar transistors on a monolithic integrated circuit. The depletion layer capacitor achieves a high voltage breakdown by producing a PN junction which joins two highly doped regions of opposite conductivity type wherein said junction is established within an epitaxial layer of lower impurity concentration and doesn''t extend to the surface of said epitaxial layer.

Pinched resistor semiconductor structure

Abstract: Pinched resistor semiconductor structure having a channel and a field plate to provide a depletion region which pinches off the channel so that the current flow remains constant for any voltage after a predetermined voltage is reached.

Electric Current in a Semiconductor Space‐Charge Region

Abstract: An equation for the electric current in a semiconductor space‐charge region such as a p‐n junction is derived. At low currents the equation has the usual form i=neμ*E−(q/e) μ*kTL∂n/∂x but the effective mobility μ* is shown to have a strong dependence on position and may be infinite or negative. This spatial dependence arises because the deviation of the average carrier energy from its equilibrium value has a first‐order dependence on the current.

Measurements on the depletion layer properties of planar diodes

Abstract: Experimental results are reported for the capacitance-voltage (C-V) relationships of square, circular and PIN planar diodes and for plane diodes. These results show the predicted influence of the curved regions of the junctions. Experimental values of the built in voltage also agree with theoretical values for diffused junctions. A sectioned planar diode was also examined using a scanning electron microscope to determine the movement of the depletion region under conditions of reverse bias. The results are in reasonable agreement with theoretical values.

Non-Equilibrium Surface Space Charge in Semiconductors for Arbitrary Ionization Degree of Impurities

Abstract: The theory of the surface space charge region has been generalized to the case of non-equilibrium conditions and arbitrary occupation of local centres within the band gap. The contribution of different local levels to the non-equilibrium surface charge has been analysed in detail. Non-equilibrium surface effects (capacitance, field-effect, barrier photovoltage) are calculated for the model considered which is often realized at low temperatures and in broad band gap semiconductors (GaAs, CdS etc.). [Russian Text Ignored]

Avalanche shock fronts in p-n junctions

Abstract: The conditions necessary for the formation of avalanche shock fronts, narrow layers of avalanche moving through a diode depletion layer faster than the carrier saturated drift velocity, are shown to be related to the large-signal limits ofR ead and more general avalanche transit time diode theory. Analysis of shock fronts by a simple analytic method has been usetdo interpret computer simulations of high efficiency microwave oscillator diodes. The oscillation mode, called the Trapatt mode, involves a compensated electronhole plasma that is trapped in the depletion layer fora portion of each cycle.

Solid-state storage device

Abstract: A solid-state storage device in the form of an insulated gate field effect tetrode. A depletion region is created in the channel so that an electric field emanating from one gate can penetrate the channel and attract high energy charge carriers into traps in the insulator. The charge carriers enter the insulator by surmounting the Schottky barrier at the semiconductor-insulator interface.

Advantages of ion implantation in fabricating hyperabrupt diodes

Abstract: Hyperabrupt diodes are characterized by a rapid change in capacitance with reverse voltage, due to the widening of the depletion layer through a region of decreasing doping density. When specific requirements are placed on the C-V relationship, one finds it necessary to apply rigorous control in forming the impurity profile. This paper describes the fabrication of such a device by two techniques, diffusion and ion implantation, and shows the striking advantage of ion implantation in fabricating devices with reproducible C-V characteristics at a high yield.