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Showing papers on "Depletion region published in 1970"


Patent
16 Apr 1970
TL;DR: In this article, an optical parametric device is described which may be used as an amplifier, oscillator, or frequency converter, and which is operable in the infrared or visible spectral regions.
Abstract: An optical parametric device is described which may be used as an amplifier, oscillator, or frequency converter, and which is operable in the infrared or visible spectral regions. The device utilizes a dielectric optical waveguide or tuned cavity, which structure may comprise the depletion layer of a semiconductor junction, the dielectric material of which exhibits nonlinear susceptibility. An intense, appropriately oriented, optical pump induces a non-linear electric polarization in the material of the dielectric structure. Traveling wave or discrete circuit parametric interaction occurs within the structure between the pump and an input signal. Under appropriate conditions, oscillation, amplification, and/or frequency conversion may be obtained.

204 citations


Journal ArticleDOI
TL;DR: To test the assumption that charge transfer efficiencies greater than 98 percent for transfer times less than 100 nsec were observed, devices were fabricated and measurements made.
Abstract: Structures have been fabricated consisting of closely spaced MOS capacitors on an n-type silicon substrate. By forming a depletion region under one of the electrodes, minority carriers (holes) may be stored in the resulting potential well. This charge may then be transferred to an adjacent electrode by proper manipulation of electrode potentials. The assumption that this transfer will take place in reasonable times with a small fractional loss of charge is the basis of the charge coupled devices described in the preceding paper,1 To test this assumption, devices were fabricated and measurements made. Charge transfer efficiencies greater than 98 percent for transfer times less than 100 nsec were observed.

185 citations


Journal ArticleDOI
TL;DR: In this article, the capacitance-voltage relationship of a Schottky barrier diode is predicted for an energy distribution of impurity levels having spatially uniform concentration in an n-type semiconductor.
Abstract: The capacitance‐voltage (C‐V) relationship of a Schottky barrier diode is predicted for an energy distribution of impurity levels having spatially uniform concentration in an n‐type semiconductor. The model applies for forward and reverse bias voltages at modulation frequencies near dc and at modulation frequencies at which one or more of the deep doping levels cannot respond. Effects of partial ionization of impurity species and the effect of electrons in the depletion region are considered. It is predicted that the diode [d(1/C)/dV] versus V relationship exhibits sharp minima when the barrier height minus the applied bias is equal to the energy level relative to the conduction band edge of any of the predominant deep‐lying impurities in the semiconductor. The way in which deep lying impurities consequently affect a C‐V impurity profile analysis is discussed.

140 citations


Journal ArticleDOI
F.E. Harper1, M.I. Cohen1
TL;DR: In this paper, the gross features of such junctions are described and electrical measurements of the forward bias and reverse bias current, reverse bias capacitance and transient response are given for room temperature.
Abstract: p − n junctions have been prepared by locally alloying a vacuum-evaporated Al film into n -type Si with a focused heat pulse derived form a Nd:YAG laser. The preparation and the gross features of such junctions are described and electrical measurements of the forward bias and reverse bias current, reverse bias capacitance and transient response are given for room temperature. The forward and reverse bias current measurement show that charge recombination and generation within the depletion region controls the flow of current as would be expected for a Si junction. The reverse bias capacitance shows that the change in the doping profile in these junctions is abrupt. From the transient response the reverse recovery time is typically 0.5 × 10 −9 sec.

50 citations


Journal ArticleDOI
TL;DR: In this paper, it was shown that if the surface is assumed to be a perfect sink, carrier diffusion (against the drift field) to the surface leads to x_w ≈ kT/qE where E is the field at the surface.

38 citations


Journal ArticleDOI
TL;DR: In this paper, a hybrid recombination model has been formulated for neutron irradiated silicon which correctly predicts the minority carrier recombination in both the neutral and space charge regions of a device.
Abstract: A hybrid recombination model has been formulated for neutron irradiated silicon which correctly predicts the minority carrier recombination in both the neutral and space charge regions of a device. Exact, one-dimensional, numerical calculations have been performed using this model and compared to reported V-I characteristics of irradiated p+ n diodes. The calculated curves agree with the reported data within 20% over the seven decade span of currents in the investigations, for diode base resistivities from 0.25 ?-cm to 17 ?-cm. At low injection levels the calculated recombination occurs predominantly in the junction space charge region, whereas at high injection both the space charge region and neutral region can be important. Calculations have also been performed for the recombination occurring throughout a typical NPN silicon transistor. The results indicate that space charge region recombination is probably dominant in modern, narrow base transistors even at high injection levels.

28 citations


Journal ArticleDOI
TL;DR: In this article, the damage produced by energetic ions in the space charge region of diffused p+n junction diodes is studied. And the results can be fit by a single level Shockley-Read-Hall model with the centers lying ∼ 1kT from the centre of the gap.
Abstract: The damage produced by energetic ions in the space charge region of diffused p+n junction diodes is studied. By measuring the diode reverse leakage current, Jr , as a function of the implant parameters (ion mass. energy, post-anneal temperature, etc.) the characteristics of recombination-generation centers introduced by the implant process can be probed. It is these states which strongly affect the operation of lifetime dependent devices. The results can be fit by a single level Shockley-Read-Hall model with the centers lying ∼ 1kT from the centre of the gap. They are seen to be closer to the surface than the L.S.S. range of the implanted carbon ions. Silicon implants have reverse leakage currents which are roughly linearly dependent on dose for low doses while carbon and helium implants have highly super linear dependencies indicating that defects created by separate lighter ions can interact at low doses. The pre-implant reverse leakage current of diodes implanted with 1015/cm2, 300 keV C+ can ...

21 citations


Journal ArticleDOI
TL;DR: In this article, a set of accurate steady-state solutions for a diffused junction diode is presented and the internal consequences of biasing of the diode are demonstrated by the spatial distributions of the mobile charge carriers, the electrostatic potential and the space charge.
Abstract: A set of accurate steady-state solutions for a diffused junction diode is presented The internal consequences of biasing of the diode are demonstrated by the spatial distributions of the mobile charge carriers, the electrostatic potential and the space charge The terminal characteristics presented include the V-I characteristic and the low frequency capacitance

19 citations



Journal ArticleDOI
TL;DR: In this paper, a graphical method is presented, which allows the determination, for a p - n junction, of the breakdown voltage and also the electric field distribution, the width of the depletion layer and the multiplication factor, all at a given reverse voltage.
Abstract: A graphical method is presented, which allows the determination, for a p - n junction, of the breakdown voltage and also the electric field distribution, the width of the depletion layer and the multiplication factor, all at a given reverse voltage. This method is based on the approximation of the exact impurity profile by an exponential function. The use of reduced parameters makes the method independent of the material. Numerical examples are presented.

17 citations


Journal ArticleDOI
TL;DR: In this paper, γ-ray spectrometer and diode characteristics for a 2 mmdepletion layer, gold surface-barrier detector, constructed from ultra-high purity n-type germanium.

Journal ArticleDOI
TL;DR: In this paper, the potential distribution in films with thickness equal to or smaller than the Debye length is derived from Poisson's equation under general boundary conditions, and it is shown that there exist three basic forms of this distribution depending on the densities and character of charges on both surfaces, on the geometrical thickness of the thin film and on the deformation of the semiconductor.
Abstract: The potential distribution in films the thickness of which is equal to or smaller than the Debye length is derived from Poisson's equation under general boundary conditions. It is shown that there exist three basic forms of this distribution depending on the densities and character of charges on both surfaces, on the geometrical thickness of the thin film and on the Debye length of the semiconductor.

Patent
06 Oct 1970
TL;DR: In this article, a lightly doped layer of semiconductive material is epitaxially grown on a relatively highly doped substrate so as to provide a relatively sharply defined transition in conductivity between the epitaxial layer and the original substrate material.
Abstract: In the method of the present invention, a lightly doped layer of semiconductive material is epitaxially grown on a relatively highly doped substrate so as to provide a relatively sharply defined transition in conductivity between the epitaxial layer and the original substrate material. Further, additional dopant material of the same conductivity type is implanted into the layer by particle bombardment thereby to provide a conductivity profile in which conductivity decreases with depth through the layer substantially down to the essentially uniform conductivity of the original epitaxial material. A dopant providing conductivity of the opposite type is diffused into a relatively shallow portion of the epitaxial layer so as to form a diode junction in the layer. In the diode so formed, the depth of the depletion region varies as a predictable function of the controlled conductivity profile in the epitaxial layer. Since the substrate provides a region of high conductivity just beyond the epitaxial layer, the Q of the device is relatively high.

Patent
01 Jul 1970
TL;DR: In this article, a method of manufacturing semiconductor devices having thin layers of a semiconductor material was proposed, where the thin layers are obtained by forming on a low-ohmic substrate a high-hemic thin layer and then selectively removing the substrate electrolytically.
Abstract: The invention relates to a method of manufacturing semiconductor devices having thin layers of a semiconductor material. These thin layers are obtained, for example, by forming on a low-ohmic substrate a high-ohmic thin layer and then selectively removing the substrate electrolytically. Difficulties can arise during this removal when a readily conductive layer has been formed on the high-ohmic layer. The difficulties are prevented when the thickness of the high-ohmic layer is at least as large as the thickness of the depletion layer which is formed in the high-ohmic layer during the electrolytic removal of the substrate.

Patent
10 Aug 1970
TL;DR: In this paper, a Schottky barrier or hot carrier diode is constructed by diffusing an impurity through an opening in a diffusion mask and into one surface of the semiconductor body to form PN junction.
Abstract: Disclosed is a Schottky barrier or hot carrier diode and process for making same wherein a diffused PN junction and a Schottky barrier junction are both formed in a body of semiconductor material. The diffused PN junction is formed by first diffusing an impurity through an opening in a diffusion mask and into one surface of the semiconductor body to form PN junction. Next, a large central portion of the region formed by the above diffusion is removed by etching or cutting, leaving unaffected by the etchant only that portion of the diffused region underlying and adjacent to the diffusion mask on the surface of the semiconductor body. The latter portion of the diffused region forms a relatively small area diffused PN junction. Finally, a Schottky barrier junction is formed in the etched out area of the semiconductor body, and the diode including the diffused and Schottky barrier junctions has a near-ideal current-voltage characteristic and still maintains its fast recovery time.

Journal ArticleDOI
TL;DR: In this paper, the authors investigated the potential distribution in the channel using a tungsten needle as a probe in alloyed junction type FET in operation and obtained the field distribution and the free carrier distribution as the first and second derivative of the measured potential distribution.
Abstract: The operation mechanism of field-effect transistors (FET) was investigated by the measurements of the potential distribution in the channel using a tungsten needle as a probe in alloyed junction type FET in operation. The field distribution and the free carrier distribution were obtained as the first and the second derivative of the measured potential distribution. It is clear that, before the current saturation, from the source to the drain the electrically neutral channel exists. In this region the ionized impurity density and the carrier density are equal and the field toward the gate can be neglected. Contrary to this, in the channel at the drain side after the current saturation, the space charge layer extending from the gates reaches near the channel centre and the field to the gate direction becomes extremely high. In this region, an effective channel is formed in which the free carriers decrease toward the gate. At the centre of the effective channel, the electrical neutrality almost holds. Almost all of the voltage after the current saturation are spent in this region which is independent of the source side. In this short high field region, the field seems to be even in the velocity saturation region ( E >1·5×10 4 V/cm) of the carriers. The highest field region is rather outside of the gates. The potential and the carrier distribution in the channel at the drain side show a fairly good agreement with the theoretical calculation analysed in this paper.

Journal ArticleDOI
TL;DR: In this paper, the authors derived the energy balance between the rate at which the charge acquires energy, the energy is stored in the electrostatic field, and the battery supplies it.

Journal ArticleDOI
TL;DR: In this article, the currentvoltage characteristics of the junction-gate field effect transistor are analyzed based on a depletion layer model of the channel which is divided into subregions of constant mobility and of field-dependent mobility to reproduce the actual situation under various voltage conditions.
Abstract: Current-voltage characteristics of the junction-gate field-effect transistor are analyzed based on a depletion layer model of the channel which is divided into subregions of constant mobility and of field-dependent mobility to reproduce the actual situation under various voltage conditions in order to clarify the effect of field-dependent mobility on the characteristics of the device. New formulas for design parameters are given and experimentally verified on specially designed and fabricated samples as well as on commercial samples. Agreement between theory and measurement is good.

Journal ArticleDOI
TL;DR: In this paper, a theoretical study of the charge collection properties of coaxial Ge(Li) detectors is presented, which can easily be handled for a great number of practical cases.
Abstract: A theoretical study of the charge collection properties of coaxial Ge(Li) detectors is presented. Normalized relationships are derived, which can easily be handled for a great number of practical cases. A geometrical factor g = ri/w (ri - internal radius of the coaxial counter, w - depletion layer width) has been introduced. The case of planar detectors can be derived if great values are given to g. Calculations have been performed assuming a 1/r r field variation, and a punctual single event gamma ray energy loss (electron-hole pair created in a point). Concerning the variation of the charge carrier drift velocity vs the electric field, two kinds of approximation have been used in the calculations : variable velocity (VVA) and constant velocity approximation (CVA). Trapping has also been taken into account by assuming an uniform distribution of trapping centers throughout the detector sensitive volume. For different interaction points, geometrical factors and trapping parameters, the relationships for the charge carrier collection efficiency (peak position of monoenergetic spectra in the case of a collimated radiation beam), as well as the shapes of current and charge pulses have been established and plotted. The prompt coincidence curves (using the charge pulse leading edge timing) are calculated by evaluating the probability distribution of the time at which the charge signal crosses a discriminating level. The influence on these curves of the geometrical factor, the discriminator tevet, the noise and the trapping parameters is taken into account and discussed.

Journal ArticleDOI
TL;DR: In this article, the effects of both the bulk charge due to the drain depletion region and the saturation of carrier velocity on the current/voltage characteristics of short-channel m.o.t.s are considered.
Abstract: The effects of both the bulk charge due to the drain depletion region and the saturation of carrier velocity on the current/voltage characteristics of short-channel m.o.s.t.s are considered. Theoretical calculations based on both 2-dimensional and 1-dimensional models show close agreement with experimental measurements.

Patent
Fang Frank F1, Lean Eric G1
30 Jun 1970
TL;DR: An amplifier for Rayleigh surface acoustic waves in which an additional control is provided is described in this paper, where a region of variable conductivity is located in close proximity to the surface on which the acoustic wave travels.
Abstract: An amplifier for Rayleigh surface acoustic waves in which an additional control is provided. A region of variable conductivity is located in close proximity to the surface on which the acoustic wave travels. Examples of this region are an inversion layer whose conductivity is controlled by electrical bias, and a bulk region whose conductivity is controlled by a variable width depletion region. The electric field produced by moving charge carriers in the variable conductivity region interacts with the piezoelectric field produced by the acoustic wave to transfer energy to the acoustic wave, or extract energy from this wave.

Journal ArticleDOI
Fumio Hasegawa1
TL;DR: In this paper, the authors measured the energy levels of the deep centers that cause a high resistance region at the interface between GaAs vapor epitaxial film and the substrate, and found an activation energy for electrons at deep traps was found to be about 0.89 eV.
Abstract: In order to find the energy levels of the deep centers that cause a high resistance region at the interface between GaAs vapor epitaxial film and the substrate, three kinds of measurements were performed: i) time dependence of the capacitance of Schottky barriers, ii) temperature dependence of the reverse current of Schottky barriers, iii) photoconductivity of the high resistance region. From the variation in the time dependence of the capacitance measured at various temperatures, an activation energy for electrons at deep traps was found to be about 0.89 eV. When the depletion layer contained a high resistance region, the reverse current of the Schottky barrier was larger than the normal reverse current by about three orders of magnitude. The measured results on the temperature dependence of reverse current and on the photoconductivity spectrum of the high resistance region suggest the presence of three deep energy levels that range from about 0.3 eV to 0.6 eV above the valence band. Extrinsic negative photoconductivity was observed in the high resistance region.

Journal ArticleDOI
TL;DR: The current dependence of the neutron damage factor for transistor beta degradation was correlated with the carrier transit time across both the emitter-base junction and the base region of a transistor.
Abstract: The current dependence of the neutron damage factor for transistor beta degradation was correlated with the carrier transit time across both the emitter-base junction and the base region of a transistor. An electrical measurement related to this transit time was used to generate current-independent damage factors for 100 devices of 16 types. The use of the junction delay in addition to the base transit time was based on recent work which indicated the importance of this region in transistor beta degradation. From this work it appears that a graphical method can be used to separate the components of damage occuring in the base and in the emitter-base depletion region. Because the damage factor is independent of current, a single value can be determined for a given transistor type and used as a figure-of-merit for hardness assurance when divided by the gain-bandwidth product, fT, of the transistor at the operating current. This new damage "constant" should be more effective than the present damage factor in hardness assurance screens because its coefficient of variation is smaller at low currents.

Journal ArticleDOI
TL;DR: In this article, an n+-p-π-ν-n+transistor structure is constructed using alternately grown π and ν, epitaxial high-resistivity layers, p-type base and n+emitter diffusions.
Abstract: A new silicon power-transistor structure has been developed which expands the frontiers of power-switching performance and high-voltage power-handling capability. This new structure employs a unique π-ν (nearly intrinsic p- and n-type) epitaxial-layer construction which utilizes "overlay" emitter concepts to achieve improved volt-ampere densities and expanded second-breakdown performance. An n+-p-π-ν-n+transistor structure is constructed using alternately grown π and ν, epitaxial high-resistivity layers, p-type base and n+emitter diffusions are used in the conventional manner to assure punch-through protection. The depletion region for the n+-p-π-ν-n+transistor is in the π base and the ν collector, and the maximum electrical field ( E_{\max} ) is at the π-ν interface. The avalanche breakdown V B of the device can be controlled by the thickness ( X_{n}, X_{p} ) and the concentration ( N_{A}, N_{D} ) of the π-ν layers. Limiting the thickness of the ν collector region and adjusting the thickness of the π base layer provides a transistor with optimum volt-ampere capability. Various π-ν structures have been fabricated and are evaluated electrically for power switching and for linear applications.

Patent
09 Jan 1970
TL;DR: In this article, a memory element consisting of a conductive back layer, a semiconductor layer and an insulator enriched with an additive polarizing material such as the alkali metals sodium or lithium was described for use as a computer memory.
Abstract: A slow write-fast read out information storage and retrieval method and system is described for use as a computer memory. The method and system employs a memory element comprising a conductive back layer, a semiconductor layer and an insulator enriched with an additive polarizing material such as the alkali metals sodium or lithium and a conductive front layer arranged in the order named in the form of a sandwich with the semiconductor layer and polarizing material enriched insulator layer forming an interface. By selectively heating discrete different locations on the memory element with a directed electron beam in accordance with the intelligence to be recorded, and applying a polarizing electric potential across the memory element which maintains the insulator layer positive with respect to the semiconductor layer concurrently with the selective heating, positive electric charges (which are non-destructive during read-out) will be formed in the insulator layer due to mobile ions of the additive alkali metal polarizing material which are transported to the interface as a result of the polarizing potential. The positive electric charges in turn produce space charge regions in the semiconductor layer adjacent to the interface at the selectively heated different discrete locations. If the semiconductor layer is a p-type semiconductor, the space charge region is a depletion region. If the semiconductor layer is a n-type semiconductor, the space charge region will be an accumulation region. By subsequently allowing the insulator layer to cool, the mobile ion charges thus transported to the interface at the selectively heated locations will be frozen in to thereby form selectively located, semi-permanent, space charge regions in the semiconductor layer whereby the intelligence to be recorded is embodied in the selectively located charges. In a subsequent reading operation, a read-out electron beam is caused to penetrate through the insulator layer and interface to the space charge region of the semiconductor layer where it will produce electron-hole carriers in the space charge region. To facilitate the reading operation, a polarizing, reading potential may be applied across the memory element simultaneously with the readout electron beam. In the selectively located space charge regions, a considerably increased electron-hole pair current will be produced compared to that normally induced by the electron beam itself in those regions which have not been selectively polarized. Consequently a pulsed current output can be derived during the reading operation which is indicative of the data or intelligence stored in the memory element.

Patent
John A. Copeland1
19 Jan 1970
TL;DR: In this paper, the phase shift of the second harmonic frequency was used to determine the level of impurity at the edge of the depletion layer of a semiconductor, where the phase difference of the first and second currents was proportional to the concentration of deep impurity levels.
Abstract: The deep impurity concentration of a semiconductor is determined by forming a diode region in the wafer, applying a reverse-bias voltage across the diode, applying a first alternating current to the diode, deriving a second alternating current from the diode, and determining the phase difference of the first and second currents, said difference being proportional to the concentration of deep impurity levels at the edge of the depletion layer. In a preferred embodiment, the phase shift of the second harmonic frequency is used to determine deep level concentration.

Patent
24 Jun 1970
TL;DR: In this article, the formation of an inversion layer below an electrode provided on an insulating layer is counteracted by a rectifying contact preferably connected to said electrode, as a result of which minority charge carriers below the electrode layer are removed.
Abstract: A semiconductor device, for example, a deep-depletion field effection traNsistor, in which the formation of an inversion layer below an electrode provided on an insulating layer is counteracted by a rectifying contact preferably connected to said electrode, as a result of which minority charge carriers below the electrode layer are removed. As a result of this a depletion zone formed by the electrode potential in a semiconductor layer situated below the electrode can expand without hindrance to influence a current path in the semiconductor layer.

Patent
12 Nov 1970
TL;DR: In this paper, a method for fabricating a pinched resistor semiconductor structure having a channel and a field plate to provide a depletion region which pinches off the channel so that the current flow remains constant for any voltage after a predetermined voltage is reached.
Abstract: Method for fabricating a pinched resistor semiconductor structure having a channel and a field plate to provide a depletion region which pinches off the channel so that the current flow remains constant for any voltage after a predetermined voltage is reached.

Journal ArticleDOI
TL;DR: In this paper, the influence of several parameters related to the detector, such as depletion layer thickness, external radius of coaxial counters, applied electric field on the timing properties of planar and two open ended coaxial Ge(Li) detectors is investigated.
Abstract: The influence of several parameters related to the detector,. such as depletion layer thickness, external radius of coaxial counters, applied electric field on the timing properties of planar and two open ended coaxial Ge(Li) detectors is investigated. Besides, the role of the electronical conditions is studied.

Journal ArticleDOI
TL;DR: In this paper, it was shown that the recombination rate in the depletion region of a luminescent p-n junction would be governed by Shockley-Read statistics, and that with suitable diode parameters, an increase in temperature would increase the radiative efficiency of the diode.
Abstract: Modulation of photoluminescence in p–type GaAs by a field effect indicated that the radiative recombination occurred through recombination centres. This suggested that the recombination rate in the depletion region of a luminescent p–n junction would be governed by Shockley—Read statistics. The resulting model showed that, with suitable diode parameters, an increase in temperature would produce an increase in the radiative efficiency of the diode. Such an effect was observed experimentally with vapour-grown GaAs p–n junctions, the p–type sides of which were heavily compensated.