Showing papers on "Depletion region published in 1984"

Thin film transistor

Abstract: PURPOSE:To obtain a transparent thin film transistor having a large ON-current and a memorizing property by a method wherein a transition metal oxide is used as a semiconductor layer. CONSTITUTION:A gate 2 is formed on a substrate 1, then an SiO2 film 3 is deposited on the whole surface, a semiconductor layer 4 is formed, and a source electrode 5 and a drain electrode 6 are formed. Then, an SiO2 film 7 is provided in such a manner that it will not be formed on the electrode 6, and a thin film transistor TFT is formed. In this constitution, a transition metal oxide which is WO3 in other words is used. When WO3 is used for the film 4, its ON-current is approximately two figures higher when compared with the TFT whereon an amorphous semiconductor layer is used. Also, as the WO3 is transparent, a transparent TFT is obtained when a transparent electrode is used for electrodes 2, 5 and 6. Besides, a WO3 thin film can maintain the donor position in the film and the width of a depletion layer for a fixed period even after voltage is cut off, and a memorizing property can also be given to the film.

High voltage semiconductor device

Abstract: A field effect transistor, a bipolar transistor, a PIN diode, a Schottky rectifier or other high voltage semiconductor device comprise a semiconductor body having a depletion layer formed throughout a portion in at least a high voltage mode of operation of the device, such as, by reverse biasing a rectifying junction. The known use of a single high-resistivity body portion of one conductivity type to carry both the high voltage and to conduct current results in a series resistivity increasing approximately in proportion with the square of the breakdown voltage. This square-law relationship is avoided by the present invention in which a depleted body portion comprising an interleaved structure of first and second regions of alternating conductivity types carries the high voltage which occurs across the depleted body portion. The thickness and doping concentration of each of these first and second regions are such that when depleted the space charge per unit area formed in each of these regions is balanced at least to the extent that an electric field resulting from any imbalance is less than the critical field strength at which avalanche breakdown would occur in the body portion. The first regions in at least one mode of operation of the device provide electrically parallel current paths extending through the body portion.

Hole diffusion length in n‐TiO2 single crystals and sintered electrodes: Photoelectrochemical determination and comparative analysis

Abstract: The photoelectrochemical behavior of an n‐TiO2 (rutile) single crystal under different treatments (mechanical polishing and chemical and photoelectrochemical etching) is analyzed and the conditions under which Gartner’s model can be applied are determined. The hole diffusion length Lp obtained from the photoelectrochemical data is about 10−6 cm for the etched single crystal and seems to be governed by electron‐hole recombination at centers associated to impurities introduced in the lattice during the manufacturing process. This value of the hole diffusion length determines the minimum value of the donor concentration Nd for an efficient separation of carriers within the semiconductor depletion layer. This explains the existence of a maximum of the quantum efficiency for Nd∼6×1018 cm−3, which has been found to be a value common to n‐TiO2 single crystals of different origin. Lattice deffects introduced near the crystal surface by mechanical polishing behave as recombination centers which reduce Lp to values...

Ac Surface Photovoltages in Strongly-Inverted Oxidized p-Type Silicon Wafers

Abstract: Surface photovoltages in Si wafers excited with a chopped 559 nm-wavelength photon beam are analysed using a new half-sided junction model. In this model, the wafer surface with the depletion layer is considered to be one half of the p-n junction. Chopping frequency ranges from 2 Hz through 20 kHz. Four 76 mm-diameter p-type Si wafers having resistivities of 260, 92, 17 and 1.0 mΩ m are used after forming 360 nm-thick wet-oxide layer on their front surfaces. In these wafers, photovoltage increases with resistivity. In three high-resistivity wafers with strongly-inverted surfaces, the inversion capacitances and conductances limit the photovoltages at low frequencies. The obtained inversion time-constant is 7 s for the 17 mΩ m wafer.

Physical mechanisms of dc switching in a liquid‐crystal bistable boundary layer display

Abstract: We discuss two mechanisms proposed to explain dc switching of a bistable liquid‐crystal boundary layer display. These are (1) biasing by double layer fields that arise from charge of one sign preferentially adsorbed at the walls, and (2) asymmetry in the transient depletion layer fields which result from a difference in mobility of the positive and negative ions. By a quantitative discussion, we argue that both mechanisms are plausible, but crucial parameters remain unknown. For the double layer mechanism the surface density of adsorbed charge is estimated as 8×10−10 C/cm2 from published measurements of the thickness dependence of the resistivity. For a numerical example of the differential mobility mechanism, we arbitrarily take μ−=3μ+=9×10−6 cm2/V sec. Either mechanism may be made dominant by the choice of material and surface properties. For fast switching, it may prove advantageous to choose interfaces to exploit the double layer mechanism because it begins to act immediately upon application of the v...

Characterization of metallophthalocyanine‐metal contacts: Electrical properties in a large frequency range

Abstract: The dark electrical properties of metallophthalocyanine‐metal contacts are studied in an extended frequency range (10−3–105 Hz). The measurements show that the standard Schottky model cannot be applied to metallo‐organic semiconductors. Three different contributions to the admittance may be distinguished. Over the very first few angstroms of the semiconductor extends a surface‐charge layer associated with a high capacitive term. The surface‐charge capacitance is only slightly dependent upon superimposed dc voltages. The so‐called space‐charge region extends below the surface‐charge layer over approximately 2000–4000 A. The properties of this space‐charge region are, however, dramatically different from those found in monocrystalline inorganic semiconductors. The corresponding capacity is almost independent of any dc superimposed voltage. At the same time, the resistance of the space‐charge region is highly dependent on externally applied dc voltages. The I‐V relationship seems to indicate a Frenkel–Poole ...

High voltage guard ring with variable width shallow portion

Abstract: At least one annular region (11,12, . . . ) extends around an active device region (10) and is located within the spread of a depletion layer (25) from a reverse-biased p-n junction (20) formed by the device region (10) to increase the breakdown voltage of the junction (20). The device region (10) and/or at least one inner annular region (11,12, . . . ) includes at least one shallower portion (10b,11b, . . . ) which extends laterally outwards from a deep portion (10a,11a,12a, . . . ) and faces the surrounding annular region to change the spacing and depth relationship of these regions. This permits high punch-through voltages to be achieved between the regions (10,11,12, . . . ) while reducing peak fields at the bottom outer corners of the regions (10,11,12, . . . ). Inwardly-extending shallow portions (11c,12c, . . . ) may also be included. The shallow portions (10b,11b,11c,12c . . . ) may extend around the whole of a perimeter of the region or be localized where higher electrostatic fields may occur around the perimeter.

Determination of trapped charge emission rates from nonexponential capacitance transients due to high trap densities in semiconductors

Abstract: Simple analytical expressions are derived to determine the trapped charge emission rates from the initial or final decay of capacitance transients in a semiconductor junction containing shallow dopants and traps of arbitrary profiles, even though the whole decay is nonexponential due to high trap densities. Two special cases of density profiles are then examined. ‘‘Nonexponentiality’’ is quantitatively defined and simple expressions are presented. We show that charging traps in part of the depletion layer may increase or reduce nonexponentiality, depending on the trap density in the region dynamically swept through during the transient. Measurements on a gold‐doped diode give good agreeement with our analysis.

Semiconductor memory device

Abstract: A semiconductor memory device comprises a gate electrode provided via a gate insulating film on a semiconductor layer formed on a substrate and two diffused semiconductor regions provided to form a field effect transistor together with the gate electrode. An electrical charge is supplied to one of the diffused regions from the other region to thereby vary a width of a space charge layer appearing around the one diffused region so that informations "1" and "0" are selectively stored in the device. The stored information is read-out by detecting presence or absence of a buried channel between the space charge layer and the substrate.

Two-dimensional analytical modeling of threshold voltages of short-channel MOSFET's

Abstract: We present an analytical model of the threshold voltage of a short-channel MOSFET based on an explicit solution of two-dimensional Poisson's equation in the depletion region under the gate. This model predicts an exponential dependence on channel length (L), a linear dependence on drain voltage (V D ), and an inverse dependence on oxide capacitance (e ox /t ox ). An attractive feature of this model is that it provides an analytical closed-form expression for the threshold voltage as a function of material and device parameters (t ox , V D , L, substrate bias, and substrate doping concentration) without making premature approximations. Also, this expression reduces to the corresponding expression for long-channel devices.

Time-resolved charge transport in hydrogenated amorphous silicon

Abstract: Revue des recentes etudes experimentales, concernant notamment la photoconductivite transitoire. Un modele de piegeage multiple permet d'expliquer de nombreux resultats sur Si:H amorphe

Semiconductor memory device

Abstract: PURPOSE:To contrive to improve the write efficiency by enhancing the injection efficiency of hot electrons by enlarging a channel width on the drain side. CONSTITUTION:A drain region 8 and a source region 9 are formed on one main surface part of a semiconductor substrate, and a channel part 10a is formed between the region 8 and the region 9. On this part 10a, a floating gate 4 is provided by insulation from the substrate, and a control gate 5 by insulation from the gate 4. In this constitution, the width of the part 10a on the drain 8 side is more enlarged than that of the other part. Thereby, a part of the hot electrons generated by an avalanche breakdown in a depletion region close to the drain 8 is injected to the gate 4 by the electric field the gate 5 forms and is then accumulated, but the injection efficiency increases by enlargement of the channel width on the drain 8 side. Therefore, the write time is shortened, and then the write efficiency can be improved.

Dynamics of capture from free‐carrier tails in depletion regions and its consequences in junction experiments

Abstract: Exponentially decaying tails of free carriers extend from the neutral material into the depletion region of p‐n junctions or Schottky barriers. In nonequilibrium, deep level impurities in the depletion region may readily capture free carriers from these tails. The strongly nonexponential time dependence of the capture is calculated here and is compared with experimental data. This nonexponential time dependence is particularly important in deep level transient spectroscopy, and it also appears in many other junction measurements with deep level impurities.

A comparison of gettering techniques for very large scale integration

Abstract: Two techniques developed for metal‐oxide‐semiconductor (MOS) processing, internal gettering (IG) and silicon gettering by segregation, are compared. The test vehicles are n+/p junction diodes and are tested for their reverse current and defect density. The forward characteristic of these diodes is ideal over about six orders of magnitude with slope 60 mV/decade. No generation‐recombination current affects the characteristic. Some diodes, though with an ideal forward characteristic, behave for reverse bias as I=I0+V/R, where I0 is the current extrapolated at V=0 and R is an apparent resistance. Taking into account that the width of the depletion layer is of the order of 1–3 μm, the ‘‘resistivity’’ responsible for the ‘‘resistance’’ R is of the order of 1011–1014 Ω cm, depending on the particular diode. The parameters I0 and R are correlated over about four orders of magnitude by the relationship 1/R∝I0−Idiff, where Idiff is the diffusion current determined by the forward characteristic. The ‘‘resistance’’ ...

Semiconductor light emitting element

Abstract: PURPOSE:To enable the oscillation threshold value to be decreased, by providing semiconductor layers respectively having first and second conductivity types around a luminescent region, and externally controlling the potential at a part of these semiconductor layers CONSTITUTION:An n type semiconductor layer 11, an n type semiconductor active layer 12 and a p type semiconductor layer 13 are formed into a stripe mesa configuration A p type semiconductor layer 14, an n type semiconductor 15 and a p type semiconductor layer 16 are successively formed on eash side of the mesa First, second and third electrodes 17, 18 and 19 are formed on the surfaces of the layers 16, 11 and 15, respectively When a forward voltage VF is applid between the electrodes 17 and 18, current is injected into the layer 12, and light is emitted However, a part of the current passes through the layer 14 to leak out When a positive voltage V is applied to the electrode 19, the layers 15 and 14 are reverse-biased, so that the depletion layer in the layer 14 spreads to decrease the leakage current By externally controlling the potential at the layer 15 in this way, it is possible to control the leakage current and lower or control the oscillation threshold value

Theory for voltage dependent series resistance in silicon solar cells

Abstract: A distributed parameter model has been proposed for p-n junction solar cells to account for the variation of series resistance due to the forward biasing of the p-n junction under external injection condition. The theoretical expression developed using this model predicts a coupling between base and emitter via depletion layer. This coupling becomes stronger with increasing bias and is found to be responsible for the observed decrease of series resistance with rising injection level. Numerical results of our theory are found to agree well with those obtained from experiments.

Photocapacitive detector array

Abstract: A photocapacitive image detector array comprises a matrix of M×N spaced columns of relatively high carrier concentration extending between first and second opposite faces of a semiconductor substrate having a relatively low carrier concentration. N parallel spaced electrode stripes extend in the X direction on the first face and M parallel spaced semiconductor stripes of intermediate carrier concentration extend in the Y direction on the second face. Stripe k of the N stripes makes ohmic contacts with each of the M columns, where k=1,2, . . . N. Stripe p of the M semiconductor stripes makes contact with each of the N columns, where p=1, 2, . . . M. Each of the M regions has a depletion layer having a thickness adapted to be modulated by radiation from an image to be detected. M parallel spaced electrode stripes extend in the Y direction so that stripe q of electrode stripes M is in registration with semiconductor stripe q, where q=1, 2, . . . M. A composite insulating layer, including two insulating thin films, is sandwiched between the M electrode stripes and M semiconductor stripes. Thereby M×N pixels are formed, with each pixel being associated with a different one of the columns. The composite insulating layer and M electrodes are transparent to radiation from the image so that the image incident on the semiconductor stripes modulates the thickness of the depletion layers of the semiconductor stripes to vary the capacitance at each pixel as a function of the radiation intensity incident thereon.

A new approach to the modeling of nonuniformly doped short-channel MOSFET's

Abstract: A new doping transformation procedure for the modeling of arbitrarily doped enhancement-mode MOSFET's is presented. The procedure is based on conservation of charge and electrostatic energy in the depletion region along with the conservation of surface potential and depletion width. The transformation can be extended to short-channel MOSFET's using a charge sharing approximation. Experimental results obtained on n-well CMOS devices with effective channel lengths down to 1.5 µm are used to verify the validity of the models for threshold voltage, drain conductance, and drain current.

Semiconductor memory device

Abstract: PURPOSE:To reduce consumed power and make the action speedy by a method wherein a gate electrode is provided on the surface of a part close to the source via an insulator film, and a region of reverse conductivity type of high resistivity is always made into a depletion layer in a region of the main action. CONSTITUTION:A memory cell including an electrostatic induction transitor is arranged in the intersection of a matrix composed of the matrix line of an address column line and a write-read row line. The region 52 of reverse conductivity type is provided adjacent to the source region 51 composed of a region of high impurity density. The region 53 of high resistivity of the same conductivity type as the reverse conductivity type is interposed between the drain region 54 composed of the region of impurity density of the same conductivity type as the region 51. The gate electrode 56 is provided on the surface of the part close to the source via the insulator film 55. The region 53 always becomes a depletion layer in the main action, and the impurity density and various dimensions are selected so as to show the characteristic of unsaturated current- voltage.

Anomalous photomagnetoresistance effect in modulation‐doped AlGaAs/GaAs heterostructures

Abstract: A novel negative photoresistance effect at Al0.3Ga0.7As/GaAs interface in the presence of a magnetic field B is discovered and explained. At low temperatures (T=4.2 K) illumination of the sample leads to a persistent electron accumulation in the GaAs channel (the well‐known persistent photoconductivity effect). In the presence of B≳0.3 T the dependence of the longitudinal resistance (as measured by the four‐probe method) shows an anomalous behavior in that the resistance increases sharply with the increasing concentration n of carriers provided by light. In the same range of concentrations the longitudinal resistance at fixed n is proportional to B2. It is shown that the observed behavior of the resistance is associated with photoexcitation of electrons from donor vacancy (DX) centers in the highly doped AlGaAs region resulting in the creation of a second conducting layer of high charge density and low mobility.

Mechanism of non‐Shockley conduction in almost ideal silicon junction diodes

Abstract: Well‐gettered diodes behave as ideal Shockley diodes for forward bias. For reverse bias their characteristics may deviate from the Shockley theory according to the preparation precedure. A model for this behavior is presented; it ascribes the deviation to a generation current produced at donor‐acceptor shallow levels in the depletion layer.

Surface conductivity measurements by a capacitive coupling technique

Abstract: We show how the conductivity of a gate‐voltage‐induced charge layer in a metal‐insulator‐semiconductor (MIS/MOS) capacitor structure can be measured quantitatively without the need for source‐drain contacts. In this scheme, the interface current is driven by an rf voltage applied across a resistive thin‐film gate electrode and coupling capacitively to the conducting interface layer. We give examples that illustrate application possibilities and the sensitivity of the technique.

Equilibrium distributions of electric field in a cell with adsorbed charge at the surfaces

Abstract: Ionic charge that is stuck at the solid‐liquid surface attracts a diffuse layer of ions of the opposite sign in the liquid. The asymmetry in the electric field distribution that results when an applied field is combined with the intrinsic field in the diffuse charge layer has been cited as a possible cause of the dc switching effect observed in liquid crystal displays based on bistable boundary layer configurations [Robert B. Meyer and R. N. Thurston, Appl. Phys. Lett. 43, 342 (1983)]. Since the ratio of Debye screening length LD to cell depth d is an important parameter, it is useful to solve for the static equilibrium field distribution under constant voltage in a finite cell where LD/d is not small. This problem is solved here.

Manufacture of semiconductor device

Abstract: PURPOSE:To provide high withstand voltage by a short channel and to improve integrated characteristics, by determining the positional relationship of diffusing windows for forming double diffusion regions by one photographic process, thereby forming perfectly symmetric MOSTrs on the right and left sides, and preventing the punch through of a depletion layer by the channel. CONSTITUTION:With a resist film 7 made by a photographic processing as a protecting film, a nitride film and polysilicon 5 are removed, and a silicon oxide film is newly formed. Then boron is doped from an exposed surface, and a p type substrate region 2 is formed. With the polysilicon 5 and the like as a mask, ions are implanted, and a p type substrate region 2' is formed. Then, a diffused mask and the like are applied to the entire surface of the substrate region 2'. Thereafter, with the polysilicon 5 as a mask, n type impurities are diffused, and a source region 3 is formed. Since self-alignment of each region can be accomplished within the range of accuracy of one photographic processing, the characteristics of individual units are made equal, the integrated characteristics of the elements are improved, and the yield rate in manufacturing can be improved.

Reduction of apparent dopant concentration in the surface space charge layer of oxidized silicon by ionizing radiation

Abstract: We have observed significant reduction of apparent dopant concentration in the surface space charge layer of oxidized silicon resulting from exposure to either an Ar plasma or x rays. Such phenomenon has been found in both p‐type (boron doped) and n‐type (phosphorus doped) samples. In addition, the magnitude of this reduction depends systematically on the diameter of the gate aluminum dots used to form the metal/SiO2/Si capacitor. In the range (10–60 mil) studied, samples with smaller gate sizes exhibit less dopant reduction. These results may be explained by a model based on the majority‐carrier reduction due to the radiation‐induced deep electron and hole traps in the surface space charge region of silicon.

Characterization of dark current non-uniformities in charge-coupled devices

Abstract: Thermally generated dark current non-uniformities are electrically characterized, using gate controlled diodes and charge-coupled devices in the integration mode. The generation current in the space charge layer under the electrode of a gated-diode and in a CCD-cell, containing a lot of crystallographic defects, varies non-linearly with the depletion layer width. The leakage current in a charge-coupled device was measured as a function of temperature and had a smaller temperature dependence than n i has at room temperature or lower. At higher temperatures a normal n i -dependence is found. These experiments suggest that the enhanced generation at the location of a crystallographic defect is partly due to an increased concentration of generation-recombination centers in the vicinity of a defect and partly due to a field enhanced emission, caused by the high electric fields near the defects.

Solid-state image pickup element and manufacture thereof

Abstract: PURPOSE:To increase the depletion layer capacitance of the junction and thus reduce the recombination by the surface level of the carrier generated by a short wavelength light by a method wherein the photo diode part is put in a three-layer structure sandwiched by a substrate and a semiconductor layer which form an original P-N junction, and the upper and down two semiconductor layers of high impurity concentration having the reverse conductivity type. CONSTITUTION:Preparing a wafer consisting of an N-substrate layer 9, a P layer 4 of a buried layer is formed after forming a P-well layer 8. After the entire surface is covered with a nitride film, RIE of anisotropic etching is performed, thus forming a side wall 23 made of an oxide film on the side surface of a poly Si layer 7 covered with an element isolation insulation film 6 and an oxide film 22. Since the dimension d2 of the side wall 23 at the part covering the substrate is equal to the thickness of the first nitride film, it can be controlled by this thickness. Next, etching is performed by means of a photo resist pattern 24. After phosphorus treatment, an oxide film 25 is formed on the surfaces of the poly Si layer 7, N-layer 3 and drain N-layer 10. Finally, a side wall 26 is formed on the surface of the poly Si layer 7 covered with the side wall 23 and the oxide film 25 by RIE.

Casting in a low density atmosphere

Abstract: An apparatus and method for casting metal strip (6) include a moving chill body that has a quench surface (5). A nozzle mechanism (4) deposits a stream of molten metal on a quenching region (14) of the quench surface to form the strip. The nozzle mechanism has an exit portion (26) with a nozzle orifice (22). A depletion mechanism supplies a low density atmosphere to a depletion region located adjacent to and upstream of the quenching region. The quench surface is heated to a temperature that substantially prevents precipitation of condensed or solidified constituents from the low density atmosphere onto the depletion region.

Theory of switching in polysilicon n-p+ structures

Abstract: A theory is presented for the metal-polysilicon-n-p+ switching structure. Two modes have been shown to exist, one where switching occurs before punch- through of the polysilicon-epitaxial layer space charge region to the n-p+ junction, and the other where switching occurs after punch-through. The effect of the doping density in the polysilicon on the switching characteristic is investigated and the temperature sensitivity is also explored. Experimental data is presented where the polysilicon film thickness and temperature are varied and the result shown to be generally consistent with the theory.