Showing papers on "Depletion region published in 2002"

Vertical one-transistor floating-body DRAM cell in bulk CMOS process with electrically isolated charge storage region

Abstract: A one-transistor, floating-body (1T/FB) dynamic random access memory (DRAM) cell is provided that includes a field-effect transistor fabricated using a process compatible with a standard CMOS process. The field-effect transistor includes a source region and a drain region of a first conductivity type and a floating body region of a second conductivity type, opposite the first conductivity type, located between the source region and the drain region. A buried region of the first conductivity type is located under the source region, drain region and floating body region. The buried region helps to form a depletion region, which is located between the buried region and the source region, the drain region and the floating body region. The floating body region is thereby isolated by the depletion region. A bias voltage can be applied to the buried region, thereby controlling leakage currents in the 1T/FB DRAM cell.

Fundamentals of Semiconductor Electrochemistry and Photoelectrochemistry

Abstract: The sections in this article are Introduction and Scope Electron Energy Levels in Semiconductors and Energy Band Model The Semiconductor–Electrolyte Interface at Equilibrium The Equilibration Process The Depletion Layer Mapping of the Semiconductor Band-edge Positions Relative to Solution Redox Levels Surface States and Other Complications Charge Transfer Processes in the Dark Current-potential Behavior Dark Processes Mediated by Surface States or by Space Charge Layer Recombination Rate-limiting Steps in Charge Transfer Processes in the Dark Light Absorption by the Semiconductor Electrode and Carrier Collection Light Absorption and Carrier Generation Carrier Collection Photocurrent-potential Behavior Dynamics of Photoinduced Charge Transfer Hot Carrier Transfer Multielectron Photoprocesses Nanocrystalline Semiconductor Films and Size Quantization Introductory Remarks The Nanocrystalline Film–Electrolyte Interface and Charge Storage Behavior in the Dark Photoexcitation and Carrier Collection: Steady State Behavior Photoexcitation and Carrier Collection: Dynamic Behavior Size Quantization Chemically Modified Semiconductor–Electrolyte Interfaces Single Crystals Nanocrystalline Semiconductor Films and Composites Types of Photoelectrochemical Devices Conclusion Acknowledgments

The origin of double peak electric field distribution in heavily irradiated silicon detectors

Abstract: The first observation of double peak (DP) electric field distribution in heavily neutron irradiated (>10 14 n/cm 2 ) semiconductor detectors has been published about 6 yr ago. However, this effect was not quantitatively analyzed up to now. The explanation of the DP electric field distribution presented in this paper is based on the properties of radiation induced deep levels in silicon, which act as deep traps, and on the distribution of the thermally generated free carrier concentration in the detector bulk. In the frame of this model, the earlier published considerations on the so-called “double junction (DJ) effect” are discussed as well. The comparison of the calculated electric field profiles at different temperatures with the experimental ones allows one to determine a set of deep levels. This set of deep levels, and their charge filling status are essential to the value and the distribution of space charge in the space charge region in the range of 305–240 K, which is actual temperature range for the main experiments at LHC where silicon detectors are used. This set of deep levels includes the levels located close to the midgap and does not contain the defects with the largest introduction rate −( C i – O i ) and ( V – V ).

Power semiconductor device having resurf layer

Abstract: A semiconductor device includes a drain layer, first and second drift layers, a RESURF layer, a drain electrode, a base layer, a source layer, a source electrode, and a gate electrode. The first drift layer is formed on the drain layer. The second drift layers and RESURF layers are formed on the first drift layer and periodically arranged in a direction perpendicular to the direction of depth. The RESURF layer forms a depletion layer in the second drift layer by a p-n junction including the second drift layer and RESURF layer. The impurity concentration in the first drift layer is different from that in the second drift layer. The drain electrode is electrically connected to the drain layer.

Theory of spin-polarized bipolar transport in magnetic p-n junctions

Abstract: The interplay between spin and charge transport in electrically and magnetically inhomogeneous semiconductor systems is investigated theoretically. In particular, the theory of spin-polarized bipolar transport in magnetic $p\ensuremath{-}n$ junctions is formulated, generalizing the classic Shockley model. The theory assumes that in the depletion layer the nonequilibrium chemical potentials of spin-up and spin-down carriers are constant and carrier recombination and spin relaxation are inhibited. Under the general conditions of an applied bias and externally injected (source) spin, the model formulates analytically carrier and spin transport in magnetic $p\ensuremath{-}n$ junctions at low bias. The evaluation of the carrier and spin densities at the depletion layer establishes the necessary boundary conditions for solving the diffusive transport equations in the bulk regions separately, thus greatly simplifying the problem. The carrier and spin density and current profiles in the bulk regions are calculated and the $I\ensuremath{-}V$ characteristics of the junction are obtained. It is demonstrated that spin injection through the depletion layer of a magnetic $p\ensuremath{-}n$ junction is not possible unless nonequilibrium spin accumulates in the bulk regions---either by external spin injection or by the application of a large bias. Implications of the theory for majority spin injection across the depletion layer, minority spin pumping and spin amplification, giant magnetoresistance, spin-voltaic effect, biasing electrode spin injection, and magnetic drift in the bulk regions are discussed in details, and illustrated using the example of a GaAs based magnetic $p\ensuremath{-}n$ junction.

A structural probe of the doped holes in cuprate superconductors

Abstract: An unresolved issue concerning cuprate superconductors is whether the distribution of carriers in the CuO2 plane is uniform or inhomogeneous. Because the carriers comprise a small fraction of the total charge density and may be rapidly fluctuating, modulations are difficult to detect directly. We demonstrate that in anomalous x-ray scattering at the oxygen K edge of the cuprates, the contribution of carriers to the scattering amplitude is selectively magnified 82 times. This enhances diffraction from the doped holes by more than 10(3), permitting direct structural analysis of the superconducting ground state. Scattering from thin films of La2CuO4+delta (superconducting transition temperature = 39 K) at temperature = 50 +/- 5 kelvin on the reciprocal space intervals (0,0,0.21) --> (0,0,1.21) and (0,0,0.6) --> (0.3,0,0.6) shows a rounding of the carrier density near the substrate suggestive of a depletion zone or similar effect. The structure factor for off-specular scattering was less than 3 x 10(-7) electrons, suggesting an absence of in-plane hole ordering in this material.

Significant suppression of leakage current in (Ba,Sr)TiO3 thin films by Ni or Mn doping

Abstract: Effects of Ni or Mn doping in (Ba0.5Sr0.5)TiO3 thin films on leakage current behaviors of Pt/(Ba0.5Sr0.5)TiO3/Pt capacitors were investigated. The leakage current level was found to reduce significantly after the doping over a wide range of voltages and temperatures. The leakage current in an undoped capacitor was largely governed by the Fowler–Nordheim tunneling, and its onset voltage was greatly increased in doped capacitors. The suppression of leakage current in doped capacitors appeared to be caused by a widened depletion layer, which decreases the likelihood of tunneling.

Fixed charge density in silicon nitride films on crystalline silicon surfaces under illumination

Abstract: A novel method is applied to determine the fixed positive charge density Q/sub f/ in plasma-enhanced chemical vapor deposited silicon nitride (SiN/sub x/) films on crystalline silicon surfaces. In this method, both surfaces of the SiN/sub x/-passivated silicon wafers are charged using a corona chamber and the deposited charge density is measured by means of a Kelvin probe. Subsequently, the carrier lifetime is measured and Q/sub f/ is determined from the dependence of the measured carrier lifetime on the corona charge density. This measurement technique allows us for the first time to determine the crucial parameter Q/sub f/ under illumination. In contrast to previous studies, a very high Q/sub f/ of about 2.3 /spl times/ 10/sup 12/ cm/sup -2/ is found, which is in good correspondence with CV measurements carried out in the dark. Finally, we show that the injection level dependence of the surface recombination velocity is mainly due to recombination in the space charge region at the Si/SiN/sub x/ interface.

Electron holographic characterization of electrostatic potential distributions in a transistor sample fabricated by focused ion beam

Abstract: A cross-sectional sample of a silicon-metal-oxide semiconductor field-effect transistor, which was directly cut from an integrated circuit wafer, has been prepared carefully using a focused-ion-beam technique and examined by means of off-axis electron holography. In the reconstructed phase image, heavily doped source, and drain regions are revealed clearly as bright contrast, from which an n-channel transistor is identified. In addition, two-dimensional phase distributions around both source and drain regions show a core area with relatively high phase in the heavily doped region, which may be attributed to the effect of doping atoms and residual defects and strains remaining after implantation. The electrostatic potentials across the core area and depletion layer are estimated and discussed. This work demonstrates the feasibility of using a focused-ion-beam technique to prepare electron holographic sections of a wide range of semiconductor devices.

Coupled plasmon–LO-phonon modes in Ga 1 − x Mn x As

Abstract: The vibrational and electronic properties of ${\mathrm{Ga}}_{1\ensuremath{-}x}{\mathrm{Mn}}_{x}\mathrm{As}$ layers with Mn fractions $0l~xl~2.8%,$ grown on GaAs(001) substrates by low-temperature molecular-beam epitaxy, are investigated by micro-Raman spectroscopy and far-infrared (FIR) reflectance spectroscopy. The Raman and FIR spectra are strongly affected by the formation of a coupled mode of the longitudinal optical phonon and the hole plasmon. The spectral line shapes are modeled using a dielectric function where intraband and interband transitions of free holes are included. In addition to the coupled mode, the contributions of a surface depletion layer as well as a symmetry forbidden TO phonon have to be taken into account for the Raman spectra. Values for the hole densities are estimated from a full line-shape analysis of the measured spectra. Annealing at temperatures between 250 and $500\ifmmode^\circ\else\textdegree\fi{}\mathrm{C}$ results in a decrease of the hole density with increasing annealing temperature and total annealing time. Simultaneously, a reduction of the fraction of Mn atoms on Ga lattice sites is deduced from high-resolution x-ray diffraction.

Semiconductor device, method for fabricating the semiconductor device and semiconductor integrated circuit

Abstract: A semiconductor device comprises: a channel region 14 of silicon, a source region 26 and a drain region 26 respectively forming junction with the channel region 14 , and a gate electrode 30 formed on the channel region 14 interposing an insulation film 16 therebetween, either of the source region 26 and the drain region 26 being formed of SiGeC, which lattice-matches with silicon. Whereby parasitic resistance between the source region and the drain region can be much decreased.

Enhanced tunneling in GaN/InGaN multi-quantum-well heterojunction diodes after short-term injection annealing

Abstract: Multi-quantum-well GaN/InGaN heterojunction diodes prepared by metalorganic chemical vapor deposition on sapphire showed effects of strong tunneling in their I–V characteristics. The space charge region was shown to be located in the GaN/InGaN superlattice (SL). The injection of moderately high forward currents through the structure for several hours enhanced the overall tunneling through the structure and facilitated faster tunneling between the layers in the GaN/InGaN SL. These results may have relevance to the aging characteristics of light-emitting diodes under bias.

Quantitative Analysis of the Morphology of Macropores on Low-Doped p-Si Minimum Resistivity

Abstract: Max-Planck-Institute of Microstructure Physics, D-06120 Halle, GermanyThe formation of macropores by anodization of low-doped p-Si in HF electrolyte has been investigated quantitatively. As anod-ization proceeds, structures of increasing characteristic size are formed, then a steady state is reached, where macropores growparallel. The intermediate regime is well understood on the basis of a linear stability approach, incorporating the known physicsand chemistry of the Si/electrolyte interface: semiconductor space charge and interface reaction velocity. The characteristic size ofthe macropores and their dependence on Si doping and electrolyte resistivity and composition are quantitatively accounted forafter realizing that parallel growth is strongly favored by the channeling of the current in the macropores. Below a criticalresistivity, no macropores are observed. It is shown, through a numerical simulation, that this change of behavior results from aloss of the insulating character of the walls, due to effects of disorder in a depletion layer when doping increases.© 2002 The Electrochemical Society. @DOI: 10.1149/1.1507594# All rights reserved.Manuscript submitted January 28, 2002; revised manuscript received April 23, 2002. Available electronically September 12, 2002.

GaAs resistor structures for X-ray imaging detectors

Abstract: Unlike conventional GaAs detector structures, which operation is based on the use of a space charge region of a barrier structure, we propose to form a detector structure of resistor type. In this case, the electric field distribution, ξ ( x ), is not screened by the ion concentration in the SCR but it is defined only by the uniformity of the resistance value distribution in the structure. The experimental results on charge collection efficiency for the detector irradiation with α, β, γ-radiation are presented. It is shown that the amplitude spectrum shape in the case of interaction with γ-radiation is defined mainly by the electron component of the charge. The simulation of the detector response function confirms it. It is established that, despite of hole trapping, it is possible to achieve high values of charge collection efficiency of γ-radiation. Explanation of the charge collection efficiency dependence on a type of ionizing radiation is made. Problems of design of the detector with high charge collection efficiency and low dark current are discussed.

Structures of vertical resistors and FETs as controlled by electrical field penetration and a band-gap voltage reference using vertical FETs operating in accumulation through the field penetration effect

Abstract: A vertical resistor structure with a variable resistance is realized by biasing an adjacent control junction through a shallow trench isolation (STI) structure, thereby forming a depletion layer in the resistor region and varying its resistance. A vertical FET structure which is based on the foregoing vertical resistor structure, and which has a control junction isolated by a base region, can induce an accumulation or depletion layer for turn-on or turn-off operation. A band-gap voltage reference circuit is described using either two such vertical n-channel FET structures (in an n-well) with complimentary control junctions (a p+ junction and an n+/p-base junction) or two such vertical p-channel FET structures with complimentary control junctions (an n+ junction and a p+/n-base junction). The fabrication methods for vertical FETs are compatible with existing CMOS technology.

Semiconductor component for high reverse voltages in conjunction with a low on resistance and method for fabricating a semiconductor component

Abstract: A semiconductor component includes a semiconductor body of a first conductivity type which accommodates a space charge region. Semiconductor regions of a second conductivity type are disposed in at least one plane extending essentially perpendicularly to a connecting line extending between two electrodes. A cell array is disposed under one of the electrodes in the semiconductor body. At least some of the semiconductor regions of the second conductivity type are connected to the cell array via filiform semiconductor zones of the second conductivity type in order to expedite switching processes. A method for fabricating such a semiconductor component is also provided.

Modeling of drain current overshoot and recombination lifetime extraction in floating-body submicron SOI MOSFETs

Abstract: This work reports on a new general modeling of recombination-based mechanisms related to electrically floating-body partially-depleted (PD) SOI MOSFETs. The model describes drain current overshoots induced when turning on the transistor gate and suggests a novel extraction method for the recombination lifetime in the silicon film. We show that the recombination process associated with drain current overshoots in PD silicon-on-insulator (SOI) MOSFETs takes place mainly in the depletion region and not in the neutral region as in case of pulsed MOS capacitors. Associated with existing techniques for generation lifetime extraction, our model offers, for the first time, the possibility of complete and rapid characterization for both generation and recombination lifetime using drain current transients in floating-body SOI MOSFETs. The model is used in order to characterize submicron SOI devices, allowing a thorough investigation of technological parameters impact on floating-body-induced transient mechanisms.

Factors limiting the current gain in high-voltage 4H-SiC npn-BJTs

Abstract: The dependence of the base current gain β on the collector current IC has been measured in high-voltage 4H-SiC bipolar junction transistors at collector current densities jC from 20 to 700 A/cm2. With increasing collector current, the β value grows, reaching a maximum βmax=23 at j C max of about 250 A/cm2 and then decreasing sharply with further increase in current. The peculiarities of this dependence are analyzed in terms of a model taking into account the carrier recombination in the emitter space charge region (SCR), the surface recombination, and the emitter current crowding effect. It is shown that at relatively small jC the recombination in SCR plays a key role in limiting the β magnitudes. The decrease in β at high jC is mainly due to the surface recombination enhanced by the emitter current crowding effect. The effects of surface recombination and recombination in the SCR reduce the maximum current gain almost threefold: from 65 to 23.

Properties of a hole trap in n-type hexagonal GaN

Abstract: Minority carrier transient spectroscopy is performed in Schottky diodes fabricated on hexagonal n-type GaN grown by metalorganic chemical vapor deposition, either doped with two concentrations of Si or unintentionally doped. Capacitance transients are measured after a light pulse sent through the semitransparent contact which generates electron–hole pairs in the depletion zone. They display the characteristic sign of hole emission. The same deep level is detected in all the samples, independent of the doping level and doping species, with a concentration of some 1015 cm−3, even in the sample prepared by epitaxial lateral overgrowth. The ionization energy and capture cross section deduced from Fourier Transform transient spectroscopy are respectively 0.81±0.03 eV and 2×10−14 cm2. Such a capture cross section for holes indicates an attractive potential and hence a negatively charged center before the hole capture. Hole emission is suppressed by electron–hole recombination when a sufficiently long majority carrier pulse is applied after the light pulse. A single recombination time constant is measured and an electron capture cross section near 10−21 cm2, independent of temperature, is deduced. These facts demonstrate that this deep center is a point defect, still negatively charged after a hole has been captured, since it repels electrons, and hence it is a deep acceptor. All these properties fit very well the theoretical predictions previously published about the isolated gallium vacancy in n-type GaN.

Semiconductor device and method for fabricating the same

Abstract: To provide a semiconductor device which can retain information for a long period of time even in a case that the tunnel insulation film is thin. A semiconductor device comprises a first insulation film 14 formed on a semiconductor substrate 10, a floating gate electrode 22 formed on the first insulation film, a second insulation 24 film formed on the floating gate electrode, and a control gate electrode 26 formed on the second insulation film. A depletion layer is formed in the floating gate electrode near the first insulation film in a state that no voltage is applied between the floating gate electrode and the semiconductor substrate.

Direct imaging of the depletion region of an InP p-n junction under bias using scanning voltage microscopy

Abstract: We directly image an InP p–n junction depletion region under both forward and reverse bias using scanning voltage microscopy (SVM), a scanning probe microscopy (SPM) technique. The SVM results are compared to those obtained with scanning spreading resistance microscopy (SSRM) measurements under zero bias on the same sample. The SVM and SSRM data are shown to agree with the results of semiclassical calculations. The physical basis of the SVM measurement process is also discussed, and we show that the measured voltage is determined by the changes in the electrostatic potential and the carrier concentration at the SVM tip with and without the applied bias.

Comparisons between dual-depletion-region and uni-travelling-carrier p-i-n photodetectors

Abstract: Space-charge and thermal calculations are used to compare the performance of gigahertz-bandwidth, high-current p-i-n photodiodes utilising InGaAs absorbers and InGaAs/InP drift layers. By varying the percentage of InGaAs and InP in the drift layer, comparisons can be made between traditional p-i-n photodiodes (100% InGaAs drift layer), dual-depletion region photodiodes (part InGaAs, part InP drift layer), and uni-travelling-carrier (100% InP drift layer) photodiodes. A local maximum in the maximum photocurrent occurs when a charge balance is present in the depletion layer. The results from space-charge and thermal calculations show that traditional p-i-n and dual-depletion region designs can potentially provide performance that exceeds that of the uni-travelling-carrier design. Charge compensation is proposed as a means of increasing the space-charge-limited photocurrent and for controlling the peak electric fields within the depletion region.

High-speed optical modulator

Abstract: An optical modulator is constituted by a planar lightwave circuit incorporating a silicon waveguide (2) provided on a silica substrate (1). The silicon waveguide has a resonant cavity (5) formed therein. The resonant cavity (5) may conveniently be implemented as a periodic array of holes defining a photonic bandgap device. The waveguide may be a photonic crystal waveguide. An electric field is applied to the resonant cavity (5) in order to alter the Q-factor, and hence the transmission properties, thereof, either via the MOS effect or via alteration of the width of the depletion region of a p-n junction. A control unit (10) controls the voltage that is applied to the resonant cavity (5). and thus controls the modulation of light at the resonant frequency/frequencies of the cavity (5).

Edmos device having a lattice type drift region

Abstract: The present invention provides an EDMOS (extended drain MOS) device having a lattice type drift region and a method of manufacturing the same. In the case of n channel EDMOS(nEDMOS), the drift region has a lattice structure in which an n lattice having a high concentration and a p lattice having a low concentration are alternately arranged. As a drain voltage is applied, a depletion layer is abruptly extended by a pn junction of the n lattice and the p lattice, so that the entire drift region is easily depleted. Therefore, a breakdown voltage of the device is increased, and an on resistance of the device is decreased due to the n lattice with high concentration.

A 1.4dB insertion-loss, 5GHz transmit/receive switch utilizing novel Depletion-layer-Extended Transistors (DETs) in 0.18□m CMOS process

Abstract: T. Ohnakado, A. Furukawa, M. Ono*, E. Taniguchi*, S. Yamakawa, K. Nishikawa, T. Murakami, Y. Hashizume, K. Sugahara, and T. Oomori Advanced Technology R&D Center, Mitsubishi Electric Corporation, Amagasaki, Hyogo 661-8661, Japan *Information Technology R&D Center, Mitsubishi Electric Corporation, Kamakura, Kanagawa 247-8501, Japan Tel: +81-6497-7095, Fax: +81-6497-7288, e-mail: onakado@lsi.melco.co.jp