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Depletion region

About: Depletion region is a research topic. Over the lifetime, 9393 publications have been published within this topic receiving 145633 citations.


Papers
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Journal ArticleDOI
TL;DR: In this article, the doping profiles, currentvoltage and photoresponse characteristics of five In0.53Ga0.47As/InP avalanche photodiode (APD) wafers are presented.
Abstract: The doping profiles, current-voltage (I–V) and photoresponse characteristics of five In0.53Ga0.47As/InP avalanche photodiode (APD) wafers are presented. A detailed analysis indicates that the dark current is due largely to generation and recombination of carriers in the diode bulk, and in some wafers tunneling at the p-n junction is dominant near breakdown (VB). In some cases, significant surface currents are also observed. In three high-performance wafers, however, low primary dark currents (∼5 nA) with no evidence for tunnelling at 0.99 VB have been obtained. In addition, microplasmas have been found in some wafers, due to local breakdown possibly arising from crystalline defects. Nevertheless, we report uniform gains as high as 100. The dark current and gain characteristics of these devices are among the best reported to date for In0.53Ga0.47As/InP APDs. Finally, the response of the APDs to fast optical pulses has been analyzed at both low and high illumination intensity. The slow speed of response, which has been reported elsewhere, is considered in detail and is found to be due to charge pile-up at the abrupt n-In0.53Ga0.47As/n-InP heterointerface which is characteristic of our devices. Using an analysis of the response time thermal activation energy along with the transient pulse shape, we infer that the heterointerfaces are graded over a length of 2 L ≌ 300 A . The model predicts that fast response can be obtained for heterointerface grading lengths of 2 L ⩾ 500 A , depending on the epitaxial layer doping and extent of penetration of the depletion region into the In0.53Ga0.47As layer at breakdown.

59 citations

Patent
19 Aug 2010
TL;DR: In this paper, the authors proposed to reduce the leakage current between the source and drain of a nitride-based compound semiconductor formed on a substrate by forming a depletion layer under the auxiliary electrode.
Abstract: PROBLEM TO BE SOLVED: To reduce a leakage current between source and drain of a nitride-based compound semiconductor formed on a substrate. SOLUTION: In a transistor 100, a gate electrode 12, a source electrode 13, and a drain electrode 14 are respectively formed on the surface of the nitride-based compound semiconductor 11 on a silicon substrate (not shown). At least one of the source electrode 13 and drain electrode 14 is surrounded with an auxiliary electrode 15 connected to the gate electrode 12. A leakage current path is cut off by formation of a depletion layer on the nitride-based compound semiconductor 11 under the auxiliary electrode 15. Accordingly, the leakage current between the source and drain can be reduced effectively. COPYRIGHT: (C)2010,JPO&INPIT

59 citations

Journal ArticleDOI
TL;DR: A new CQD ink that is stable in nonpolar solvents is developed via a neutral donor ligand that functions as a phase-transfer catalyst that enables the realization of an efficient graded architecture that improves the built-in field and charge extraction.
Abstract: The best-performing colloidal-quantum-dot (CQD) photovoltaic devices suffer from charge recombination within the quasi-neutral region near the back hole-extracting junction. Graded architectures, which provide a widened depletion region at the back junction of device, could overcome this challenge. However, since today's best materials are processed using solvents that lack orthogonality, these architectures have not yet been implemented using the best-performing CQD solids. Here, a new CQD ink that is stable in nonpolar solvents is developed via a neutral donor ligand that functions as a phase-transfer catalyst. This enables the realization of an efficient graded architecture that, with an engineered band-alignment at the back junction, improves the built-in field and charge extraction. As a result, optimized IR CQD solar cells (Eg ≈ 1.3 eV) exhibiting a power conversion efficiency (PCE) of 12.3% are reported. The strategy is applied to small-bandgap (1 eV) IR CQDs to augment the performance of perovskite and crystalline silicon (cSi) 4-terminal tandem solar cells. The devices show the highest PCE addition achieved using a solution-processed active layer: a value of +5% when illuminated through a 1.58 eV bandgap perovskite front filter, providing a pathway to exceed PCEs of 23% in 4T tandem configurations with IR CQD PVs.

59 citations

Patent
27 Sep 2007
TL;DR: In this article, the authors proposed a solution to dissolve the generation insufficiency of a two-dimensional electron gas layer near a source electrode, where the thickness of a first non p-type layer 104 is non-uniform due to the formation of a projection (center part 103a).
Abstract: PROBLEM TO BE SOLVED: To dissolve the generation insufficiency of a two-dimensional electron gas layer near a source electrode. SOLUTION: The thickness of a first non p-type layer 104 is non-uniform due to the formation of a projection (center part 103a). That is, since the pn junction interface of a p-type semiconductor crystal layer 103 and the first non p-type layer 104 is raised higher than the other part under a gate electrode G, the thickness of the first non p-type layer 104 is thinner than the other part under the gate electrode G. Also, the end of the thick film of the first non p-type layer 104 is extended so as to burrow right under the peripheral edge of a gate insulation film 106. Then, by the structure, the upper end face α of a depletion layer including a pn junction interface does not reach the interface of the first non p-type layer 104 and a second non p-type layer 105 near respective electrodes S and D for conduction. Also, the upper end face α of the depletion layer enters the inside of the second non p-type layer 105 under the gate electrode G. COPYRIGHT: (C)2007,JPO&INPIT

58 citations

Patent
David D. Smith1
30 Nov 2009
TL;DR: In this paper, a solar cell includes abutting P-type and N-type doped regions in a contiguous portion of a polysilicon layer, which is formed on a thin dielectric layer.
Abstract: A solar cell includes abutting P-type and N-type doped regions in a contiguous portion of a polysilicon layer. The polysilicon layer may be formed on a thin dielectric layer, which is formed on a backside of a solar cell substrate (e.g., silicon wafer). The polysilicon layer has a relatively large average grain size to reduce or eliminate recombination in a space charge region between the P-type and N-type doped regions, thereby increasing efficiency.

58 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202326
202266
2021151
2020198
2019229
2018239