Topic
Depletion region
About: Depletion region is a research topic. Over the lifetime, 9393 publications have been published within this topic receiving 145633 citations.
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TL;DR: In this paper, the authors developed the theory of capacitance transient of a junction in the case where the usual approximation, namely that the defect concentration N T is not negligible compared to the free carrier concentration, is not fulfilled.
Abstract: We have developed the theory of the capacitance transient of a junction in the case where the usual approximation, namely that the defect concentration N T is not negligible compared to the free carrier concentration, is not fulfilled. We show that the correct analysis of this transient by the so-called Deep Level Transient Spectroscopy technique must take into account the fact that, during the transient, the width of the space charge region varies. The validity of the expressions obtained for the shift of the signature (variation of the emission rate vs temperature) and for the concentration N t is verified by comparison with experimental results obtained for electron induced defects in n -GaAs.
45 citations
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14 Dec 2009TL;DR: In this article, an embodiment of a Geiger-mode avalanche photodiode includes a body of semiconductor material having a first conductivity type, a first surface and a second surface; a trench extending through the body from the first surface to an active region; a lateral-isolation region within the trench, formed by a conductive region and an insulating region of dielectric material, the insulating regions surrounding the conductive regions.
Abstract: An embodiment of a Geiger-mode avalanche photodiode includes a body of semiconductor material having a first conductivity type, a first surface and a second surface; a trench extending through the body from the first surface and surrounding an active region; a lateral-isolation region within the trench, formed by a conductive region and an insulating region of dielectric material, the insulating region surrounding the conductive region; an anode region having a second conductivity type, extending within the active region and facing the first surface. The active region forms a cathode region extending between the anode region and the second surface, and defines a quenching resistor. The photodiode has a contact region of conductive material, overlying the first surface and in contact with the conductive region for connection thereof to a circuit biasing the conductive region, thereby a depletion region is formed in the active region around the insulating region.
45 citations
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IBM1
TL;DR: In this article, a dynamic random access memory (DRAM) incorporating a capacitor and a DRAM incorporating such a capacitor, including a first layer of conducting, doped perovskite material, a second layer of another conducting, di erent polarity in contact with the first layer and a depletion layer formed at an interface between the first and second layers of conducting pervskite materials, the depletion layer being an insulating layer of the capacitor.
Abstract: A capacitor and a dynamic random access memory (DRAM) incorporating such a capacitor, includes a first layer of conducting, doped perovskite material, a second layer of another conducting, doped perovskite of opposite polarity in contact with the first layer, and a depletion layer formed at an interface between the first and second layers of conducting perovskite materials, the depletion layer being an insulating layer of the capacitor. Another capacitor and DRAM incorporating such a capacitor, includes a first electrode, a second electrode opposing the first electrode, and a thin-film of high dielectric constant perovskite material sandwiched between the first and second electrodes. At least one of the first and second electrodes is formed from substantially the same perovskite material, as the thin-film, in conducting, doped form.
45 citations
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TL;DR: In this article, the quasi-static capacitance-voltage (C-V) technique was used to measure the dependence of junction capacitance on the bias voltage by applying a slow, reverse-bias voltage ramp to the solar cell in the dark, using simple circuitry.
Abstract: The quasi-static capacitance-voltage ( C-V) technique measures the dependence of junction capacitance on the bias voltage by applying a slow, reverse-bias voltage ramp to the solar cell in the dark, using simple circuitry. The resulting C-V curves contain information on the junction area and base dopant concentration, as well as their built-in potential. However, in the case of solar cells made on low to medium resistivity substrates and having thick emitters, the emitter dopant profile has to be taken into account. A simple method can then be used to model the complete C-V curves, which, if the base doping is known, permits one to estimate the emitter doping profile. To illustrate the method experimentally, several silicon solar cells with different base resistivities have been measured. They comprise a wide range of areas, surface faceting conditions and emitter doping profiles. The analysis of the quasi-static capacitance characteristics of the flat surface cells resulted in good agreement with independent data for the wafer resistivity and the emitter doping profile. The capacitance in the case of textured surfaces is a function of the effective junction area, which is otherwise difficult to measure, and is essential to understand the emitter and space charge region recombination currents. The results indicate that the effective area of the junction is not as large as the area of the textured surface.
45 citations
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21 Feb 1994TL;DR: In this paper, a high-speed FET with a sufficiently high output current, and an FET having a high mobility of channel electrons and a high electron saturation rate is presented.
Abstract: OF THE DISCLOSURE This invention provides a high-speed FET with a sufficiently high output current, and an FET having a high mobility of channel electrons and a high electron saturation rate For this purpose, in this invention, a buffer layer, a first channel layer, a first spacer layer, a second channel layer, a second spacer layer, a third channel layer, and a capping layer are sequentially epitaxially grown on a semi-insulating GaAs semiconductor substrate Drain and source regions are formed, and a gate electrode is formed to Schottky-contact the capping layer Drain and source electrodes are formed to ohmic-contact the drain and source regions Extension of a surface depletion layer from the substrate surface to a deep portion is prevented by the third channel layer closest to the substrate surface For this reason, a sufficient quantity of electrons for forming a current channel are assured by the second and first channel layers
45 citations