Showing papers on "Design for testing published in 1979"

The Mimola Design System a Computer Aided Digital Processor Design Method

Abstract: A top-down design method is presented. The design starts with an algorithmic description of the problems and attempts to find an optimal hardware structure for the solution of the problems. Comparisons with methods using hardware and functional descriptions are included. The application of the macro processor is explained.

Testing Logic Networks and Designing for Testability

Abstract: VLSI has brought exciting increases in circuit density and performance capability. But it has also aggravated the problem of chip, component and system testing. Here are some approaches to dealing with that problem.

Design Verification Based on Functional Abstraction

Abstract: The aim of this report is to show the feasibility of automatic hardware verification based on functional abstraction. This is defined as the process of extracting the behavior of a product from its static structural description. A general discussion of possible approaches to design verification points out that functional abstraction is a very important part of any system for automatic hardware verification. Some of the tools developed for proofs of program correctness can be used when dealing with digital designs. In the present paper, the problems specific to hardware verification are singled out and investigated. Several tools specific to design verification, that were developed during the reported research, are briefly reviewed. The appendix begins with results of automatic analysis of basic modules (actual TTL components: flip-flops and an adder). These modules are then used in the realisation of more complex circuits. As an instructive example, three different designs implementing the same specifications are analyzed, and it is shown that the reported system is able to extract their common behavior.

Layout and test design of synchronous LSI circuits

Abstract: A design system for customized low-power digital dynamic circuitry will be described. The logic design process uses synchronous logic. The layout has a row organization which permits automatic layout design and automatic generation of accept-reject information.

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