Showing papers on "Design for testing published in 1981"

Design for Autonomous Test

Abstract: A technique for modifying networks so that they are capable of self test is presented. The major innovation is partitioning the network into subnetworks with sufficiently few inputs that exhaustive testing of the subnetworks is possible.

Design of Easily Testable Bit-Sliced Systems

Abstract: Bit-sliced systems are formed by interconnecting identical slices or cells to form a one-dimensional iterative logic array (ILA). This paper presents several design techniques for constructing easily testable bit-sliced systems. Properties of ILA's that simplify their testing are examined. C-testable ILA's, which require a constant number of test patterns independent of the array size, are characterized, and a method for making an arbitrary ILA C-testable is presented. A new testability concept for arrays called I-testability is introduced. I-testability ensures that identical test responses can be obtained from every cell in an ILA, and thus simplifies response verification. I-testable ILA's are characterized, as well as CI-testable arrays, which are simultaneously C- and I-testable. A method of making an arbitrary ILA CI-testable is presented. The application of C- and I-testing to the design of bit-sliced (micro-) computers is investigated. For this purpose a family of easily testable processor slices is described. The design of a self-testing CPU based on I-testing is discussed, and compared with a more conventional self-testing design.

LSI logic testing — An overview

Abstract: The development of large scale integration (LSI) testing is reviewed. The paper concentrates on the testing of logic components and presents in-depth discussions of the methods of fault modeling, test pattern generation, fault simulation, and design for testability. It is shown how these methods are used in the design of components and how they can be used in support of design automation. Finally, a brief account of test equipment and test data preparation is given.

A Survey of the State of the Art of Design Automation

Abstract: Automated layout of PCBs and LSI chips is a successful operation; testing is an active area of development. DA tools, however, are seldom used in logic design.

Measuring designer performance to verify design automation systems

Abstract: Design automation at the register transfer level of design is still in its infancy, and it is not yet completely understood what the appropriate measures used in direction the automated design process should be. To establish these measures, results of these design automation systems must be compared with some near optimal designs. A set of statistically based experiments is developed to estimate near optimal designs. A method is demonstrated for gathering data on designer performance, specifically at the different levels of systems design, and in general for calibration of other design automation systems where the intuitive designer still performs more capably than the present design algorithms. An analysis of variance is used to indicate the relative importance of various decisions in a system design. It is shown that the algorithm to be implemented and the hardware design style account for 90 percent of the variation in the results. Thus, selecting the design style (e.g., distributed, microprocessor, pipelined, etc.) is the most important parameter for a design automation system.

New Measures of Testability and Test Complexity for Linear Analog Failure Analysis

Abstract: The failure analysis of analog electronic systems is characterized by numerous, difficult problems. Assessing the testability and test complexity of a given system is one such problem. In fact, robust, quantitative measures of these important features have not been available to the analog testing community. This paper introduces new measures for both testability and test complexity which: 1) are quantitative, 2) are capable of handling multiple faults, and 3) have a well-defined interpretation. These measures are based upon published results from optimal experiment designs as developed in the discipline of systems identification. Parameter testability is defined in terms of information (in the sense of Fisher) return, while test complexity is functionally related to the experiment time required to achieve specified accuracy with regard to the uncertain parameters of interest. Thus both of the new measures introduced depend, not only upon the specific system at hand, but also upon the experimental conditions used in performing the tests. The results of this approach lead to quantitative measures that have optimality features based upon the Cramer–Rao bound.

The Impact of Testing on VLSI Design Methods

Abstract: The question ``why design for testability?'' will be answered by discussing some existing test philosophies. Exhaustive testing, functional testing and structural testing will be treated, also with regard to their usefulness for VLSI circuits. There is no general agreement on how to design for testability. Various approaches exist, and each has its specific applications. Some of these approaches will be discussed in detail, also regarding the influence of the complexity on necessary CAD tools for test pattern generation.