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Digital electronics

About: Digital electronics is a research topic. Over the lifetime, 10354 publications have been published within this topic receiving 153532 citations.


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01 Jan 1991
TL;DR: In this paper, the authors discuss the need for EMC EMC legislation and standards interference coupling mechanisms circuit design and layout shielding filtering cables and connectors EMC design checklist and safety design for production testability reliability thermal management.
Abstract: Part 1 Grounding and wiring: grounding wiring and cables transmission lines. Part 2 Printed circuits: board types design rules surface protection surface mount sourcing boards and artwork. Part 3 Passive components: resistors potentiometers capacitors inductors crystals. Part 4 Active components: diodes thyristors and triacs bipolar transistors junction field effect transistors MOSFETs. Part 5 Linear integrated circuits: the ideal op-amp the practical op-amp comparators voltage references. Part 6 Digital circuits: logic ICs interfacing microprocessor watchdogs and supervision software techniques. Part 7 Power supplies: general input and output parameters abnormal conditions mechanical requirements batteries. Part 8 Electromagnetic compatibility: the need for EMC EMC legislation and standards interference coupling mechanisms circuit design and layout shielding filtering cables and connectors EMC design checklist. Part 9 General product design: safety design for production testability reliability thermal management.

57 citations

Journal ArticleDOI
TL;DR: A complete logic family for static ASL comprising of majority logic gates is developed using previously developed physics-based circuit models for ASL and refined for ferromagnets to include spin relaxation inside ferromagnetic metals (FMs).
Abstract: Spin-based devices, in which information is carried via electron spin rather than electron charge, are potential candidates to complement CMOS technology due to the promise of non-volatility and compact implementation of logic gates. One class of such devices is all-spin logic (ASL) which is based on switching ferromagnets by spin transfer torque and conduction of spin-polarized current. Using previously developed physics-based circuit models for ASL, we develop a complete logic family for static ASL comprising of majority logic gates. We compare its performance metrics by means of circuit simulations using our Verilog-A compact models. We also show the novel implementations of sequencing elements (e.g., latch and D flip-flop) to enable clocked ASL. We also refine the models for ferromagnets to include spin relaxation inside ferromagnetic metals (FMs).

57 citations

Proceedings ArticleDOI
14 Jun 1982
TL;DR: Preliminary comparisons between RELAX and the standard circuit simulator SPICE2 have shown that RELAX is a fast and reliable circuit simulator.
Abstract: Algorithms and techniques used in RELAX are described. RELAX is a time domain MOS digital circuit simulator based on a new analysis method called Waveform Relaxation Method [1] which exploits decomposition techniques. Preliminary comparisons between RELAX and the standard circuit simulator SPICE2 have shown that RELAX is a fast and reliable circuit simulator.

57 citations

Journal ArticleDOI
TL;DR: A simple device model is derived to represent merged transistor logic (MTL) circuit behavior and it is shown that MTL devices can be basically interpreted as n-p-n transistors having an additional base current source.
Abstract: A simple device model is derived to represent merged transistor logic (MTL) circuit behavior. Using the Ebers-Moll equations, the proper definitions of the various current gains are derived, and it is shown that MTL devices can be basically interpreted as n-p-n transistors having an additional base current source. The relations between the intensity of this source and the current actually supplied are derived. Time behavior is modeled according to the charge control concept. Using this model, circuit delays are given as a function of current gains, collector and emitter time constants, supply current, and of fan-out.

57 citations

Journal ArticleDOI
TL;DR: In this article, the first experimental demonstration of fanout using magnetizations of nanomagnets in the NML scheme is presented, where magnetic force microscopy images of functioning fanout circuits are shown.
Abstract: Nanomagnet logic (NML) shows great promise as an alternative to conventional digital architectures. We present the first experimental demonstration of fanout using magnetizations of nanomagnets in the NML scheme. Specifically, we show magnetic force microscopy images of functioning fanout circuits.

57 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202369
2022156
2021171
2020255
2019255
2018250