scispace - formally typeset
Search or ask a question
Topic

Digital electronics

About: Digital electronics is a research topic. Over the lifetime, 10354 publications have been published within this topic receiving 153532 citations.


Papers
More filters
Journal ArticleDOI
TL;DR: This logic technique offers greater area efficiency, higher speeds of operation, and simpler design algorithms than conventional CMOS pass-transistor logic.
Abstract: This logic technique offers greater area efficiency, higher speeds of operation, and simpler design algorithms than conventional CMOS pass-transistor logic. Experimental results and the automated techniques used in implementing efficient pass-transistor layouts are presented. The application of CMOS differential pass-transistor logic design in custom applications is also discussed.

47 citations

Journal ArticleDOI
TL;DR: In this article, the shape of high-bandwidth signals in CMOS circuits has been studied in the sub-nanosecond range, for instance, the rise time of a clock edge or the detailed shape of noise pulses.
Abstract: In this Letter we present a technique to measure details of the shape of high-bandwidth signals in CMOS circuits. This technique allows us to study quantities in the subnanosecond range as, for instance, the rise time of a clock edge or the detailed shape of noise pulses.

47 citations

Proceedings ArticleDOI
06 Jun 1994
TL;DR: A new design approach that combines logic and layout synthesis for Cellular-Architecture (CA) FPGAs and produces a rectangularly-shaped multi-level structure of (mostly) locally connected cells that is well suited for CA-type FPGA realization.
Abstract: This paper introduces a new design approach that combines logic and layout synthesis for Cellular-Architecture (CA) FPGAs. The comprehensive design method starts from a Boolean function, specified as SOP or ESOP, and produces a rectangularly-shaped multi-level structure of (mostly) locally connected cells. This two-dimensional array of logic cells is well suited for CA-type FPGA realization. Two stages: restricted factorization and technology folding are discussed in more details. The architecture constraints and the implementation are presented for ATMEL6000 series architecture.

47 citations

Journal ArticleDOI
TL;DR: A new design method is proposed that exploits in original ways the properties of auxiliary propagate and generates signals to reduce the number of majority gates required to implement adders in QCA and/or the addition time.
Abstract: The quantum-dot cellular automata (QCA) approach is an attractive emerging technology suitable for the development of ultradense low-power high-performance digital circuits. Even though several solutions have been proposed recently for binary addition circuits, the design of efficient adders in QCA still poses several challenges since, most often, designers tend to implement strategies and methodologies close to those consolidated for the CMOS logic design. In this paper, we propose a new design method that exploits in original ways the properties of auxiliary propagate and generates signals to reduce the number of majority gates required to implement adders in QCA and/or the addition time. Three new formulations of basic logic equations frequently used in the designs of fast binary adders are proposed. To evaluate the potential advantage of the new strategy, two examples of application of the aforementioned method are discussed in this paper.

47 citations

Book
28 Apr 2008
TL;DR: This clear and logical book presents a range of novel techniques for the rapid and reliable design of digital systems using FSMs, detailing exactly how and where they can be implemented.
Abstract: As digital circuit elements decrease in physical size, resulting in increasingly complex systems, a basic logic model that can be used in the control and design of a range of semiconductor devices is vital. Finite State Machines (FSM) have numerous advantages; they can be applied to many areas (including motor control, and signal and serial data identification to name a few) and they use less logic than their alternatives, leading to the development of faster digital hardware systems. This clear and logical book presents a range of novel techniques for the rapid and reliable design of digital systems using FSMs, detailing exactly how and where they can be implemented. With a practical approach, it covers synchronous and asynchronous FSMs in the design of both simple and complex systems, and Petri-Net design techniques for sequential/parallel control systems. Chapters on Hardware Description Language cover the widely-used and powerful Verilog HDL in sufficient detail to facilitate the description and verification of FSMs, and FSM based systems, at both the gate and behavioural levels. Throughout, the text incorporates many real-world examples that demonstrate designs such as data acquisition, a memory tester, and passive serial data monitoring and detection, among others. A useful accompanying CD offers working Verilog software tools for the capture and simulation of design solutions. With a linear programmed learning format, this book works as a concise guide for the practising digital designer. This book will also be of importance to senior students and postgraduates of electronic engineering, who require design skills for the embedded systems market.

47 citations


Network Information
Related Topics (5)
Electronic circuit
114.2K papers, 971.5K citations
92% related
Integrated circuit
82.7K papers, 1M citations
91% related
CMOS
81.3K papers, 1.1M citations
91% related
Transistor
138K papers, 1.4M citations
87% related
Semiconductor memory
45.4K papers, 663.1K citations
86% related
Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202369
2022156
2021171
2020255
2019255
2018250