Digital electronics

About: Digital electronics is a research topic. Over the lifetime, 10354 publications have been published within this topic receiving 153532 citations.

Digital linearization circuit

Abstract: A solution is disclosed for achieving a functional complex base-band adaptive digital nonlinear device model providing RF-power amplifier distortion (i.e. linearization or pre-distortion) minimizing distortion characterization including memory effects. The present inventive solution is based on real device non-linear performance observations and the physical cause for the distortion is compensated in the application. This also means that a pre-distorter digital circuit is derived to have the inverse functionality of the digital device model. The model and the digital pre-distortion circuit are designed in such way, that function blocks are connected in cascade. Each function block is then designed to handle a certain type of distortion performance and can be optimized individually. The model gives possibilities to describe and evaluate different device properties. An accurate AM to AM and AM to PM characterization can be evaluated and the frequency response of the device when excited with envelope-modulated signals can be evaluated. The properties evaluated can also be used in a test procedure in a production facility to verify production quality.

Fundamentals of Digital Logic with VHDL Design with CD-ROM

Abstract: Fundamentals of Digital Logic With VHDL Design teaches the basic design techniques for logic circuits. It emphasizes the synthesis of circuits and explains how circuits are implemented in real chips. Fundamental concepts are illustrated by using small examples, which are easy to understand. Then, a modular approach is used to show how larger circuits are designed. VHDL is used to demonstrate how the basic building blocks and larger systems are defined in a hardware description language, producing designs that can be implemented with modern CAD tools. The book emphasizes the concepts that should be covered in an introductory course on logic design, focusing on: Logic functions, gates, and rules of Boolean algebra Circuit synthesis and optimization techniques Number representation and arithmetic circuits Combinational-circuit building blocks, such as multiplexers, decoders, encoders, and code converters Sequential-circuit building blocks, such as flip-flops, registers, and counters Design of synchronous sequential circuits Use of the basic building blocks in designing larger systems It also includes chapters that deal with important, but more advanced topics: Design of asynchronous sequential circuits Testing of logic circuits For students who have had no exposure to basic electronics, but are interested in learning a few key concepts, there is a chapter that presents the most basic aspects of electronic implementation of digital circuits. Major changes in the second edition of the book include new examples to clarify the presentation of fundamental concepts over 50 new examples of solved problems provided at the end of chapters NAND and NOR gates now introduced in Chapter 2 more complete discussion of techniques for minimization of logic functions in Chapter 4 (including the tabular method) a new chapter explaining the CAD flow for synthesis of logic circuits Altera's Quartus II CAD software provided on a CD-ROM three appendices that give tutorials on the use of Quartus II software Table of contents 1 Design Concepts 2 Introduction to Logic Circuits 3 Implementation Technology 4 Optimized Implementation of Logic Functions 5 Number Representation and Arithmetic Circuits 6 Combinational-Circuit Building Blocks 7 Flip-Flops, Registers, Counters, and a Simple Processor 8 Synchronous Sequential Circuits 9 Asynchronous Sequential Circuits 10 Digital System Design 11 Testing of Logic Circuits 12 Computer Aided Design Tools Appendix A VHDL Reference Appendix B Tutorial 1 - Using Quartus II CAD Software Appendix C Tutorial 2 - Implementing Circuits in Altera Devices Appendix D Tutorial 3 - Physical Implementations in a PLD Appendix D Commercial Devices

TETA: transistor-level waveform evaluation for timing analysis

Abstract: Static timing analysis breaks down the longest path problem into waveform analysis of paths of logic stages that are comprised of nonlinear transistors and complex RLC loads. Runtime efficiency is of the utmost importance; however, the waveform evaluation of these logic stages cannot be accelerated via timing simulation algorithms that attempt to exploit temporal or spatial latency since the simulation problem is already a partitioned one. TETA was developed as a general purpose transistor-level waveform evaluation engine for providing accuracy-efficiency tradeoffs for these logic-stage waveform evaluation problems that are encountered during timing analysis. Of particular emphasis are the large RC(L) coupled logic stages which present the bottleneck for waveform evaluation along multiple stages of a digital circuit path. TETA applies a novel compaction scheme for the logic-stage transistor clusters and employs a novel nonlinear algebraic solution method to analyze the circuit. Importantly, stability of the waveform evaluation with TETA requires only stable single-input multi-output N-port interconnect models that are not necessarily passive. Waveform evaluators that use general transistor and piecewise linear device models require provably passive multi-input multi-output interconnect models that can be extremely inefficient for large coupled N-port problems. Furthermore, the methodology in TETA brings extra efficiency by avoiding extra matrix factorizations and enabling the use of device model tables without any loss of accuracy. Complex logic gates and nonlinear capacitors are handled without loss of generality.

Positive-Feedback Level Shifter Logic for Large-Area Electronics

Abstract: Positive-feedback Level Shifter (PLS) logic is proposed in this paper for the design of unipolar digital circuits manufactured at low temperature on foil using organic or metal-oxide semiconductors. Positive feedback and a suitable control voltage provide high gain and a symmetrical input-output characteristic even in presence of large TFT variations, enabling robust digital design. The measured gain improves from 13 dB in traditional Zero-Vgs inverters to 76 dB in PLS inverters; the average noise margin increases from 2.58 V (Zero-Vgs) to 6.82 V (PLS) at 20 V supply. Assuming that a positive noise margin for each gate is the only requirement to obtain a fully functional digital circuit, the maximum number of logic gates compatible with a 90% yield improves from 200 Zero-Vgs inverters to above 24 million PLS inverters. A 240-stage PLS shift-register exploiting 13,440 organic TFTs is indeed successfully measured. This is to the authors' knowledge the organic circuit with the highest transistor count ever demonstrated. The control voltage, always within the supply rails, enables automatic correction of the process variations using linear control circuits. The proposed approach will enable a strong increase in the complexity of large-area electronics on foil, with great benefit to applications like flexible displays and large-area sensing surfaces.

Apparatus and method for testing digital circuits

Abstract: A device is disclosed which converts a digital signal or bit stream into a digital signature repesentative of the digital signal by means of a feedback shift register. The apparatus may be used to identify and characterize digital signals at various test points in an apparatus for testing purposes. Signatures for digital signals from properly operating circuits can be recorded in a variety of fashions for later comparison with signatures of digital signals from circuits under test. The comparison of the signatures enables a person using the apparatus to determine whether the circuit under test is operating properly and, if it is not, to locate the fault in many instances. The apparatus may also be used to examine digital signals to enable identification of transient errors.