Digital electronics

About: Digital electronics is a research topic. Over the lifetime, 10354 publications have been published within this topic receiving 153532 citations.

Complete logic family using tunneling-phase-logic devices

Abstract: This paper presents the work done to develop and characterize the behavior of binary tunneling phase logic (TPL) devices. Three input NAND, NOR and MINORITY functions are demonstrated using a single TPL element. The fan-out of the gates is discussed as well as the loading effects of multiple gates in cascade. Stable regions of operation are reported and future research possibilities are explored.

Reliability-Aware Synthesis of Combinational Logic With Minimal Performance Penalty

Abstract: Strategies to mitigate soft errors in combinational logic have resulted in large performance penalties and increases in design time. This study alleviates these issues by using standard cells to selectively harden vulnerable nodes in combinational logic. Results indicate that replacing two-input gates with four-input equivalents reduces pulse widths by 5%-20% with less than 1% power overhead. Additionally, this paper demonstrates reliability gains that can be made at the synthesis level under tight performance constraints.

Design considerations for integrated continuous-time chaotic oscillators

Abstract: This paper presents an optimization procedure to choose the chaotic state equation which is best suited for implementation using Gm-C integrated circuit techniques. The paper also presents an analysis of the most significant hardware nonidealities of Gm-C circuits on the chaotic operation-the basis to design robust integrated circuits with reproducible and easily controllable behavior. The techniques in the paper are illustrated through a circuit fabricated in 2.4-/spl mu/m double-poly technology.

A Coherent Ising Machine for MAX-CUT Problems: Performance Evaluation against Semidefinite Programming and Simulated Annealing

Abstract: An optical parametric oscillator network driven by a quantum measurement-feedback circuit, composed of optical homodyne detectors, analog-to-digital conversion devices and field programmable gate arrays (FPGA), is proposed and analysed as a scalable coherent Ising machine. The new scheme has an advantage that a large number of optical coupling paths, which is proportional to the square of a problem size in the worst case, can be replaced by a single quantum measurement-feedback circuit. There is additional advantage in the new scheme that a three body or higher order Ising interaction can be implemented in the FPGA digital circuit. Noise associated with the measurement-feedback process is governed by the standard quantum limit. Numerical simulation based on c-number coupled Langevin equations demonstrate a satisfying performance of the proposed Ising machine against the NP-hard MAX-CUT problems.

Switched-capacitor realization of presynaptic short-term-plasticity and stop-learning synapses in 28 nm CMOS.

Abstract: Synaptic dynamics, such as long- and short-term plasticity, play an important role in the complexity and biological realism achievable when running neural networks on a neuromorphic IC. For example, they endow the IC with an ability to adapt and learn from its environment. In order to achieve the millisecond to second time constants required for these synaptic dynamics, analog subthreshold circuits are usually employed. However, due to process variation and leakage problems, it is almost impossible to port these types of circuits to modern sub-100nm technologies. In contrast, we present a neuromorphic system in a 28 nm CMOS process that employs switched capacitor (SC) circuits to implement 128 short-term plasticity presynapses as well as 8192 stop-learning synapses. The neuromorphic system consumes an area of 0.36 mm² and runs at a power consumption of 1.9 mW. The circuit makes use of a technique for minimizing leakage effects allowing for real-time operation with time constants up to several seconds. Since we rely on SC techniques for all calculations, the system is composed of only generic mixed-signal building blocks. These generic building blocks make the system easy to port between technologies and the large digital circuit part inherent in an SC system benefits fully from technology scaling.