Digital electronics

About: Digital electronics is a research topic. Over the lifetime, 10354 publications have been published within this topic receiving 153532 citations.

Time-interleaved analog-to-digital converters: status and future directions

Abstract: We discuss time-interleaved analog-to-digital converters (ADCs) as a prime example of merging analog and digital signal processing. A time-interleaved ADC (TI-ADC) consists of M parallel channel ADCs that alternately take samples from the input signal, where the sampling rate can be increased by the number of channels compared to a single channel. We recall the advantages of time interleaving and investigate the problems involved. In particular, we explain the error behavior of mismatches among the channels, which distort the output signal and reduce the system performance significantly, and provide a concise framework for dealing with them. Based on this analysis, we review the principle possibilities of calibrating TI-ADCs, where we point out the necessities and advantages of digital enhancement. To this end, we discuss open issues of channel mismatch identification as well as channel mismatch correction.

Semi-conductor integrated circuits/systems

Abstract: Configurable semiconductor integrated circuits as-made each have a plurality of logic circuits formed at discrete sites. For each logic circuit, direct selectably conducting/non-conducting connection paths extend from its output to input of a first set of other logic circuits and to its inputs from outputs of a second set of other logic circuits. All of the sets for all of the logic circuits are each different. Other direct connection paths are selectably connectable to inputs and outputs of the logic circuits. Selection can be irreversible or reversible and involves coincident signal addressing of the sites and coded configuring of the paths at that site. Reversible selection can be via field effect transistors or bipolar transistors and can be at or near normal logic signal levels and speeds. Versatile configurable input/output arrangements are described also reconfigurable data processing systems using the reversible transistor provisions.

Test Generation for MOS Circuits Using D-Algorithm

Abstract: An application of the D-algorithm in generating tests for MOS circuit faults is described. The MOS circuits considered are combinational and acyclic but may contain transmission gates and buses. Tests are generated for both, the stuck type faults and the transistor faults (open and short). A logic model is derived for the MOS circuits. In addition to the conventional logic gates, a new type of modeling block is used to represent the "memory" state caused by the "open" transistors. Every fault, whether a stuck type fault or a transistor fault, is represented in the model as a stuck fault at a certain gate input. For generating tests, however, the D-algorithm needs modification. The singular cover and the D-cubes for the new gate include some memory states. To handle the memory state, an initialization procedure has been added to the consistency part of the D-algorithm. The procedure of modeling and test generation is finally extended to transmission gates and buses.

All-printed large-scale integrated circuits based on organic electrochemical transistors.

Abstract: The communication outposts of the emerging Internet of Things are embodied by ordinary items, which desirably include all-printed flexible sensors, actuators, displays and akin organic electronic interface devices in combination with silicon-based digital signal processing and communication technologies. However, hybrid integration of smart electronic labels is partly hampered due to a lack of technology that (de)multiplex signals between silicon chips and printed electronic devices. Here, we report all-printed 4-to-7 decoders and seven-bit shift registers, including over 100 organic electrochemical transistors each, thus minimizing the number of terminals required to drive monolithically integrated all-printed electrochromic displays. These relatively advanced circuits are enabled by a reduction of the transistor footprint, an effort which includes several further developments of materials and screen printing processes. Our findings demonstrate that digital circuits based on organic electrochemical transistors (OECTs) provide a unique bridge between all-printed organic electronics (OEs) and low-cost silicon chip technology for Internet of Things applications. Though designing digital circuits using organic electrochemical transistors (OECTs) is promising due to their high performance, inherent large footprint limits adoption. Here, the authors report staggered top-gate OECTs for all-printed integrated circuits with fast switching and small footprint.

Noise in digital dynamic CMOS circuits

Abstract: Dynamic logic is an attractive circuit technique giving reduced area and increased speed for CMOS circuits. Static logic has a major advantage: its superior noise margins. To be able to choose between a static and a dynamic implementation of a design, we need to know the requirements for dynamic logic. Here we try to identify possible errors, estimate the limits and discuss some possible solutions when considering noise in dynamic circuits. >