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Digital electronics

About: Digital electronics is a research topic. Over the lifetime, 10354 publications have been published within this topic receiving 153532 citations.


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Journal ArticleDOI
TL;DR: Reconfigurable silicon nanowire field-effect transistors (RFETs) combine the functionality of classical unipolar p-type and n-type FETs in one universal device, and it is shown that an asymmetric transistor layout with individual optimization of both top gates can be used to increase the speed of those circuits.
Abstract: Reconfigurable silicon nanowire field-effect transistors (RFETs) combine the functionality of classical unipolar p-type and n-type FETs in one universal device. In this paper, we show devices exhibiting full symmetry between p- and n-functionality, while having identical geometry. Scaling trends and feasibility for digital circuit integration are evaluated based on TCAD simulations. The method of logical effort is applied to analyze fundamental differences in circuit topology using this unique type of multigate transistors. We introduce a set of multifunctional logic gates based on RFETs providing all basic Boolean functions, including nand / nor , and / or, and xor/xnor, and compared them with classical implementations. Two 1-bit full adders based on those gates are presented as an insightful example that RFETs are one possible solution to increase the system functionality. Moreover, it is shown that an asymmetric transistor layout with individual optimization of both top gates can be used to increase the speed of those circuits.

96 citations

Journal ArticleDOI
TL;DR: Optical interferometric logic gates in metal slot waveguide network are designed and investigated by electromagnetic simulations and show large intensity contrast for the Boolean logic states of the output.
Abstract: Optical interferometric logic gates in metal slot waveguide network are designed and investigated by electromagnetic simulations. The designed logic gates can realize all fundamental logic operations. A single Y-shaped junction can work as logic gate for four logic functions: AND, NOT, OR and XOR. By cascading two Y-shaped junctions, NAND, NOR and XNOR can be realized. The working principle is analyzed in detail. In the simulations, these gates show large intensity contrast for the Boolean logic states of the output. These results can be useful for future integrated optical computing.

96 citations

Journal ArticleDOI
05 Nov 1989
TL;DR: The SPECS simulator as discussed by the authors is a piecewise approximate, tree/link based, event driven, variable accuracy circuit simulation algorithm that uses table models for device evaluation and can be built at various levels of accuracy.
Abstract: Conventional circuit simulation methods are inflexible and slow, especially for large circuits. Piecewise approximate circuit simulation, an alternative that can be more efficient and allows variable accuracy in the simulation process, is discussed. Thus, the tradeoff between accuracy and CPU time is in the hands of the user. SPECS (simulation program for electronic circuits and systems) is the prototype implementation of a piecewise approximate, tree/link based, event driven, variable accuracy circuit simulation algorithm that uses table models for device evaluation. The models can be built at various levels of accuracy, and concomitant levels of precision are reflected in the simulation results. SPECS has been benchmarked on some large, industrial circuits and has proven to be an efficient and reliable simulator. However, it suffers a penalty in run time while simulating stiff circuits, or circuits with a wide range of time constants. The authors present enhanced algorithms used in SPECS to ensure efficient steady-state computation for stiff circuits. >

96 citations

Patent
11 Apr 2007
TL;DR: In this paper, a low latency signal processing chain consisting of analogue-to-digital conversion, digital processing, and digital-toanalogue conversion is proposed for ambient noise reduction.
Abstract: The invention provides a digital circuit arrangement for an ambient noise-reduction system affording a higher degree of noise reduction than has hitherto been possible, through the use of a low latency signal processing chain consisting of analogue-to-digital conversion, digital processing and digital-to-analogue conversion. The arrangement converts the analogue signals into N-bit digital signals at sample rate f0, and then subjects the converted signals to digital filtering. The value of N in some embodiments is 1 but, in any event, is no greater than 8, and f0 may be 64 times the Nyquist sampling rate but, in any event, is substantially greater than the Nyquist sampling rate. This permits digital processing to be used without incurring group delay problems that rule out the use of conventional digital processing in this context. Furthermore, adjustment of the group delay can readily be achieved, in units of a fraction of a micro-second, providing the ability to fine tune the group delay for feed forward applications.

95 citations

Journal ArticleDOI
TL;DR: The validity of the basic idea behind the circuits presented here is proven, and the device counts and the number of logic stages required for the present circuits are less than half those for conventional ones.
Abstract: By using resonant-tunneling diodes (RTDs) and high electron mobility transistors (HEMTs), we implement a new class of logic circuits that operate with multiple thresholds and multilevel output. The basic idea of the circuits is to synthesize transfer characteristics by key logic elements, namely, up and down literals. We first describe two fundamental logic circuits based on this idea: a ternary inverter and a literal gate. Then we present experimental results on these circuits fabricated by integrating InP-based RTDs and HEMTs. It is found that these circuits operate successfully with threshold voltages and output levels that have been predicted from individual device characteristics. Consequently, the validity of the basic idea behind the circuits presented here is proven. The device counts and the number of logic stages required for the present circuits are less than half those for conventional ones. A possible application is finally discussed.

95 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202369
2022156
2021171
2020255
2019255
2018250