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Showing papers on "Digital signal published in 1971"


Patent
08 Jul 1971
TL;DR: An ultrasonic tracking and locating system in which an identification code number is programmed on a console keyboard to activate an encoder which transmits a plurality of coded pulses to a pluralityof transceiver units located in the rooms of a building where surveillance is desired is described in this article.
Abstract: An ultrasonic tracking and locating system in which an identification code number is programmed on a console keyboard to activate an encoder which transmits a plurality of coded pulses to a plurality of transceiver units located in the rooms of a building where surveillance is desired. A transducer in the transceiver transmits a coded, ultrasonic digital signal which is dispersed throughout the room. Portable pocket unit transceivers carried by persons to be located receive the transmitted ultrasonic signals and decode the signals to determine if they correspond to the pocket unit''s identification code. If the signal corresponds to the pre-programmed code, the pocket unit transmits a single ultrasonic pulse which is received by the room transceiver and is transmitted back to the console, where a display converter activates a digital readout display to provide a visual, numerical indication of the location of the person.

286 citations


Journal ArticleDOI
TL;DR: A concise relationship is developed between the amount of digital filter hardware required and the sample rate, clock rate, data word length, number of channels being multiplexed, and order of the filter.
Abstract: In keeping with the trend toward greater use of digital circuits for signal processing, a project was undertaken to realize an important telecommunication function using as great a proportion of digital hardware as possible. The function in question concerns the translation between the traditional analog frequency division multiplex (FDM) format and the newer digital time division multiplex (TDM) format. This paper describes the design of the digital filters for such a translating device and discusses some of the problems encountered in the hardware realization of these filters. In particular, a concise relationship is developed between the amount of digital filter hardware required and the sample rate, clock (bit) rate, data word length, number of channels being multiplexed, and order of the filter. This relationship is then used as the basis of comparison between various methods of accomplishing the desired function.

58 citations


Journal ArticleDOI
P. A. Lynn1
TL;DR: Two classes of recursive digital filter of particular value for the processing of biological signals are described in some detail, applied to the recovery of an ECG waveform from wide- and narrowband contaminating noise.
Abstract: Digital filters achieve their frequency-selective properties by operating on the values of a sampled-data signal. After outlining an important design method for such filters, two classes of recursive digital filter of particular value for the processing of biological signals are described in some detail. These are applied to the recovery of an ECG waveform from wide- and narrowband contaminating noise.

56 citations


Journal ArticleDOI
TL;DR: The overall system design of the device is described with particular emphasis on a noise analysis, and it is concluded that the A/D conversion points are the most important noise sources and the most costly to deal with.
Abstract: In keeping with the trend to greater use of digital circuits for signal processing, a project was undertaken to realize in an exploratory way an important telecommunication function using as great a proportion of digital hardware as possible. The function chosen is that of the A -channel bank; viz., the frequency division multiplexing (FDM) of 12 voiceband signals onto a single wire. Because of the nature of its operation the device to be described can also perform a translation between FDM analog signals and time division multiplexed (TDM) digital signals. This paper describes the overall system design of the device with particular emphasis on a noise analysis. The principal sources of noise are the A/D conversion points and the roundoff points that occur at the outputs of multipliers. Each noise source is examined in turn and its contribution to the total noise assessed. It is concluded that the A/D conversion points are the most important noise sources and the most costly to deal with.

55 citations


Patent
26 Nov 1971
TL;DR: In this paper, an electrical signal recording and playback system is described in which an analog input signal is converted to a digital signal that pulses a light source to form a single, series-recorded track of binary coded digital information including information spots arranged in groups, which track is played back in a similar manner.
Abstract: An electrical signal recording and playback system is described in which an analog input signal is converted to a digital signal that pulses a light source to form a single, series-recorded track of binary coded digital information including information spots arranged in groups, which track is played back in a similar manner. The photographic film is a compact, permanent record of long, useful lifetime which may be photographically copied to provide a plurality of inexpensive copies. Recorded information is synchronized for playback by detecting a configuration of the digital signal, either from known characteristics of the signal or from information added to the signal during recording. The information thus read out is suitably employed for shifting digital words in a reassembly shift register until proper word synchronization is achieved.

52 citations


Patent
22 Jul 1971
TL;DR: In this paper, a system for controlling a vibration testing environment or apparatus such as a shaker table with a random signal in order to subject a specimen on the table to vibrations having a predetermined power spectral density is disclosed.
Abstract: A system for controlling a vibration testing environment or apparatus such as a shaker table with a random signal in order to subject a specimen on the table to vibrations having a predetermined power spectral density is disclosed. The movement of the specimen is sensed and converted into a digital signal representative of the power spectral density of the movement. This digital signal is compared with the predetermined or desired spectral density and the results of the comparison are utilized with a digitally generated random phase angle to produce a random digital signal. This random digital signal is converted to a time-domain, analog driving signal for driving the apparatus. The same system may be used for high intensity sound testing and sine wave testing.

47 citations


Patent
J Laune1
04 Jan 1971
TL;DR: In this paper, a digital frequency and phase detector is described where a time varying reference signal is received in one bistable device only, a time-varying feedback signal was received in another bistability device only and corresponding portions of each cycle of said signals are compared in digital logic circuitry supplied by the outputs of the two bistables devices.
Abstract: A digital frequency and/or phase detector is disclosed wherein a time varying reference signal is received in one bistable device only, a time varying feedback signal is received in another bistable device only, and corresponding portions of each cycle of said signals are compared in digital logic circuitry supplied by the outputs of the two bistable devices. A logic signal developed by the first occurrence of the corresponding portion of one of the time varying signals effects, through the logic circuitry, turn on of a responsive circuit, a logic signal developed by the subsequent occurrence of the corresponding portion of the other of said time varying signals effects, through the logic circuitry, turn off of such responsive circuit, and an analog signal is developed by such responsive circuit in relation to the time interval between the occurence of the corresponding portions of the time varying signals.

40 citations


Patent
28 Jul 1971
TL;DR: In this article, a recognition unit accepts normalized character data from a multicell, single columnar retina across which a character image is scanned and converts the serial stream of digital character data into a parallel format for each scan and then correlates the data by comparing each cell with a composite of the surrounding cells to establish a black or white digital signal for each cell position.
Abstract: A recognition unit accepts normalized character data from a multicell, single columnar retina across which a character image is scanned and converts the serial stream of digital character data into a parallel format for each scan and then correlates the data by comparing each cell with a composite of the surrounding cells to establish a black or white digital signal for each cell position The signals are stored in a matrix array which is vertically analyzed to locate the character dependent cells The character data is then shifted into a storage matrix and applied to a plurality of digital character masks for selection of the character represented by the data

40 citations


Journal ArticleDOI
TL;DR: The main purpose of the FDP is to enhance the capability of the UNIVAC facility for performance of digital signal processing operations such as digital filtering and discrete Fourier transforms.
Abstract: This paper contains a description of the architecture of the fast digital processor (FDP), a general purpose digital attachment to a UNIVAC 1219 computer facility. The main purpose of the FDP is to enhance the capability of the UNIVAC facility for performance of digital signal processing operations such as digital filtering and discrete Fourier transforms. The structural design evolved during a series of discussions among the four authors. The FDP is presently being constructed under the supervision of one of the authors, P. McHugh, and should be completed in late 1970.

35 citations


Patent
15 Apr 1971
TL;DR: In this article, a ciphering system for providing security to digital transmission is described, in which a clear text signal is clocked through a binary counter for a number of steps determined by a limit signal derived by a pseudorandom digital signal.
Abstract: The specification discloses a ciphering system for providing security to digital transmission To encode with the system, a clear text signal is clocked through a binary counter for a number of steps determined by a limit signal derived by a pseudorandom digital signal To prevent transmission of clear text in case of a malfunction of the system, the clear text is compared with the ciphered output text and an alarm indication is generated upon correspondence of the clear text and the ciphered text for a predetermined number of digital bits The alarm circuitry is checked and is required to be operative before the ciphering system may be operated Speed trap circuitry prevents the system from being operated above a preselected frequency to reduce the possibility of breakdown of the system code by high speed analyzation procedures

24 citations


Journal ArticleDOI
TL;DR: A method is presented for calculating the probability of error for a digital signal contaminated by intersymbol interference and additive Gaussian noise, circumventing the heretofore formidable computational problems by decomposing the calculation into a sequence of simple calculations.
Abstract: A method is presented for calculating the probability of error for a digital signal contaminated by intersymbol interference and additive Gaussian noise. The method constructs a close approximation to the probability density function of the intersymbol interference, circumventing the heretofore formidable computational problems by decomposing the calculation into a sequence of simple calculations. This method is applicable to binary transmissions, as well as 4-, 8-, 16-, … level transmission. The method is rapid enough for use on time-sharing facilities. As part of the method, a new and rather simple scheme is presented for including the effects of partial response source coding. Several interesting examples which use and give insight into the method are included.

Patent
01 Apr 1971
TL;DR: In this article, a piece counting system for determining the number of pieces in a lot by recurrently advancing a counter circuit from a predetermined starting count to coincidence with a digital signal that represents the weight of a known number of said pieces and supplying a quotient signal each time coincidence is reached until the summation of counts that the counter circuit has been advanced by becomes equal to or greater than the digital signal representing the unknown number of the pieces.
Abstract: A piece counting system for determining the number of pieces in a lot by recurrently advancing a counter circuit from a predetermined starting count to coincidence with a digital signal that represents the weight of a known number of said pieces and by supplying a quotient signal each time coincidence is reached until the summation of counts that the counter circuit has been advanced by becomes equal to or greater than a digital signal representing the weight of the unknown number of pieces.

Patent
L Golding1, P Kaul1
30 Dec 1971
TL;DR: In this paper, the authors propose a technique to represent only disjoint difference levels by sending a digital word which represents two distinct difference levels and then reconstructing the original quantized samples.
Abstract: A differential pulse code modem receives digitally quantized samples of an input analog signal and produces digital words or codes representing difference levels. Each output word represents the difference between successive input samples. A comparable differential pulse code modem receives the digital words representing difference levels and reconstructs the original quantized samples. The quantized samples are then reconverted into a replica of the original analog signal. The bit rate of a communications system using said modem is reduced by transmitting digital words, some of which uniquely represent a single difference level, and some of which represent two distinct difference levels. Thus the total number of unique digital output words which can be transmitted is less than the total number of difference levels, about which information must be conveyed to the receiver. The apparent ambiguity caused by sending a digital word which represents two distinct difference levels is resolved by a technique which uses the same digital word to represent only disjoint difference levels. When subtracting a preceding sample from the present or current sample the resulting difference level cannot exceed a maximum positive or negative value determined by the dynamic range of the sample values. Two difference levels are disjoint if there exists no possible value for the preceding sample which could result in both difference levels. The same digital word is sent out whether the difference level information to be conveyed is the first or the second difference level. The reconstructed prior sample provides the information needed to exclude one of the disjoint levels represented by the received digital word.

Patent
Gabriel A Aguiar1
03 May 1971
TL;DR: In this paper, a principle of operation for controlling the amount of power applied to a given load from a periodic voltage source, such as an AC source, indirect response to a digital control signal is presented.
Abstract: Apparatus for controlling the amount of power applied to a given load from a periodic voltage source, such an AC source, indirect response to a digital control signal. The method involves a principle of operation in which the AC source is applied to the load over measured time portions of the successive periods of the source voltage to obtain the desired average power applied to the load. Equal increments of time are measured in each half-wave of the source and a first digital signal is generated corresponding to the time elasped from the zero voltage crossing point. A second digital signal is generated corresponding to a time portion of the source''s half-wave over which the source voltage ought to be applied to the load to obtain the desired average power. The source is then switched on and off the load in each half-wave in response to a comparison of the first and second digital signals.

Journal ArticleDOI
C. Kurth1
TL;DR: In this article, the authors describe the conversion of voice-frequency channels into SSB/FDM signals using digital filters and explain the implications of the various steps of signal processing in the time and frequency domains.
Abstract: Theoretical and practical results in the field of digital filtering encourage the examination of digital filters for use in multiplex communication systems [1]-[3]. Although their economic breaking in will only come in combination with large-scale integration of digital circuits, it appears worthwhile to study their feasibility for various applications [4]-[7], [9]. One application of particular interest is the digital realization of single-sideband frequency-division multiplexing (SSB/FDM), which leads to the study of the digital realization of the SSB-channel bank which is internationally known as the first multiplexed group in the frequency range of 60-108 kHz. This paper describes the conversion of voice-frequency channels into SSB/FDM signals using digital filters. A brief analysis explains the implications of the various steps of signal processing in the time and frequency domains. The digital realization of a channel bank is explained in block diagrams. It is shown that the SSB/FDM signal appears simultaneously as a TDM/SSB signal (TDM/FDM/SSB).

Patent
26 Oct 1971
TL;DR: In this paper, a differential pulse code modulator includes a delta modulator for converting an analog input signal to delta modulated signal, a digital filter for removing quantizing noise components, and a direct feedback pulse code modulation encoder.
Abstract: A differential pulse code modulator includes a delta modulator for converting an analog input signal to a delta modulated signal, a digital filter for removing quantizing noise components, and a direct feedback pulse code modulation encoder. The feedback encoder includes a subtractor for determining the difference between a decoded digital signal and the output of the digital filter, a digital integrator for integrating the output of the subtractor, a digital coder for converting the output of the integrator to a differential pulse code modulation signal and a digital decoder for converting the differential signal to the decoded digital signal supplied to the subtractor. Clock pulses are supplied to the delta modulator, the digital filter, and the direct feedback pulse code modulation encoder.

Patent
29 Mar 1971
TL;DR: In this paper, the voltage level of a video signal channel as the image of the scene to be televised is scanned is scanned, comparing the sensed signal with a reference signal and establishing a digital signal indicative of whether the voltage of sensed signal is greater or less than that of the reference signal.
Abstract: Methods and apparatus for automatically establishing the voltage levels in a television camera which represent signal amplitude levels corresponding to the black and white reference levels by sensing the voltage level of a video signal channel as the image of the scene to be televised is scanned, comparing the sensed signal with a reference signal and establishing a digital signal indicative of whether the voltage of the sensed signal is greater or less than that of the reference, storing the digital information and, if desired, altering the information stored upon command from the comparator, establishing an output voltage signal having a magnitude determined by the stored or altered digital information and modifying the black and white levels from the camera.

Journal ArticleDOI
TL;DR: A digital hardware realization of a formant synthesizer which utilizes the technique of digital multiplexing of a single arithmetic unit among several digital filter sections to produce speech in real time.
Abstract: Terminal analog or formant speech synthesizers have found many applications in speech research. These include investigation of computer voice response, speech synthesis-by-rule, and speech perception studies, among others. Many types of formant synthesizers have been designed and realized either in analog circuitry or as a computer program. In this paper we describe a digital hardware realization of a formant synthesizer which utilizes the technique of digital multiplexing of a single arithmetic unit among several digital filter sections. The advantages of this hardware over conventional analog hardware include: precise control over center frequencies and bandwidths of the resonators in the synthesizer, stability and reliability of the hardware, light weight, small size, and low power consumption. The synthesizer is capable of producing speech in real time at sampling rates up to 12.8 kHz, using 24 bits to process the digital signals internal to the synthesizer. A 12-bit digital-to-analog convertor supplies an immediate analog output for monitoring the speech and a provision is included for returning 16 bits of the output signal to the computer for future processing such as waveform display or spectrum analysis.

Patent
N Dinn1
27 Dec 1971
TL;DR: In this paper, a phasing circuit for a digital system requiring the relative phasing of two synchronous, periodic digital signals was proposed, where the repetition rate of a generated synchronous reference signal is increased to enable the output and complementary output of this generator, and the phasing networks, to be repeatedly "''"recycled."''''' The output of the Phasing circuit is subsequently divided down in frequency to provide the properly phased periodic digital signal at the desired lower repetition rate.
Abstract: A phasing circuit for a digital system requiring the relative phasing of two synchronous, periodic digital signals wherein the repetition rate of a generated synchronous reference signal is increased to enable the output and complementary output of this generator, and the phasing networks, to be repeatedly ''''recycled.'''' The output of the phasing circuit is subsequently divided down in frequency to provide the properly phased periodic digital signal at the desired lower repetition rate. Since the phasing networks are thus ''''recycled,'''' appreciable savings are obtained over the prior art structures which required individual networks for each incremental step of the desired phasing accuracy.

Patent
Croisier Alain1, Riso Vladimir1
18 Oct 1971
TL;DR: In this paper, a recursive digital filter comprising a digital accumulator for algebraically adding successive modified digital delta coded signals extracted from a memory medium, the memory medium storing said modified digital signals, and the memory further being directly addressed by a predetermined number of digital signals fed back from the accumulator.
Abstract: A recursive digital filter comprising a digital accumulator for algebraically adding successive modified digital delta coded signals extracted from a memory medium, the memory medium storing said modified digital signals, the memory further being directly addressed by a predetermined number of digital signals fed back from the accumulator.

Patent
20 May 1971
TL;DR: In this paper, a phase comparator is used to produce an error signal representative of the phase difference between an input reference periodic signal and an oscillatory signal for driving a motor, which is suitable for the drum and the capstan servos of rotary-head video tape recorders.
Abstract: The servo system having a phase comparator for producing an error signal representative of the phase difference between an input reference periodic signal and an oscillatory signal for driving a motor. A voltage controlled oscillator controlled by the error signal to produce the oscillatory signal is provided with an integrator for integrating the error signal to produce an integration signal proportional to the result of the integration of the error signal and therefore to hold the instantaneous value of the integration signal when the error signal becomes zero. The integration signal is supplied to the oscillator in place of the error signal. the servo system is suitable for the drum and the capstan servos of rotary-head video tape recorders.

Patent
04 Mar 1971
TL;DR: A threshold logic digital filter as mentioned in this paper converts an input sequence of sets of bits representing amplitudes of a continuous signal at predetermined sample times into another sequence of points representing the inputs of sets transformed by a predetermined difference equation.
Abstract: A threshold logic digital filter converts an input sequence of sets of bits representing amplitudes of a continuous signal at predetermined sample times into another sequence of sets of bits representing the input sequence of sets transformed by a predetermined difference equation. Storage-processor elements are used for implementing threshold logic adder, multiplier, two''scompartment, and overflow detector circuits in the digital filter.

Patent
15 Apr 1971
TL;DR: In this paper, a random code generator for generating a randomized digital key stream is described, where a plurality of shift registers are each operable to generate a randomized signal, the cycle period of each of the shift registers being prime to one another.
Abstract: The specification discloses a random code generator for generating a randomized digital key stream. A plurality of shift registers are each operable to generate a randomized digital signal, the cycle period of each of the shift registers being prime to one another. Nonlinear combining circuitry receives and combines the digital signals generated by the shift registers for production of a randomized digital key stream. Mode control circuitry is responsive to the key stream for randomly varying the interconnection and mode of operation of the shift registers between a plurality of different modes. Circuitry is also responsive to the key stream for randomly varying the number of steps taken by the shift registers during the various modes of operation. The shift registers are operable during a priming mode to generate a random prime signal for synchronization of encoding and decoding ciphering devices. If desired, a read only memory may be connected into the generator to further randomize the digital key stream.

Patent
14 Dec 1971
TL;DR: In this paper, a sub-carrier signal generator was proposed for a television receiver in the NTSC system for receiving a color signal including the vertical interval color reference (VIR) signal.
Abstract: A sub-carrier signal generator for use with a television receiver in the NTSC system for receiving a color signal including the vertical interval color reference (VIR) signal. The sub-carrier signal generator comprises means for generating a sub-carrier signal synchronized with the burst signal in the color signal, means for phase-detecting the VIR signal by using the burst signal to produce a compensation signal representing phase difference between the chrominance reference bar in the VIR signal and the burst signal, and means for compensating the phase of the sub-carrier signal by the compensation signal.

Patent
Jack R Meyer1
11 Jan 1971
TL;DR: In this paper, an extension of the time between first and second pulses where the time is expanded by comparing the voltage held in a first fast ramp generator with that being developed by a second slow ramp generator is presented.
Abstract: Apparatus for measuring the time between first and second pulses where the time is expanded by comparing the voltage held in a first fast ramp generator with that being developed by a second slow ramp generator. The expanded time is directly proportional to the actual time between pulses and is used to gate a clock, providing a digital signal proportional to the actual time.

Patent
27 Apr 1971
TL;DR: In this article, the average rate of change in the input signal over an immediately preceding short time interval is derived from the signal generated locally in the decoder, and this quantity is fed back to adapt the magnitude of a reference input.
Abstract: Digital code modulators are improved by addition of feedback means for adaptive code modulation to continuously match the dynamic range of the digital decoder to the dynamic range of the input signal. There is derived from the signal generated locally in the decoder a quantity representative of the average rate of change in the input signal over an immediately preceding short time interval, and this quantity is fed back to adapt the magnitude of a reference input to the decoder.

Patent
18 Feb 1971
TL;DR: In this paper, a spectrum analyzer is provided by digitizing the analog input signal at a controllable rate, storing it in a digital memory device, and reading out the stored digital signal at an increased rate into a digital-to-analog converter.
Abstract: Resolution level selection in a spectrum analyzer is provided by digitizing the IF analog input signal at a controllable rate, storing it in a digital memory device, and reading out the stored digital signal at an increased rate into a digital-to-analog converter. The resolution level is determined by the relationship between the digitizing rate and the memory read out rate.

Patent
08 Sep 1971
TL;DR: The relationship between change in frequency versus change in phase over a time interval requires that the phase shift rate of change be varied parabolically for the frequency to change linearly with time.
Abstract: An RF signal is inputted to a digitally controlled RF phase shifter. The RF phase shifter is responsive to digital signal commands and operates to shift the phase of the RF input signal and its frequency in response to the digital signal input. The relationship between change in frequency versus change in phase over a time interval requires that the phase shift rate of change be varied parabolically for the frequency to change linearly with time. The phase change is, therefore, accomplished by parabolically incrementing the digital count, relative to time. The RF frequency is thereby linearly swept about the RF center frequency.

Journal ArticleDOI
TL;DR: Intermediate frequency (IF) and video limiting are evaluated and compared for a two-channel coherent digital signal processor, where the video limiting is that of the analog-to-digital (A/D) converters, occurring separately in each channel.
Abstract: Intermediate frequency (IF) and video limiting are evaluated and compared for a two-channel coherent digital signal processor, where the video limiting is that of the analog-to-digital (A/D) converters, occurring separately in each channel. The input is a narrow-band random signal. Video limiting is shown to produce considerably higher distortion sidebands outside the input signal band. Within the input signal band, video-limiting distortion is about 1 dB worse. The results are useful for both the radar moving target indicator (MTI) and mapping applications.

Patent
07 Jul 1971
TL;DR: In this article, a data modem for transmitting and receiving digital data over voice grade telephone lines having a multivibrator, a two station counter providing frequencies fo and f 1 with 2/1 ratios, and a composite signal generator responsive to the f o and f f 1 signals to provide a pulse train comprising an integral number of cycles of f 1 and f o for each binary one in the incoming digital data signal.
Abstract: A data modem (modulator-demodulator) apparatus for transmitting and receiving digital data over voice grade telephone lines having a multivibrator, a two station counter providing frequencies fo and f 1 with 2/1 ratios, composite signal generator responsive to the f o and f 1 signals to provide a pulse train comprising an integral number of cycles of fo and f 1, wherein one cycle of f1 is provided for each binary one in the incoming digital data signal and two cycles of fo are provided for each binary zero in the incoming digital data signal, filter means for transforming the pulse train into an approximation of a sine wave for coupling over a voice grade telephone line, means for receiving the sine wave containing information, a limiting amplifier and digital comparator for converting the sine wave back into a digital signal, a two stage counter providing an output zero for each pair of pulses in the digital signal, an integrator-comparator providing an output one level for each single cycle of f1, and means for combining outputs from the integrator-comparator and the two stage counter to provide the reconstructed digital data signal.