Showing papers on "Digital signal published in 1976"

On the hardware implementation of digital signal processors

Abstract: An approach to the machine organization of dedicated hardware digital signal processors is proposed that is based on a specialized representation of the processing coefficients derived from the canonical signed-digit code. This leads to a realization requiting the minimum number of add/subtract operations to mechanize the required multiplications and additions. The proposed organization is shown to be highly modular and well suited to integrated circuit implementation, and offers a significantly better performance when compared with existing realizations using prepackaged multipliers.

Audio storage and distribution system

Abstract: This invention relates to an electronic system and a method for storing and distributing audio signals over existing communication lines. The system comprises a compressor for compressing in a predetermined manner the waveform amplitude of an input analog signal, thereby forming a compressed analog signal. The compressed analog signal is then converted into a digital signal by an analog to digital converter. A digital interface subsystem stores and retrieves selected ones of the digital signals for transmission over a communications line. At a remote end of the communications line the digital signal is converted back to its analog compressed signal representation by a digital to analog converter. The compressed analog signal is then expanded in a manner complimentary to the compressor operation, thus reconstructing the analog signal. A selector generator is provided at the remote end of the communications line for generating a command signal over the communications line to command the digital interface subsystem to select the desired one of the stored digital signals.

A Digital QRS Detector Based on the Principle of Contour Limiting

Abstract: The article describes a detector for physiological phenomena, e.g., the QRS-complex, having a trigger accuracy of 0.5 ms. The configuration to be recognized first is preprocessed then fed into a pair of amplifiers with adjustable gain and offset, representing the upper and lower contour-limit derived from the actual signal. These signals are sampled and A/D converted, then stored in two memories during the ``read''-operation.

Reversible analog-to-digital converter

Abstract: A method and apparatus for a telecommunication installation is disclosed for converting PAM analog signals into PCM digital signals and vice versa. A conversion circuit which is connected to a telephone station comprises an input register for temporarily storing the incoming PCM digital signals and an output register for temporarily storing the outgoing PCM digital signals. This conversion circuit includes a clock pulse generator which enables a counter to count through all its counter positions upon the appearance of each channel time slot pulse of the incoming PCM channel time slot pulse train. The input register and counter are connected to an intermediate register which in turn is connected to a digital-to-analog converter for converting the incoming PCM digital signal into an analog signal. This analog signal is sent to the receiving unit of the telephone station in a first time interval of the counter. The conversion circuit also comprises an analog comparator which is connected to the transmitting unit of the telephone station for receiving PAM analog signals. This PAM analog signal is converted into a digital signal in the intermediate register during a second time interval of the counter. The converted analog signal is then fed to the output register to be sent to the PCM switching center. Thus, the conversion circuit of this invention is time shared for use in converting both digital and analog signals.

Current mirror amplifiers with programmable current gains

Abstract: A current mirror amplifier in which at least one of the mirroring transistors is a composite transistor in which the number of simple transistors parallelled to form the composite transistor can be selected in response to a digital signal to program the current gain of the current mirror amplifier in accordance with said digital signal. Current mirror amplifiers with programmable current gains are useful, for example, in the multiplication and/or division of analog information by digital multipliers, and in digital-to-analog conversion.

Electronic countermeasure system

Abstract: An electronic countermeasure system wherein signal processing apparatus is included to enable only a predetermined number of digital words associated with one of a plurality of radio frequency energy sources to pass to a general purpose digital computer Also, such signal processing apparatus modifies the digital word passed to such digital computer to simplify the processing required by such digital computer

Digital synchronizing signal recovery circuits for a data receiver

Abstract: A data signal stream includes, in a noisy signal channel, periodic word synchronization characters, and each such stream is preceded by a burst of predetermined bit rate information. An approximate bit rate timing signal is derived from the data stream and utilized for producing an initialization pulse when the predetermined bit rate information is detected. In addition, the approximate bit rate timing signal drives a digital phase-locked loop which is preset by the initialization pulse to a digital circuit state defining operation at the nominal frequency of the approximate bit rate timing signal. A stable bit clock signal provided by the phase-locked loop controls the operation of further circuits which are responsive to the baseband data stream for providing an indicator pulse each time that a synchronizing character appears in the data stream. The bit rate clock and the character indicator pulses are employed to operate a timing chain that yields word synchronization pulses in synchronism with the indicator pulses and having an extraordinarily low false-pulse rate as well as evidencing a flywheel effect to maintain word synchronization in the event that a small number of character indicating pulses are missed. If more such pulses are missed, the timing chain is resynchronized.

Automatic magnetic compass correction

Abstract: Method and apparatus for providing automatic correction of deviation errors in a magnetic compass. Data representing deviation corrections for respective compass headings are stored in memory and in response to a digital signal from the magnetic compass representing an indicated heading, the corresponding correction is provided from memory to yield a output signal representing actual heading and corrected for deviation error.

High accuracy digital to analog resolver converter

Abstract: A high accuracy digital to analog resolver converter uses a read only memory device (PROM) programmed to generate a digital signal proportional to the inherent systematic error of a digital to analog resolver converter This signal is then converted to analog form by conventional means and combined with the primary signal in analog form thereby substantially increasing the accuracy of a digital to analog resolver converter

Digital controller system

Abstract: A digital controller system for controlling the flow of a plurality of processes, each of the processes being provided with a process detector and an actuator, the digital controller system comprising: a digital bus for transmitting digital signals from one location to another; an analog bus for transmitting analog signals from one location to another; a plurality of direct digital loop stations, each of said direct digital loop station adapted to be connected to a process detector and an actuator of a process for receiving analog signals characterizing the state of the process from the process detector and transmitting the analog signals onto the analog bus and for receiving digital signals controlling the flow of the process from the digital bus and transmitting corresponding analog signals to the operating apparatus; and a central processor unit for transmitting the digital signals controlling the flow of the process to the digital bus, and for receiving the analog signals characterizing the state of the process from the analog bus, the central processor unit including a digital computer, an analog-to-digital converter and a data transmission unit.

Multi-axis motion generator utilizing feedforward control

Abstract: Apparatus for generating synchronized multi-axis intermittent motion utilizing electronic encoding, memory and a position control system having feed-forward control. A plurality of slave shafts are rapidly and accurately positioned in response to the positioning of a rotatable master shaft, without mechanical interconnections therebetween. An analog transducer is attached to the master shaft providing an analog position output which is fed to a master encoder which feeds a digital output to a plurality of independent digital memory devices. Each digital memory device provides, in response, an output digital signal indicative of the desired position of an associated slave shaft. The output of each memory device, through an appropriate digital-to-analog converter, is fed to a position controller which positions the associated slave shaft as desired. The servo controller includes a feedforward input to speed positioning and reduce system lag. The feedforward velocity signal is obtained by calculating the difference between the present position of the associated slave shaft and the desired future position of the slave shaft to obtain the desired change in the slave shaft position. This difference is multiplied by the absolute value of the master axis velocity to obtain the necessary velocity feedforward signal. The velocity feedforward signal, which is a function of the change in slave shaft position and the velocity of the master shaft represents the velocity at which the slave shaft must be rotated to achieve the desired position while the master shaft moves through one digital increment.

Measuring-while-drilling method and system having a digital motor control

Abstract: A measuring-while-drilling system has a digitally implemented motor speed control circuit for controlling a downhole, motor-driven acoustic signal generator. The acoustic generator is motor driven at speeds for imparting to well fluid an acoustic signal having phase states representative of encoded data derived from measured downhole conditions. The digital motor control circuit drives the motor at a substantially constant, carrier frequency producing speed in the absence of data of one logic state and temporarily changes the speed of the motor to effect a predetermined phase change in the carrier signal upon data of the predetermined logic state. For returning the motor speed to the carrier frequency producing speed during phase changes, the digital motor control circuit includes a first digital integrating circuit for providing a first digital signal having a value indicative of the constant value of the carrier frequency integrated over a time period beginning substantially upon the occurrence of the particular data; it has a second digital integrating circuit for providing a second digital signal having a value indicative of the instantaneous speed of the acoustic generator integrated over the time period; and it has a digital comparator which is responsive to the first and second digital signals for generating a control signal effective to change the speed of the motor when the difference between the first and second digital signals reaches a predetermined value.

Phase locked loop for providing continuous clock phase correction

Abstract: A phase locked loop apparatus for providing a continuous output digital clock signal having first and second states which is continuously phase locked to a reference digital data signal, which digital data signal comprises at least one data transition, utilizes every data transition to continuously correct the clock phase. For pseudo video scan lines, such as utilized for row grabbing, when such scan lines contain a start bit, the phase locked loop makes a single correction each empty or non-data line utilizing the start bit to insure that phase lock exists at the beginning of the first non-empty or digital data containing scan line. The phase locked loop contains a voltage controlled oscillator operating in conjunction with a flip-flop functioning as a phase detector, with the state of the flip-flop being dependent on the phase condition between the digital data signal and the digital clock signal.

Signal synthesizer spectrum contour scaler

Abstract: A speech signal synthesizer features a time and frequency scaler for improved accuracy of signal synthesis. A digital signal representative of a first analog signal, such as a voice signal, having varying parameters, such as frequenty or amplitude, is converted by a synthesizer into an analog output signal which varies in substantially the same manner as the first signal. The synthesizer receives a transmitted digital signal representing the first analog signal and synthesizes the varying parameters thereof to provide the analog output signal. First, the digital input signal is applied to a serial-to-parallel converter and subsequently input to a modulated frequency generator controlled by the operation of a modulation controller. Digital data processed through the modulated frequency generator is time and frequency scaled, and it is this time and frequency scaling that provides improved accuracy in recreating the proper amplitude relationship of the first analog signal. Following time and frequency scaling, the processed digital data is input to an amplitude accumulator and subsequently converted into the analog output signal in a digital-to-analog converter. Time scaling is implemented by apparatus that utilizes the transmitted digital data information to interpolate between spectrum segments to present a smooth spectrum to the output analog signal. For frequency scaling, the frequency scaler interpolates between harmonic frequencies of the first analog signal in consecutive frames and the processed digital data of the time scaling. Both the time domain scaling and the frequency domain scaling are based on the value of a cosine squared function extending between adjacent data points on adjacent frames.

Baseband signal switching arrangement for diversity reception in a PCM radio communication system

Abstract: A baseband signal switching arrangement for diversity reception in a PCM communication system is disclosed. The switching arrangement is characterized by the provision of a 1/n write-in frequency-dividing counter in each receiving channel to count clock signals in response to being reset by a frame signal and n buffer memory circuits for successively writing bit information of a received digital signal in response to the n frequency-divided outputs of the 1/n frequency-dividing counter. The switching arrangement further includes a 1/n read-out frequency-dividing counter which is adapted to successively read out memory outputs of one set of the n buffer memory circuits and a switching means for enabling the 1/n read-out frequency-dividing counter to selectively read out memory outputs of a given set of buffer memory circuits.

Digital signal transmission system and equipment

Abstract: A digital signal transmission system and equipment therefor in which digital signals sequentially sent out from an encoder side are compared with set values in each of comparators at a decoder side, for sending out signals from the comparators when the values of the digital signals are larger than the values set in the comparators and for suspending signals from all of the comparators if the values of the digital signals are smaller than those set in the comparators, while output from the comparator having the set value nearest to the signal value is utilized for inverting other comparators so as to suspend outputs from these other comparators for effecting stable signal transmission through simple construction.

Data transmission system using analog to pulse width to digital conversion

Abstract: A data transmission system using analog to pulse width to digital conversion for transmitting data generated by an analog sensor to a digital processor is disclosed. A data request signal generated by the digital processor is gated by a processor interface circuit along a single wire data transmission line to a remote sensor activating both the sensor and its associated interface electronics. The data request signal also provides electrical power to the sensor and sensor interface electronics eliminating the need for separate electrical power leads. The sensor interface electronics after a period of time determined by the value of the analog signal generated by the sensor generates a low impedance to ground signal on the data transmission line. The low impedance to ground signal is detected by the processor interface circuit which terminates the transmission of the data request signal. The processor interface circuit further includes a pulse width to digital converter generating digital data indicative of the duration the data request signal is transmitted. More than one sensor may interface the single data transmission line and each sensor interface may be individually activated by interrogation signals generated by the digital processor.

Digital video window control

Abstract: A digital signal processor is connected between a refresh memory at the output of the digital computer in an x-ray tomography system and the digital-to-analog converter of a cathode ray tube display to provide a limited resolution gray scale display of a selected portion from an image signal having wide dynamic range.

Apparatus for synchronizing AC-motors

Abstract: An apparatus for controlling an AC-motor, with a feedback arrangement in which the feed-back signal is the output signal of a partly mechanical pulse generator coupled to the shaft of the motor, comprising a micro-processor to which is fed a feed-back signal and a reference signal and a digital clock which sends output signals to said micro-processor, said micro-processor generating signals through a first set of output controls for controlling the frequency and phase of the AC-power supplied to the motor by comparing the reference signal and the arrival times of the feed-back pulses as indicated by the digital clock.

Breath pressure actuated electronic musical instrument

Abstract: A musical instrument having a general body outline similar to that of a saxaphone. A front key panel having a plurality of keys mounted thereon is located for easy fingering access to the keys which are in the same general location as the fingering keys on a saxaphone. A rear control panel is provided for mounting instrument voice characteristic and special effects controls. A mouthpiece is provided for engagement by a player's mouth and a pressure transducer is carried in the mouthpiece for communication with the player's breath pressure and for producing a pressure signal corresponding thereto. The pressure signal is connected to a pressure attack circuit for producing a pressure attack signal. Finger pressure applied to predetermined combinations of keys provides predetermined combinations of key pulses for connection to a key decoder. The key decoder produces a binary output corresponding to the predetermined combinations of key pulses which ranges from zero to 1111. A digital to analog converter receives the digital signal and provides an analog tone signal corresponding thereto which is connected to the input of an exponential voltage controlled oscillator. The voltage controlled oscillator provides a tone frequency in a predetermined band which is related exponentially to the tone signal. The tone frequency is divided and shaped to obtain an audio frequency which is connected to the input of a variable harmonic control filter which provides an audio frequency output having a given proportion of harmonics for a given setting at any audio frequency in the instrument range band. The harmonic controlled audio frequency is connected to a format filter for providing a voice frequency having wave shape characteristics similar to those of a predetermined voice. A variable gain amplifier receives the voice frequency at the input thereof. The pressure signal and the pressure attack signal are connected to control the variable gain amplifier for producing an instrument voice output which is interrupted and reinitiated each time the pressure signal falls below and thereafter rises above the pressure attack circuit threshold. Circuits are provided for the production of attack signals as a result of key changes. Means are provided for extensive modification of the audio signal through the action of any of several effect circuits controllable by any of several transducers.

Static trip unit for circuit protective devices

Abstract: A static trip unit for automatic electric circuit breakers includes an analog to digital converter for converting an analog signal proportional to the magnitude of current flowing in a distribution circuit to a digital signal having a pulse frequency proportional to the second power of the analog signal. When the analog signal exceeds a preselected threshold level, a binary counter is conditioned to accumulate the digital signal pulse. A decoder monitors the pulse count accumulating in the counter and issues a trip signal when the pulse count reaches a preselected total.

Digital multi-line companded delta modulator

Abstract: A companded digital delta modulator which can encode both voice and voice band modem signals over a wide range of input levels is shown. The companding method or algorithm is based on measuring bit stream correlation and can be scaled to give substantially maximum performance over a wide range of signal types. The algorithm has a low sensitivity to digital channel errors, thus making it suitable for signal coding for satellite channels and the like. In addition, the digital design permits common hardware to simultaneously serve a large number of lines, thus permitting the substantial savings in the hardware cost per line. A further aspect of the invention concerns the ability to handle multiple bit delta modulation as well as single bit delta bit modulation in the above environment.

System for communication

Abstract: A digital communication system for the transmission of digital data with a modulated carrier uses a modulation locked loop and pseudo-random code to develop synchronization signals for the digital data signals and to ensure a high level of communication reliability.

Digital video signal processor with distortion correction

Abstract: An apparatus for compensating for signal distortions in an input digital signal, such as a pseudo video scan line having a television video scan line format and capable of comprising a complete self-contained packet of digital information sufficient to provide an entire video displayable row of video data characters, said signal comprising a plurality of ones and zeroes defining the digital information therein, the pseudo video scan line having associated peak-to-peak signal levels respectively defining the ones and zeroes wherein the signal distortion in the signal comprise the respective peak-to-peak signal levels associated with at least some of the plurality of ones and zeroes differing from the respective peak-to-peak signal levels associated with others of this plurality, the peak-to-peak signal levels resulting from zero-to-one and one-to-zero transitions in the signal, provides a compensated output digital signal from the distorted input digital signal having the same information content wherein the plurality of ones and the plurality of zeroes comprising the compensated output digital signal all have the same respective peak-to-peak signal levels varying about a common base level. The compensating apparatus comprises means for tracking both the zero-to-one and the one-to-zero transitions in the input digital signal operatively associated with means responsive to both the zero-to-one and one-to-zero transitions for providing the compensated output digital signal in which all ones and all zeroes are of the same respective levels.

Code tracking signal processing system

Abstract: A code tracking signal processing system for tracking a coded signal of the pseudo-random-noise, or PRN, type wherein a time shift comparison is made of the input coded signal and a pair of time estimated coded feedback signals which represent an estimate of the coded input signal which has been advanced and delayed, respectively, by the same specified time shift. An effective error signal is formed from the time shift comparison signals and supplied to a digital integration means, such as an up-down counter, to generate a pair of control signals. The control signals control the pulse rate of a pulsed clock signal in accordance with the time shift error between the estimated code signal and the input code signal. The controlled pulse rate signal is then used to generate the advanced and delayed feedback signals and to produce a coded signal which is in effect locked into time synchronism with the input coded signal.

Digital filter for pulse code modulation signals

Abstract: A digital filter for pulse code modulation signals employs interpolation. A digital filter can handle a multiplicity of multiplexed pulse code modulation channels.

Multifunctional circuit analyzer

Abstract: A multifunctional circuit analyzer is disclosed which is capable of determining the complete signature of an unknown electrical signal. The circuit analyzer utilizes a high and low peak detection circuit and an analog to digital converter to determine the outer limits of the signal. The high and low threshold voltages are selected between the limits of the signal. Each time the unknown electrical signal passes through the preset high or low threshold voltage, a high or low threshold digital signal occurs. A logic circuit operates on these high and low threshold digital signals and activates the start and stop gate signals. These gate signals allow a time base signal to pass through a gate circuit into a series of decade counters. The information in the counters are thereafter transferred into decoders and then multiplexed to a display. The multifunctional circuit analyzer disclosed is capable of measuring, rise time, fall time, frequency, duty cycle, TRC counting, width, period, coincidence of two signals, the interval between two signals, count functions, frequency ratio, AC volts, DC volts and resistance.