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Showing papers on "Digital signal published in 1980"


Journal ArticleDOI
01 Oct 1980

1,565 citations


Patent
19 Jun 1980
TL;DR: In this paper, an analog memory such as a charge transfer device (CTD), bubble memory, or magnetostrictive memory is used to store analog signals, where each analog signal is representative of a plurality of digital bits.
Abstract: The present invention is directed to an analog memory for storing digital information in analog signal form. Typically, digital information is stored in digital signal form, where each digital bit is stored in a separate digital memory cell. In accordance with the present invention, an analog memory such as a charge transfer device (CTD), bubble memory, or magnetostrictive memory is used to store analog signals. Each analog signal is representative of a plurality of digital bits, thereby providing storage for a plurality of digital bits in each analog memory cell. Use of such an analog memory in combination with a digital system facilitates a hybrid memory, where digital information is stored in analog signal form. In one embodiment, a digital to analog converter is used to convert digital information from a digital processor to analog signal form for storage in an analog memory and an analog to digital converter is used to convert analog signals stored in the analog memory to digital signal form for processing with the digital processor. In another embodiment, an analog read only memory is used to store a program for a stored program digital computer in analog signal form. Storage of digital information in analog signal form increases the efficiency of storage because a plurality of digital bits can be stored in each memory cell. An embodiment having analog error compensation utilizes a reference signal for adaptive compensation of errors. Various systems using such memories are disclosed including signal processors, stored program computers, reverbation systems, and others.

112 citations


Journal ArticleDOI
R.C. Agarwal1
01 Oct 1980

88 citations


Patent
26 Sep 1980
TL;DR: In this article, a radio apparatus has a section for receiving an analog signal and a digital angle-modulated carrier wave signal, and a clock signal is regenerated from the output of either the demodulating means or receiver section.
Abstract: According to the present invention, a radio apparatus has a section for receiving an analog signal and a digital angle-modulated carrier wave signal. The analog signal and digital angle-modulated carrier wave output of the receiver section are demodulated to provide first and second demodulated signals. A clock signal is regenerated from the output of either the demodulating means or receiver section. A control signal selectively operates a switch for passing either the first or the second demodulated signals. The regenerated clock signal controls the switch.

87 citations


Patent
10 Nov 1980
TL;DR: In this article, an automatic span line switch for high speed communication lines is described, which employs an alarm interface unit coupled to a service line terminal in order to detect a line failure mode.
Abstract: An automatic span line switch for high speed communication lines is disclosed. The apparatus employs an alarm interface unit which is coupled to a service line terminal in order to detect a line failure mode. Upon detection of such a mode, the system operates to modify the parity bit content of the transmitted digital signal in order to provide a unique code to be transmitted to a remote office connected to a near office and indicative of a span line failure. The apparatus automatically proceeds to switch the failed transmission line to a back-up protection line to enable the near location to communicate with the remote location via the back-up line. All control signals transmitted between the locations are implemented by means of unique codes which are generated by purposely modifying the parity bit content in each successive frame of the transmitted digital signal. The system further describes a priority system for preferentially switching higher priority service lines when multiple failures occur. Various other techniques such as manual operation are disclosed to enable manual switching of protection lines during system operation.

73 citations


Proceedings ArticleDOI
01 Jan 1980
TL;DR: A single-chip digital signal processor utilizing parallel multiplier and 3μ NMOS technology will be presented and can implement 41 second-order digital filter sections for 8kHz sampling of voiceband signals.
Abstract: A single-chip digital signal processor utilizing parallel multiplier and 3μ NMOS technology will be presented. Development can implement 41 second-order digital filter sections for 8kHz sampling of voiceband signals.

62 citations


Patent
17 Mar 1980
TL;DR: In this paper, an electrical power generating system includes a prime mover having a throttle control for converting a source of input energy into a mechanical output, and a field winding for exciting the output windings.
Abstract: An electrical power generating system includes a prime mover having a throttle control for converting a source of input energy into a mechanical output. The system includes an electrical generator having a plurality of output windings and a field winding for exciting the output windings. The generator is mechanically coupled to the mechanical output of the prime mover. Means are provided for sensing a plurality of parameters related to the performance of the system and further means are provided for converting each of the sensed parameters into a digital signal indicative of the magnitude of the sensed parameter. Additional means are provided responsive to the digital signals for developing a plurality of electrical output signals. The electrical output signals are utilized to control either or both the generator and the prime mover to thereby control the output of the power generating system. The system is further provided with circuits for sensing the phase position of the generator output voltage and current and the voltage in a main electrical power conductor. Accordingly, when the generator output is added to the power in the main power conductors, it is done so in phase. Some of the parameters sensed are generator output voltage, current and frequency, generator field winding current and engine throttle position. A digital logic circuit controls the excitation of the generator field winding to thereby control the generator output voltage and current.

54 citations


Patent
Tamburelli Giovanni1
09 May 1980
TL;DR: An equalizer designed to correct both precursor and postcursor distortion in signal samples periodically obtained from a digital signal train comprises two parallel, mutually complementary circuit branches, each including an upstream filter for linearly correcting one type of distortion and a downstream cell for nonlinearly compensating the other type as discussed by the authors.
Abstract: An equalizer designed to correct both precursor and postcursor distortion in signal samples periodically obtained from a digital signal train comprises two parallel, mutually complementary circuit branches each including an upstream filter for linearly correcting one type of distortion and a downstream cell for nonlinearly compensating the other type of distortion. The compensating cell of the first branch includes an adder algebraically combining a feed-forward signal with a signal at least partly freed from postcursor interference in the corresponding upstream filter; the second branch includes another adder algebraically combining a feedback signal from its compensating cell with a prefiltered signal at least partly freed from precursor interference. Purged signals from both adders are combined in a summing stage followed by a decision unit which emits a quantized pulse to be used either directly as a decided symbol or as a source of corrective pulses for postcursor and precursor elimination in another linearly prefiltered sample.

49 citations


Journal ArticleDOI
TL;DR: A combination of techniques taken from graph theory and decision theory is used to solve the problem of realization of 2-D digital filters using minimum number of delay elements called minimal realization.
Abstract: A combination of techniques taken from graph theory and decision theory is used to solve the problem of realization of 2-D digital filters using minimum number of delay elements called minimal realization. The solution is presented in the form of an algorithm which, when executed, yields one (and hence, infinitely many) minimal realization.

47 citations


Patent
30 Sep 1980
TL;DR: In this paper, a video signal is converted to a digital signal and transmitted or recorded with error detecting and error correcting signals, and if the error is so extensive that its correction by the error correction signal is not possible, the erroneous signal is concealed by its replacement with a substantially corresponding signal of the previous field which has been stored in a suitable memory.
Abstract: In a digital video signal processing apparatus having error correcting and concealing capabilities, a video signal is converted to a digital signal and transmitted or recorded with error detecting and error correcting signals. Upon receiving or reproducing the transmitted signal, an error in th digitized video signal is detected by means of the error detecting signal, and corrected, if possible, by means of the error correcting signal. If the error is so extensive that its correction by the error correction signal is not possible, the erroneous signal is concealed by its replacement with a substantially corresponding signal of the previous field which has been stored in a suitable memory.

45 citations


Patent
11 Jun 1980
TL;DR: In this article, a television system with access control comprises a transmitter and a receiver, and each receiver comprises means for receiving the transmitted signals, means for displaying the picture and restoring the sound and an unjamming circuit connected to the reception means and working with the service key.
Abstract: A television system with access control comprises a transmitter and receis. The transmitter comprises a video signal and sound signal formation circuit, means for transmitting these signals and a jamming circuit using a service key. Each receiver comprises means for receiving the transmitted signals, means for the display of the picture and for restoring the sound and an unjamming circuit connected to the reception means and working with the service key. It also comprises a subscription management center and in the transmitter a digital signal generator, a circuit for the formation of digital messages and a data broadcasting system and in the receiver a subscription card, an extraction circuit for the data, and a circuit for restoring the service key. There is also at least one subscription card loading station connected to the subscription management center.

Patent
01 Apr 1980
TL;DR: In this article, a bit synchronous switching system is proposed for a space diversity system of digital telecommunications. But the system does not require any frame synchronization to be superimposed on the data stream.
Abstract: A bit synchronous switching system is disclosed which has applicability in a space diversity system of digital telecommunications. Two versions of a signal waveform are received at two remote locations from the same signal source. The end user is able always to receive the more intelligible signal by means of instantaneous switching logic. An acquisition and tracking circuit, which can include a delay lock loop, keeps the two signal streams synchronized. One data stream is used as a reference and the time delay of the other is varied so that the time differential between the two streams is tracked out. The system features continuous tracking and does not require any frame synchronization to be superimposed on the data stream.

Patent
19 Nov 1980
TL;DR: In this article, a multifrequency tone receiver (100) is used for detecting simultaneous tone signals in a sampled digital signal. But the signal processing microcomputer (103) processes (per flowchart in Fig. 7) a number of sets of the seven energy estimates and provides an indication when a multiuser tone pair has been detected.
Abstract: A multifrequency tone receiver (100) for detecting simultaneous tone signals in a sampled digital signal. The tone receiver (100) includes a microprogrammed sequence controller (101 and Fig. 3B), a time-multiplexed digital filter (102 and Fig. 3C) and a signal processing microcomputer (103 and Fig. 3A). For each sample of the digital signal, the sequence controller (101) is programmed to time multiplex the digital filter (102) for performing three cascaded second order filtering operations (two bandpass filter operations and one low pass filter operation as shown in Fig. 2) for each of six tone signals to provide corresponding energy estimates and one additional filtering operation to provide a total energy estimate. The signal processing microcomputer (103) processes (per flowchart in Fig. 7) a number of sets of the seven energy estimates and provides an indication when a multifrequency tone pair has been detected. The digital filter (102), when enabled by a filter start signal from the sequence controller (101), asynchronously performs a signal multiplication-like filtering operation to implement each second-order filter, and provides a filter done signal upon completion of the filtering operation. Full-wave rectifying capability is provided during low pass filtering operations by logically complementing (gate 361 in Fig. 3C) the digital filter input signal. Limit cycles may be suppressed in the digital filter output signal by rounding the output signal and clamping (gates 365-368 in Fig. 3C) positive and negative overflows to the largest allowable positive and negative signals, respectively. The tone receiver (100) may be advantageously utilized in a PCM communication system for detecting multifrequency tone signalling used for dialing and supervisory control. Moreover, the inventive tone receiver (100) may be adapted to receive many different types of tone signalling simply by changing firmware (Tables I and IV) therewithin.

Journal ArticleDOI
TL;DR: A relation between the required oversampling factor N = f' s /f s and the improvement in dynamic range (R = B- B') is derived which indicates that for moderate values of R (3 to 5 bits) the oversamplings factor must range from 6-15, which is quite acceptable.
Abstract: A method is described for improving the dynamic range of A/D and D/A converters. In the case of A/D conversion it consists of an analog preprocessing, an A/D converter of B' bits operating at a high sampling rate f' s , followed by a digital postprocessing. This system effectively operates as an A/D converter with B > B' bits with low sampling rate f s . A relation between the required oversampling factor N = f' s /f s and the improvement in dynamic range (R = B- B') is derived which indicates that for moderate values of R (3 to 5 bits) the oversampling factor must range from 6-15, which is quite acceptable. The method is also applicable to D/A conversion, but then the pre-processing has to be digital and file postprocessing analog.

Patent
15 Dec 1980
TL;DR: An interface circuit for converting a digital signal representing a dot-by-dot color video signal into a NTSC signal compatible with a television antenna input precompensates the digital for limitations in typical NTSC receivers as mentioned in this paper.
Abstract: An interface circuit for converting a digital signal representing a dot-by-dot color video signal into a NTSC signal compatible with a television antenna input precompensates the digital for limitations in typical NTSC receivers. Various methods and circuits for precompensating the luminance amplitude, chrominance and chrominance amplitude content of the digital signal result in perceivably improved contrast and color purity.

Patent
06 May 1980
TL;DR: In this paper, a coded identity of the sampling frequency is used to select the same fundamental clock signal as was used during recording and the reproduced sync signal is phase compared with a reference signal derived from the fundamental clock signals to correspondingly control the speed and phase of transport of the recording medium.
Abstract: An apparatus for recording and/or reproducing a serial digitized analog signal controls the transport speed of a recording medium according to the sampling rate employed in digitizing the analog signal to produce a constant data density on the recording medium regardless of the sampling rate selected. The frequency of a fundamental clock signal establishes the sampling frequency during recording. A coded timing signal also recorded on the recording medium includes both a sync signal and a coded identity of the sampling frequency in use. During reproduction, the coded identity of the sampling frequency is used to select the same fundamental clock signal as was used during recording and the reproduced sync signal is phase compared with a reference signal derived from the fundamental clock signal to correspondingly control the speed and phase of transport of the recording medium. The fundamental clock signal may be manually varied during reproduction for pitch control of the reproduced analog signal.

Patent
Wilbur E. DuVall1
15 Sep 1980
TL;DR: In this article, a closed loop servo system is substantially eliminated by turning the servo into position mode operation only when there is zero position error and zero velocity error, which is accomplished by digitizing the instantaneous amplitude of the position signal when the difference count has decremented to zero and using that digital value as the address of a square root look up table.
Abstract: Settling problems of a closed loop servo system are substantially eliminated by switching the servo system into position mode operation only when there is zero position error and zero velocity error. The fast and clean settling is accomplished by digitizing the instantaneous amplitude of the position signal when the difference count has decremented to zero and using that digital value as the address of a square root look up table which provides for each instantaneous amplitude of the position signal a digital signal indicative of the instantaneous velocity required to effect rapid settling at the rest position. The digitized velocity signal is converted to an analog signal by a digital to analog converter for energization of the drive motor. The servo system tracks the instantaneous amplitude of the position signal until both position signal amplitude and velocity are zero, at which time the system is mechanically stopped and stable, and then the system is, for the first time, switched to conventional position mode operation. Prior to the time that the difference count is decremented to zero, the difference or track count is used as the address of the look up table to provide digitized velocity signals. There is a change in the scale of the digital to analog converter when the difference count becomes zero so that all of the velocity square root curve used for positioning when the difference count was above zero can be used when the difference count is zero.

Patent
10 Jan 1980
TL;DR: In this paper, the authors present a controller having dedicated fuser circuitry and a processor for controlling the fuser heating element. But they do not specify the activation rate of the triac.
Abstract: A controller having dedicated fuser circuitry and a processor for controlling the fuser heating element. The dedicated fuser circuitry interconnects an input voltage source to the processor through a low voltage power supply to provide a reference signal and a sample DC voltage signal representative of the input voltage source. The processor provides a digital signal to activate a triac connected to the fuser heating element. The triac, selectively gates the input voltage source across the heating element. A plurality of ranges of digital signals and a plurality of corresponding triac activation rates are provided for variations in input voltage. A digital signal related to a particular value of the input voltage source lies within one of the plurality of ranges determining the particular activation rate of the triac.

Proceedings ArticleDOI
01 Jan 1980
TL;DR: A programmable digital signal processor chip which can decode on instruction, fetch data, perform a 16 × 20b multiply, and add the resultant to a 40b accumulator in 80ns is reported on.
Abstract: This paper will report on a programmable digital signal processor chip which can decode on instruction, fetch data, perform a 16 × 20b multiply, and add the resultant to a 40b accumulator in 80ns. Circuit permits all signal processing functions of a dual-tone multifrequency receiver or a low-speed modem to be realized on one chip.

Patent
08 Feb 1980
TL;DR: In this paper, the present invention comprises computer system equipment useful for detection of faults in data transmission within a computer system by monitoring the current flow through a digital signal source means, which is characterized in that it only draws significant current during a non-transition period when a fault condition occurs.
Abstract: The present invention comprises computer system equipment useful for detection of faults in data transmission within a computer system. Fault detection is accomplished by monitoring the current flow through a digital signal source means, which is characterized in that it only draws significant current during a non-transition period when a fault condition occurs.

Patent
24 Nov 1980
TL;DR: In this article, an optical fiber cable is used as the transmission medium for data and status signals from remote digital acquisition units to a master station of a distributed digital field system, where each digital acquisition unit has associated with it one or more sensors for sensing motion in an elastic body.
Abstract: An optical fiber cable is used as the transmission medium for data and status signals from remote digital acquisition units to a master station of a distributed digital field system. Each digital acquisition unit has associated with it one or more sensors for sensing motion in an elastic body. The master station of the system also uses an optical fiber cable as the transmission medium for transmitting command signals to the digital acquisition units. The digital acquisition units, when first connected into the system, sense the master station signal and determine which direction to transmit. In normal operation, one digital acquisition unit receives the master station command and repeats the command to the next digital acquisition unit and so on. The digital acquisition units then reverse direction of transmission and reception, the data acquisition unit receiving from an adjacent digital acquisition unit and repeating data or status signals, then adding its own data or status signal onto the line before passing it to the next digital acquisition unit in the direction of the master station. The optical fiber cable transmission medium provides extremely high bandwidths permitting very high data rates and large numbers of channels and also provides complete immunity from electromagnetic radiation.

Journal ArticleDOI
TL;DR: A 120-channel transmultiplexer has been developed which interfaces two FDM basic supergroup signals directly to the digital time division switch or digital transmission systems.
Abstract: A 120-channel transmultiplexer has been developed which interfaces two FDM basic supergroup signals (2 x 60 channels) directly to the digital time division switch or digital transmission systems. The equiplnent exploits a block processing digital SSB-FDM multiplex/demultiplex scheme, and has been built using newly developed high-speed CMOS pipeline multipliers and variable length shift registers. System design considerations and hardware implementation techniques are described in detail as well as the measured performance.

PatentDOI
TL;DR: An electronic reverberation system for use in an electronic musical instrument comprises a random access memory wherein two or more time delay channels are defined by address allocation in a controller circuit.
Abstract: An electronic reverberation system for use in an electronic musical instrument comprises a random access memory wherein two or more time delay channels are defined by address allocation in a controller circuit. An input analog signal is converted to digital signals by an analog-to-digital converter and the digital signals are processed by the controller into the time delay channels. The channels defined in the random access memory are of differing lengths which can be changed by switch settings. The controller sequentially retrieves stored digital data words from the random access memory channels in seriatum and couples each data word to a digital-to-analog converter. The analog output signal from the digital-to-analog converter is delayed in time by varying amounts due to the length of the channels in the random access memory. A portion of the delayed analog output signal contained in each channel is mixed with the input analog signal to produce a combined signal. The combined signal is converted to a digital data word which is stored back into the random access memory location from which the last digital data word was read. An enhanced reverberation effect is selectively achieved by switchably connecting a low frequency signal on the order of two hertz as an auxiliary input to be mixed with the input analog and delayed analog signals.

Journal ArticleDOI
H. Kaneko1, T. Ishiguro
TL;DR: The satellite experiment has demonstrated excellent performance for network digital TV application and the TRIDEC-6/3 interframe encoder is being seriously considered for application in North American teleconferencing applications.
Abstract: It has been shown that interframe coding techniques provide an effective means to reduce the transmission bit rate of video signals without sacrificing picture quality The channel capacity of various coding schemes over existing digital transmission links is listed For digital satellite, for example, even a single television (TV) channel cannot be transmitted by conventional PCM, whereas one or two channels of TV can be transmitted by employing efficient coding techniques However, much greater advantage is obtained by use of interframe coding Three network quality TV signals can becarried through a transponder For teleconferencing applications, a single satellite transponder can managuep to 20 simultaneous conference signals on a TDMA basis, if one uses a 3M bit/s interframe coder Our satellite experiment has demonstrated excellent performance for network digital TV application The TRIDEC teleconferencing system has been commercially used by NTT in Japan since 1979 and the NETEC-6/3 interframe encoder is being seriously considered for application in North American teleconferencing applications

Patent
22 Sep 1980
TL;DR: A companding analog to digital converter for converting an analog signal into a variable length binary word, the number of said bits being a function of the magnitude of the analog signal being converted relative to the high end of the range of magnitudes capable of being converted.
Abstract: A companding analog to digital converter for converting an analog signal into a variable length multi-bit binary word, the number of said bits being a function of the magnitude of the analog signal being converted relative to the high end of the range of magnitudes capable of being converted. The analog signal is temporarily stored and is attenuated by a predetermined amount. The attenuated signal is converted into a multi-bit digital word. A group of the most significant bits of said digital word are examined to alter the attenuation of the stored analog signal dependent upon its magnitude relative to the full scale. The attenuated analog signal is again converted into a multi-bit digital word which is temporarily stored. The group of binary bits initially stored together with results of the second conversion operation are combined to develop a multi-bit digital word whose bit length is a function of the magnitude of the stored analog signal relative to scale. Multiplexer means are utilized to transfer stored bits to an output line in order to provide an output word of uniform digital length regardless of the magnitude of the converted analog signal.

Patent
10 Nov 1980
TL;DR: A servo system in a disc drive for accessing and maintaining selected data tracks on a stack of discs has a first continuous position signal derived from a pre-recorded surface and a second position message derived from servo information in sectors of the other discs.
Abstract: A servo system in a disc drive for accessing and maintaining selected data tracks on a stack of discs has a first continuous position signal derived from a pre-recorded surface and a second position signal derived from servo information in sectors of the other discs. The first and second position signals are combined to form a hybrid signal to control the actuators. The hybrid signal is the second signal when the second signal is generated. When the second signal is not generated, the hybrid signal is a modified first signal plus the last known second signal. The modified first signal is the difference between the first signal presently generated and the first signal generated when the second signal was last generated.

Patent
03 Jul 1980
TL;DR: In this article, a cardiotachometer is used to indicate the heart rate of a user in beats per minute, and a display is provided for displaying the most recent binary number signal, when the plurality of compared signals are within a predetermined percentage of each other.
Abstract: A cardiotachometer for indicating heart rate of a user in beats per minute. The cardiotachometer comprises a sensor (12), placed on the body of the user, for producing an electrical signal indicative of the heart rate of the user. Circuitry (28) is provided for converting the electrical signal into first and second digital signals. 60/t computation circuitry (34) responds to the first and second digital signals and produces a third digital signal having a varying frequency representative of the number of heart beats per minute. An up-counter (38) converts the third digital signal into a plurality of binary number signals, each bit of which is stored in a series of shift registers (48). A compare (54) using a plurality of exclusive OR gates, compares each of the stored binary number signals with the most recent binary number signal, from the up-counter, to determine if a plurality of compared signals are within a predetermined percentage of each other. Finally, a display (76) is provided for displaying the most recent binary number signal, when the plurality of compared signals are within the predetermined percentage of each other. Further provision is made for display of both elapsed time and time of day.

Patent
13 Nov 1980
TL;DR: In this paper, a processing system for reproduced audio digital signals used in an audio PCM (pulse code modulation) recording/reproducing system using a video tape recorder having a dropout-compensation circuit is disclosed.
Abstract: A processing system for reproduced audio digital signals used in an audio PCM (pulse code modulation) recording/reproducing system using a recording/reproducing apparatus such as a video tape recorder having a dropout-compensation circuit is disclosed. The reproduced signal processing system is connected to receive digital information signals reproduced through the dropout compensation circuit from a recording medium on which audio information signals are recorded in the form of digital data words and includes circuit means (18, 19, 20, 21; 57, 60, 63, 64) for detecting whether a reproduced digital signal has been dropout-compensated or not and circuit means (17; 58, 59) for adding an error pointer to a reproduced digital signal which is detected as being dropout-compensated.


Journal ArticleDOI
TL;DR: Some of the considerations and comparison criteria presented, even though not completely general because extracted from experimental results, can be useful in selecting and defining the more pertinent data compression system for the different practical applications.
Abstract: Several data compression methods are reviewed for signal and image digital processing and transmission, including both established and more recent techniques. Methods of prediction-interpolation, differential pulse code modulation, delta modulation and transformations are examined in some detail. The processing of two-dimensional data is also considered.Results of the application of these techniques to space telemetry and biomedical digital signal processing and telemetry systems are presented.Some of the considerations and comparison criteria presented, even though not completely general because extracted from experimental results, can be useful in selecting and defining the more pertinent data compression system for the different practical applications.