Showing papers on "Digital signal published in 1983"

Sequential detection of abrupt changes in spectral characteristics of digital signals

Abstract: The problem of sequential detection of abrupt changes in the spectral behavior of a digital signal is addressed. This problem arises, for example, in the sequential segmentation of nonstationary digital signals such as speech, (EEG) electroencepholograms, (ECG) electrocardiogram, and geophysical signals. The limitations of a classical test will be emphasized, and some new algorithms will be presented and compared via a simulation study and from a theoretical point of view.

Sequential detection of abrupt changes in spectral characteristics of digital signals

Abstract: The problem of sequential detection of abrupt changes in the spectral behavior of a digital signal is addressed. This problem arises, for example, in the sequential segmentation of nonstationary digital signals such as speech, (EEG) electroencepholograms, (ECG) electrocardiogram, and geophysical signals. The limitations of a classical test will be emphasized, and some new algorithms will be presented and compared via a simulation study and from a theoretical point of view.

Signal distribution system

Abstract: A head-end for a signal distribution system with selection facility, includes a matrix (8) and a multiplexer (12) connected thereto for forming a multiplex signal. The head-end further comprises A/D converters (4-1 to Δ-N) for converting the wide-band input signals into digital signals prior to supply to the matrix. The multiplexer comprises two amplitude modulators (13, 14) for the mutual quadrature amplitude modulation of a carrier (17) by two digital signals, and a summing means (18) for adding a digital signal in the base band to the modulated signal. A signal receiver for one of the modulated signals comprises a synchronous amplitude demodulator (21) connected to a synchronized carrier source (20) and also comprises means for digital-to-analog conversion (24).

Pulse-width modulation circuit

Abstract: A pulse-width modulation circuit of self-oscillation type produces a pulse-width modulated signal having a pulse width corresponding to an amplitude of an analog input signal. An integrator having an amplifier and at least one capacitor produces a triangle-wave signal. A comparator compares the triangle-wave signal with a reference voltage to generate a pulse signal. A delay circuit produces a delayed pulse signal in response to the pulse signal generated by the comparator. A feedback circuit feeds the delayed pulse signal back to an input terminal of the amplifier so that the self-oscillation is effected. The pulse-width modulated signal is derived from an output terminal of the delay circuit.

Portable circuit and method for performing a time study and analysis of bodily ionic characteristics

Abstract: A portable circuit and method for performing a time study and analysis of bodily ionic characteristics as esophageal pH includes a transducer 11 for measuring pH and generating a proportional analog signal and an interface 12 for converting this signal into a representative digital signal including offset and gain controls 23,24 for permitting correction for transducer 11 calibration drift during the study period. A processor 14 receives and stores all digital signals for rapid transmission to a data analysis after the study period is ended. Esophageal pH values are measured and stored for a plurality of pre-study and post-study known conditions.

Method and apparatus for monitoring instantaneous electrical parameters of a power distribution system

Abstract: A method and a device for monitoring instantaneous electrical parameters of a power distribution system under load utilizing digital control means. An analog signal equivalent to such a parameter is sensed and rated down for processing by solid state components. This signal is converted into a binary coded digital signal having n digits. A plurality of digital signals is sampled and squared values with a format of 2n digits are derived from each sample. The squared values of one sampling period are accumulated to a sum value composed of 2n+m digits and the square root comprising n+k digits of the sum is taken. This value is rescaled to a true root mean square value by performing k left shifts as an accurate measurement result. The core of such device is represented by a microcomputer with built-in analog-to-digital converter.

Subtraction of electrocardiographic signal from respiratory electromyogram

Abstract: Presented is a method to selectively suppress interfering electrocardiographic artifacts from the surface-recorded respiratory muscle electromyographic (EMG) signal. This method has application in the frequency analysis of respiratory muscle EMG.

Non-dispersive infrared gas analyzer

Abstract: Pulse modulated infrared energy (12) is directed through a sample cell (14) containing a gas mixture. The gas mixture may include a selected one of a plurality of gases. Each gas exhibits a characteristic absorption in the infrared wavelengths. A detector (16) responsive to infrared energy at a preselected wavelength develops an AC signal having an amplitude proportional to the infrared energy passing through the sample cell at the preselected wavelength and having a frequency corresponding to the preselected pulse modulation frequency. The preselected wavelength is common to the absorption characteristic of each of said gasses. The AC signal is processed to develop a DC signal having an amplitude determined from the AC signal. The DC signal is applied to an amplifier (28) having a variable gain feedback (30) which provides a plurality of gain steps. Each gain step is associated with a different one of the gasses. A single surrogate gas may be used to calibrate each gain step. The DC signal is amplified by the appropriate gain step to develop a second DC signal proportional to the concentration of the gas and the mixture contained in the sample cell (14). The amplifier (28) may further include an analog to digital convertor (60) which stores a digital equivalent of a zero offset output voltage of the amplifier (28) when its input is grounded. The digital signal is reconverted to an analog signal and a current proportional to such signal is normally applied to the input of the amplifier (28) to maintain zero stability.

Digital video signal recording system and reproducing apparatus

Abstract: A digital video signal recording system and reproducing apparatus comprise a circuit for independently subjecting a luminance signal and two kinds of color difference signals of a color picture information to digital pulse modulation, to produce a digital luminance signal and two kinds of digital color difference signals, a circuit for dividing the digital luminance signal and the two kinds of digital color difference signals into picture element data groups, in terms of specific number of rows or columns which are adjacent on a screen, and adding a header signal at least comprising a synchronizing signal, a picture mode identification code, and a picture information quantity identification code to a beginning position of each of the divided picture element data groups comprising the digital luminance signal and the two kinds of digital color difference signals, to produce a digital video signal having a signal format in which the digital luminance, the two kinds of digital color difference signals, and the header signal are time-sequentially multiplexed, a circuit for recording the digital video signal onto a recording medium, a circuit for writing each of the divided picture element data groups picked up and reproduced from the recording medium into a memory circuit according to codes within the header signal, and a circuit for producing an analog video signal in accordance with a standard television system from picture element data read out from the memory circuit.

Electronic still camera for generating long time exposure by adding results of multiple short time exposures

Abstract: An image recording apparatus includes a solid state image pickup; an A/D converter for converting a one-frame analog image signal from the solid-state image pickup to a one-frame digital image signal; and a recorder coupled to the A/D converter for accumulating a plurality of one-frame digital image signals which are intermittently and successively picked up by the image pickup and output from the A/D converter to form a single one-frame digital image signal, and for recording the single one-frame digital image signal. The recorder includes a memory for storing the single one-frame digital image signal. An adder is provided for adding the one-frame digital image signal produced from the A/D converter and a single one-frame digital signal produced from the memory, and for writing the addition results into the memory. A detector is coupled to an output of the adder for detecting a minimum value of the single one-frame digital image signal, and a subtracter is provided for subtracting the minimum value from the single one-frame digital image signal read out from the memory.

Spectrum display device for audio signals

Abstract: An input audio signal is AD converted into digital signals which are processed by a central processing unit (CPU) in which Fast Fourier Transform (FFT) operation and power spectrum calculation are effected. As a result power spectrum data is obtained, and then position determination is effected to determine the position of each bar of a bar graph to be displayed on a display unit screen, according to the power level at different frequencies within the spectrum of the audio signal. Pattern data is then produced in correspondence with the determined position, and output data from the CPU is fed via a video display processor to a video RAM, thereby displaying the spectrum by way of a predetermined pattern of a bar graph on the screen. In order to reduce the number of digital data used in FFT operation the input audio signal may be divided into a plurality of different frequency bands so that different sampling frequencies are used for AD conversion of signals of respective bands. As a result, operating time is reduced. To further reduce the operating time the CPU may be arranged to execute parallel operations in various manners. Furthermore, two or more CPUs may be employed to further increase the operating speed.

The Cyclostationary Nature of Crosstalk Interference from Digital Signals in Multipair Cable--Part I: Fundamentals

Abstract: This paper considers the cyclostationary nature of digital signals when determining crosstalk interference between such signals in multipair cable. This approach is necessary as the interference is only relevant at the decision instants in the receivers of the disturbed systems and any time variation of this interference with respect to the sampling instants changes the effect of this interference; previous studies in the area have ignored the cyclostationary nature of the digital signal. Expressions for the time-varying mean and variance of far-end and near-end crosstalk (FEXT and NEXT) have been derived. These expressions demonstrate the inherently smaller time variation of the NEXT interference when compared to the FEXT interference. An interesting result is that the calculation of the time-averaged value of the variance of FEXT and NEXT interference still requires the use of the cyclostationary properties of the digital signal. The results of this paper are extended and applied to various examples of the engineering of digital line systems in multipair cable in Part II of this paper.

Method and machine for metering electric parameters

Abstract: The electric parameter metering machine comprises electric parameter pickup circuitry for sensing the instantaneous analog amplitude value of a electric parameter waveform in at least one phase in an electric power distribution system at selected time intervals during each full cycle, an A/D converter for converting the analog amplitude values to digital signals and signal processing circuitry including a memory for storing the digital signals. The signal processing circuitry includes a microprocessor operable to apply a conventional waveform analysis technique to the digital signal information collected with respect to a selected number of cycles of the electric parameter waveform to obtain an instantaneous RMS value of the electric parameter and operable to process a sequence of instantaneous RMS electric parameter values at discrete time intervals to obtain time averaged or demand electric parameter values. A visual display device is coupled to the signal processing circuitry and a pushbutton control panel is coupled to the signal processing circuitry for enabling an operator to operate pushbuttons to provide a digital readout of either instantaneous RMS, demand, or peak demand values on the visual display device.

Digital complex sampling

Abstract: Complex sampling is often employed in digital signal processing schemes where the input signal is bandpass in origin and is to be processed using lowpass techniques. Conventionally the signal is first mixed to zero centre frequency in two quadrature channels, filtered to remove the high-frequency mixing products and then digitised in two A/D convertors. A method is proposed that employs only one A/D convertor followed by digital mixing to produce the required pair of signals, thus allowing a considerable saving in hardware.

Digital fader or like device

Abstract: A digital fader or like device having slidably operable means, such as a touch-sensitive strip, which is manually operable to different settings that are represented by a digital signal. Manual changes in the relative operating position of the slidably operable means produce corresponding adjustments in the digital signal. Display elements are selectively energized by the digital signal to indicate the relative setting of the slidably operable means.

Digital signal transmission system

Abstract: In a digital signal transmission system for effecting time-division multiplexing/circuit switching transmission of data in the form of packets by means of telecommunication cable, a packet configuration and line connection control data inserted in the packets are improved. In phases of the establishment/termination of a call, line connection control data of the overhead field are inserted as repeated at least one time into the data field. At least one set of line connection control data of the overhead field contains a parity bit. A receiving station reads the line connection control data in the overhead field and the data field of a received packet, and determines the overhead data by the principle of decision by majority. After completion of establishment of a call, the receiving station takes in the transferred data out of a block on the basis of a positional information, for example, a number of the block. In the phase of transmission of data, transmitting station inserts additional data bits into at least part of the overhead field in the packet being transmitted.

Method of digital temperature compensation and a digital data handling system utilizing the same

Abstract: A method of digital temperature compensation uses a digital temperature compensation word to produce a digital word modification of a digital input to a temperature sensitive digital to analog converter hereinafter converter. The method includes the steps of sensing the temperature affecting the converter to produce a digital temperature representation which is used by a digital computer to produce an output in accordance with a characterization equation in the form of Output=f(D, M) where D=digital data and M=f(temperature). The temperature stability of the converter is affected by the temperature stability of a reference voltage circuit used in the converter and having a voltage reference diode. A compensation circuit uses a temperature sensor in the form of a second diode, which is thermally coupled to the reference diode, and a tracking type analog-to-digital converter for converting an analog signal. The output of the analog-to-digital converter is supplied as a digital word to a digital computer system which uses the digital word to modify a digital input to the converter. The computer system includes a non-volatile memory in which is stored a characterization equation which describes the performance of the converter as a function of the digital output signal from the computer and the digital representation of temperature from the analog-to-digital converter. Thus, the output from the digital-to-analog converter is compensated for the effect of temperature on the converter.

Digital television receiver

Abstract: of the Disclosure A digital television receiver has a digital con-version circuit for converting an analog video signal to a digital video signal, a process circuit for corn-posing digital RGB signals from the digital video signal, a timing control circuit for controlling the A/D converting operation of the digital conversion circuit and the composing operation of the color process circuit.

Method and apparatus for recording a digital signal on motion picture film

Abstract: A method and apparatus for recording a digital signal such as a modified SMPTE time code on motion picture film as it is being intermittently advanced by a motion picture camera. The recorded time code includes a set of timing bits followed immediately by a set of synchronization bits. In one embodiment, the time code is recorded as a continuous signal with the last bit recorded for each frame having an extended length, to ensure that uncertainties in the specific times at which the camera begins and ends its advancement of the film don't result in the recording of a bit that is shorter than a nominal bit duration. In a second embodiment, an addition set of synchronization bits is recorded at the beginning of each frame, so that a time code reader assumes it corresponds to the previous frame and properly decodes the following sets of timing bits and synchronization bits as corresponding to the current frame.

Disc drive control system

Abstract: A disc drive control system for controlling the drive of a disc carrying a binary digital signal including clock information of a predetermined frequency wherein the digital signal includes an information signal portion to be recorded and an synchronizing signal portion which includes successive maximum periods of inversion (transitions). The system includes a detection means for detecting the period of the transition of the synchronizing signal and producing a detection signal, (frame sync servo signal) disc a control means for producing a disc drive control signal for controlling a disc drive means. The drive control signal is produced in accordance with the detection signal prior to a period in which the drive control signal is produced in accordance with a reproduced clock signal (playback clock and playback frame sync signals), whereby eliminating the problem that the driving speed of the disc may be controlled in accordance with an erroneously reproduced clock signal.

Frequency detecting circuit for digital information reproducing system

Abstract: A circuit is disclosed which is applied for a ditial audio disk (DAD) system for detecting a maximum inverting period of a digital audio signal (102) optically read out from the DAD. The audio signal is prestored in the DAD so as to have the maximum and minimum inverting periods specially set by an eighteen to fourteen modulation (EFM). The detection circuit includes an edge detector (104) for detecting pulse edges of the digital audio signal (102), a counter (106) for counting pulse edge intervals on the basis of a modulating clock signal (108), a counter type register (114), and a comparator (112). When the register contents of the counter type register (114) is smaller than the count value of the counter (106), the comparator (112) produces a pulse signal (118) by which said register (114) updates the contents of the register by "1". Repeating this operation, a maximum inverting period value of the digital audio signal (102) is obtained in a fixed period of time.

Micro fracture detector

Abstract: An acoustic emission is detected by a pickup, and its output is converted by a A/D converter into a digital signal, which is provided to a fast Fourier transform processor. The fast Fourier transform processor comprises a cascade connection of a plurality of operation stages, each composed of first and second input memories, a third memory having stored therein a rotation vector and an arithmetic unit for performing a Butterfly operation through using the pipelined architecture. In each stage one of the first and second input memories and the third memory are read out and the Butterfly operation is carried out on the pipelined basis. The operation result is written into that one of the first and second input memories of the next operation stage which has not been read out; thus all the operation stages perform a pipelined operation as a whole. The power of a spectrum obtained as the operation result of the last operation stage is calculated, obtaining a signal corresponding to the acoustic emission.

Digital-analog converter

Abstract: A digital-analog converter characterized in that reference voltage is divided by a first string-like resistor array (11, 105, 202), whose two adjacent outputs are selected by a first switch array (13, 107, 204) depending upon the contents of upper bits of a digital signal and applied to the both ends of a second string-like resistor array (17, 110, 211), and one of switches in a second switch array (18, 113, 214) is selectively turned on responsive to the contents of lower bits of said digital signal to pick up one of the divided voltages of said second resistor array (17, 112, 211)

Apparatus for re-recording a digital signal on a record medium and for reproducing the same therefrom

Abstract: An apparatus for re-recording a new digital signal in a track on a magnetic record medium which has a previously recorded digital signal in the track, the digital signal being arranged in data blocks each containing a sync signal, a data signal, an error correction code signal, and an error detection code signal, comprises a reproducing circuit which reproduces each digital signal recorded on the magnetic record medium, a code generating circuit which supplies a discriminating code signal for each of the data blocks, and a recording circuit which re-records the new digital signal and the respective discriminating code signals in the track on the magnetic record medium

Coherent spread spectrum pseudonoise tracking loop

Abstract: A detector (20) is provided for use in a communication receiver where a received spread spectrum data signal is detected using a locally generated reference signal to decode the data signal. The detector (20) includes first (22) and second channels (24) and circuitry (90) for applying the received encoded data signal to the first (22) and second channels (24). A local generator (50) is provided for generating the reference signal wherein the reference signal has polarity transitions. A demodulator (40) is included in the first channel (22) for generating a detected recovered data signal from the received data signal in response to the reference signal. Circuitry (52) is provided for detecting the polarity transitions in the reference signal and for generating a differential PN signal. Circuitry (42) is further provided in the second channel (24) for correlating the received data signal and the differential PN signal to thereby generate a recovered error signal. The recovered data signal and the recovered error signal are correlated by circuitry (58) to generate a control signal for application to the local generator (50) for locking the reference signal to a component of the received data signal.

Method for digital transmission of messages

Abstract: The invention involves a method for digital transmission of messages in a digital radio relay system which utilizes a superframe so additional information can be transmitted with a digital signal. This method eliminates the simulation of a frame alignment signal by service bits. In this invention m superframes each consisting of two half-frames containing a byte for additional bits and in which a scrambling of the digital signals takes place by adding a periodic bit pattern to the digital signal, are combined to form a multiple frame. The pattern used for scrambling has a period equal to the length of the multiple frame.

Synchronizing circuit for detecting and interpolating sync signals contained in digital signal

Abstract: A synchronous circuit comprises a sync signal detecting circuit connected to receive a digital signal with a plurality of frames each consisting of N bits and containing a frame sync signal to detect a sync signal in each frame, and a sync protecting circuit for producing a sync control signal synchronized with the detection of the sync signals and interpolating the sync control signal every frame when the sync signal is not detected. The sync protecting circuit has a counter for counting the number of frames in which the sync signals are not detected. A circuit is provided to quickly synchronize the sync protecting circuit with the detection of the sync signal by the sync signal detecting circuit when noise is produced by the sync signal detecting circuit and then a sync signal is detected after a given value has been counted by the counter.

A Hybrid Multichannel Hardware Simulator for Frequency-Selective Mobile Radio Paths

Abstract: We present the analysis and design of an efficient hybrid digital/analog multichannel hardware simulator for frequencyselective Rayleigh-fading mobile radio paths. The simulator has eight RF outputs and is linear and reciprocal. All outputs exhibit mutually independent Rayleigh fading over a 45 dB range and have identical time delay spreads. Analog RF techniques are combined with a digital signal processor (DSP) to generate random path modulation. Frequency selectivity from time delay spread is created using several RF path delay elements. Simulated vehicle velocity is continuously variable from 6 to 60 mph. The simulator is thus a flexible tool for the study of mobile radio transmission techniques.

Digital waveform processing oscilloscope with distributed data multiple plane display system

Abstract: A raster display digital oscilloscope includes an analog to digital converter and a memory array for developing and storing a digital measurement signal amplitude-dependent on an acquired input signal. After processing stored digital signals are conveyed to an output circuit which includes a raster-scanned CRT and three display memory planes independently addressable by the CPU for receiving in discrete address locations the digital data. Corresponding address locations in the three planes are read in synchronism with the CRT scan to develop a display signal for application to the CRT to produce a display corresponding to the sum of the data stored in the three planes. The digital signals are automatically spread out or bunched up within the display planes to compensate for differences between the data acquisition rate and the scan rate.