scispace - formally typeset
Search or ask a question

Showing papers on "Digital signal published in 1998"


Journal ArticleDOI
01 Sep 1998
TL;DR: It is shown that in the largest majority of cases, these error-rate expressions can be put in the form of a single integral with finite limits and an integrand composed of elementary functions, thus readily enabling numerical evaluation.
Abstract: Presented here is a unified approach to evaluating the error-rate performance of digital communication systems operating over a generalized fading channel. What enables the unification is the recognition of the desirable form for alternate representations of the Gaussian and Marcum Q-functions that are characteristic of error-probability expressions for coherent, differentially coherent, and noncoherent forms of detection. It is shown that in the largest majority of cases, these error-rate expressions can be put in the form of a single integral with finite limits and an integrand composed of elementary functions, thus readily enabling numerical evaluation.

851 citations


Patent
David L. Thompson1
TL;DR: In this paper, power consumption in medical devices is reduced through the use and operation of multiple digital signal processing systems, where each processor of the multiple systems performs at least one particular function in a predetermined time period.
Abstract: Power consumption in medical devices is reduced through the use and operation of multiple digital signal processing systems. Each processor of the multiple systems performs at least one particular function in a predetermined time period. The multiple digital signal processors of such systems can be operated at lower clock frequencies relative to those that would be required by one of such processors to complete the multiple functions within the predetermined time period. With reduced clock frequency, power consumption is reduced. Further, with reduced clock speed, supply voltages applied to such digital signal processors may also be reduced.

433 citations


Patent
30 Mar 1998
TL;DR: In this article, a method for combining digital data with a perceptible program signal is proposed, where the data stream is modulated onto an electromagnetic signal encoding the perceptible signal; the modulating employs a spread spectrum encoding of the data streams.
Abstract: A method for combining digital data with a perceptible program signal. The data stream is modulated onto an electromagnetic signal encoding the perceptible signal; the modulating employs a spread spectrum encoding of the data stream. The modulated program signal is transduced into perceptible form. A capture device receives the perceptible signal, and a decoder extracts the spread spectrum encoded data from the received signal. The method is particularly useful in encoding purchase information or watermarking information into the signal.

273 citations


Journal ArticleDOI
TL;DR: This paper surveys the theory and practice of constrained coding, tracing the evolution of the subject from its origins in Shannon's classic 1948 paper to present-day applications in high-density digital recorders.
Abstract: Constrained codes are a key component in digital recording devices that have become ubiquitous in computer data storage and electronic entertainment applications. This paper surveys the theory and practice of constrained coding, tracing the evolution of the subject from its origins in Shannon's classic 1948 paper to present-day applications in high-density digital recorders. Open problems and future research directions are also addressed.

263 citations


Patent
Brent Keeth1
09 Sep 1998
TL;DR: In this paper, a method and circuit adaptively adjust the timing offset of a digital signal relative to a clock signal output coincident with that digital signal to enable a latch receiving the digital signals to store the digital signal responsive to the clock signal.
Abstract: A method and circuit adaptively adjust the timing offset of a digital signal relative to a clock signal output coincident with that digital signal to enable a latch receiving the digital signal to store the digital signal responsive to the clock signal. The digital signal is applied to the latch, and stored in the latch responsive to the clock signal. The digital signal stored in the latch is evaluated to determine if the stored digital signal has an expected value. The timing offset of the digital signal is thereafter adjusted relative to the clock signal. and the digital signal is once again stored in the latch responsive to the clock signal at the new timing offset. A number of digital signals at respective timing offsets relative to the clock signal are stored and evaluated, and a final timing offset of the digital signal is selected from the ones of the timing offsets that cause the latch to store the digital signal having the expected value. The timing offset of the digital signal is thereafter adjusted to the selected final timing offset. A read synchronization circuit may adaptively adjust the timing offset of digital signals in this manner, and such a read synchronization circuit may be utilized in many types of integrated circuits, including packetized dynamic random access memories, memory systems including a memory controller and one or more such packetized dynamic random access memories, and in computer systems including a plurality of such packetized dynamic random access memories.

257 citations


Journal ArticleDOI
TL;DR: Design algorithms for hybrid filter banks (HFBs) for high-speed, high-resolution conversion between analog and digital signals are presented and a gain normalization technique is developed to maximize the dynamic range in the finite-precision implementation.
Abstract: This paper presents design algorithms for hybrid filter banks (HFBs) for high-speed, high-resolution conversion between analog and digital signals. The HFB is an unconventional class of filter bank that employs both analog and digital filters. When used in conjunction with an array of slower speed converters, the HFB improves the speed and resolution of the conversion compared with the standard time-interleaved array conversion technique. The analog and digital filters in the HFB must be designed so that they adequately isolate the channels and do not introduce reconstruction errors that limit the resolution of the system. To design continuous-time analog filters for HFBs, a discrete-time-to-continuous-time ("Z-to-S") transform is developed to convert a perfect reconstruction (PR) discrete-time filter bank into a near-PR HFB; a computationally efficient algorithm based on the fast Fourier transform (FFT) is developed to design the digital filters for HFBs. A two-channel HFB is designed with sixth-order continuous-time analog filters and length 64 FIR digital filters that yield -86 dB average aliasing error. To design discrete-time analog filters (e.g., switched-capacitors or charge-coupled devices) for HFBs, a lossless factorization of a PR discrete-time filter bank is used so that the reconstruction error is not affected by filter coefficient quantization. A gain normalization technique is developed to maximize the dynamic range in the finite-precision implementation. A four-channel HFB is designed with 9-bit (integer) filter coefficients. With internal precision limited to the equivalent of 15 bits, the maximum aliasing error is -70 dB, and with the equivalent of 20 bits internal precision, maximum aliasing is -100 dB. The 9-bit filter coefficients degrade the stopband attenuation (compared with unquantized coefficients) by less than 3 dB.

241 citations


Patent
23 Apr 1998
TL;DR: An interrogator for use in a backscatter system, the interrogator comprising an antenna configured to receive a back-scatter signal; an IQ downconverter coupled to the antenna and configured to downconvert the backscatt signal to produce I and Q signals; a combiner coupled to IQ down-converting the I and q signals to produce a combined signal; and an analog-to-digital converter coupled with the combiner and configurable to convert the combined signal to a digital signal as discussed by the authors.
Abstract: An interrogator for use in a backscatter system, the interrogator comprising an antenna configured to receive a backscatter signal; an IQ downconverter coupled to the antenna and configured to downconvert the backscatter signal to produce I and Q signals; a combiner coupled to the IQ downconverter and configured to combine the I and Q signals to produce a combined signal; and an analog to digital converter coupled to the combiner and configured to convert the combined signal to a digital signal A method of communications in a backscatter system, the method comprising receiving a backscatter signal; downconverting the backscatter signal with an IQ downconverter to produce I and Q signals; combining the I and Q signals to produce a combined signal; and converting the combined signal to a digital signal

166 citations


Patent
18 Aug 1998
TL;DR: In this article, an apparatus for monitoring the intracranial pressure of a patient is presented, which consists of an implantable sensor implanted in the skull of the patient and a probe receiving the signal output by the implantable sensors when the probe is positioned near the sensor.
Abstract: The present invention relates to an apparatus for monitoring the intracranial pressure of a patient. The apparatus includes an implantable sensor implanted in the skull of a patient. The implantable sensor senses pressure and outputs a signal indicative of the pressure in the patient's skull. The apparatus further includes a probe receiving the signal output by the implantable sensor when the probe is positioned near the implantable sensor. The probe outputs a signal indicative of the pressure sensed by the implantable sensor. An interrogation circuit is provided for receiving the signal output by the probe and automatically outputting a digital signal proportional to the pressure sensed by the implantable sensor.

156 citations


Patent
11 Jun 1998
TL;DR: In this article, an information processing system has signal processors that are interconnected by processing junctions that simulate and extend biological neural networks. And the response of each processing junction is determined by internal junction processes and is continuously changed with temporal variation in the received signal.
Abstract: An information processing system having signal processors that are interconnected by processing junctions that simulate and extend biological neural networks. As shown in the figure, each processing junction receives signals from one signal processor and generates a new signal to another signal processor. The response of each processing junction is determined by internal junction processes and is continuously changed with temporal variation in the received signal. Different processing junctions connected to receive a common signal from a signal processor respond differently to produce different signals to downstream signal processors. This transforms a temporal pattern of a signal train of spikes into a spatio-temporal pattern of junction events and provides an exponential computational power to signal processors. Each signal processing junction can receive a feedback signal from a downstream signal processor so that an internal junction process can be adjusted to learn certain characteristics embedded in received signals.

153 citations


Journal ArticleDOI
06 Jul 1998
TL;DR: A new method for generating and measuring active, reactive, and apparent power at power frequencies has been devised that makes use of digital signal synthesis and discrete Fourier transform evaluation based on a single master clock.
Abstract: A new method for generating and measuring active, reactive, and apparent power at power frequencies has been devised. It makes use of digital signal synthesis and discrete Fourier transform (DFT) evaluation based on a single master clock. This results in a significant reduction of synchronizing errors and thus in an uncertainty of only 2.5/spl times/10/sup -6/ (k=1).

151 citations


Book
08 May 1998
TL;DR: This book fuses signal processing algorithms and VLSI circuit design to assist digital signal processing architecture developers and shows how this technique can be used in applications such as: signal transmission and storage, manufacturing process quality control and assurance, autonomous mobile system control and biomedical process analysis.
Abstract: From the Publisher: Digital Signal Processing is a rapidly expanding area for evaluation and development of efficient measures for representation, transformation and manipulation of signals. This book fuses signal processing algorithms and VLSI circuit design to assist digital signal processing architecture developers. The author also shows how this technique can be used in applications such as: signal transmission and storage, manufacturing process quality control and assurance, autonomous mobile system control and biomedical process analysis.

PatentDOI
TL;DR: In this article, a binaural digital hearing aid system comprises two hearing aid units (1, 2) for arrangement in a user's left and right ear, respectively, each unit comprises input signal transducer means (3r, 3l), A/D conversion means (4r, 4l), digital signal processing means (5r-13r, 5l-13l), D/A conversion mean (14r, 14l), and output signal transducers means (15r, 15l).
Abstract: A binaural digital hearing aid system comprises two hearing aid units (1, 2) for arrangement in a user's left and right ear, respectively. Each unit comprises input signal transducer means (3r, 3l), A/D conversion means (4r, 4l), digital signal processing means (5r-13r, 5l-13l), D/A conversion means (14r, 14l) and output signal transducer means (15r, 15l). A bi-directional communication link (7) is provided between the units. The digital signal processing means of each unit is arranged to affect a substantially full digital signal processing including individual processing of signals from the input transducer means of the actual unit and simulated processing of signals from the input transducer means of the other unit as well as binaural signal processing and includes at least a first digital signal processor part (5r, 5l) for processing said internally supplied signal, a second digital signal processor part (6l, 6r) for processing the signal supplied via said communication link (7) and a third digital signal processor part (9r, 9l) to effect common binaural digital signal processing of information derived from the signals processed in said first and second digital signal processor parts, said second digital signal processor part (6l, 6r) in each unit simulating the first digital signal processor part (5l, 5r) in the other unit with respect to adjustment parameters controlling the performance of said first signal processor part in said other unit.

Patent
16 Apr 1998
TL;DR: In this article, the authors proposed a compromise between the conflicting goals of size, re-programmability and power consumption of a hearing aid and a programmable digital signal processor.
Abstract: An apparatus for a hearing aid provides an application specific integrated circuit (ASIC) for filtering of input signals and a programmable digital signal processor connected to it, for control of filterbank gains. This provides a compromise between the conflicting goals of size, re-programmability and power consumption. The fixed portion of the processing, i.e. filtering is implemented in hardware in the ASIC, and the variable or adjustable portion of the processing is implemented by the programmable digital signal processor. The filterbank has an adjustable number of channels and means for shifting the center frequencies of the bands in unison to one of two discrete sets of center frequencies. A wide range of hearing loss compensation schemes can be implemented. Software programs can be executed on the programmable digital signal processor.

Patent
29 Sep 1998
TL;DR: In this paper, the authors propose a half-duplex transmission of digital information regardless of whether or not the digital information is transmitted from a device located within a substantially electrically shielded environment.
Abstract: A cashless business transaction system (e.g., a vending system, a material tracking system, or a highway toll system) incorporates a method and apparatus for transmitting a digital information signal. A signal generator ( 311 ) generates a constant frequency signal. A phase modulator ( 305 ) varies the instantaneous phase of the constant frequency signal to represent digital information, thereby producing a phase modulated signal ( 325 ). A tuned resonant circuit ( 307 ) filters and averages the phase modulated signal to produce a simulated FM signal, and transmits the simulated FM signal via its antenna ( 309 ). One such business transaction system (e.g., a vending system) incorporates such a transmitter to facilitate transmission of billing information from a device located within a substantially electrically shielded environment. Another such business transaction system preferably incorporates such a transmitter to facilitate half-duplex transmission of digital information regardless of whether or not the digital information is transmitted from a device located within a substantially electrically shielded environment.

BookDOI
01 Jan 1998
TL;DR: In this paper, the authors apply linear predictive coding (LPC) to frequency-spectrum analysis of animal acoustic signals to measure and model sprech production in birds and assess biologically important responses.
Abstract: Contiene: Processing and analysis of acoustic signals. Acoustic signals of animals. Recording field measurements, analysis and description. Digital signal acquisition and representation.Digital signal analysis, editing, and synthesis. Application of filters in bioacoustics. Applying linear predictive coding (LPC) to frequency-spectrum analysis of animal acoustic signals. Sound production and transmission. Ultrasound and infrasound. Measuring and modeling sprech production. Sound production in birds: acoustics and physiology revisited. Assessing biologically important responses.

Patent
06 Jul 1998
TL;DR: In this paper, the authors present a method and apparatus for compiling (acquiring and storing), processing (analyzing, integrating, and organizing), transmitting and reporting data and information, which is comprised of a flexible, modular system that overcomes major limitations of conventional and multidimensional databases.
Abstract: A method and apparatus for compiling (acquiring and storing), processing (analyzing, integrating, and organizing), transmitting, and reporting data and information, which is comprised of a flexible, modular system that overcomes major limitations of conventional and multidimensional databases. A method and apparatus that utilizes computer programming code modules (601) and modules of logically arranged digital signal function and formula formations to: (a) acquire data/information units (602) using modules of query instruction items and response instruction items (603), which can be presented via a branching-logic process, (b) store the responses to the items in independent record files and internal database files, (c) integrate them with digital signals stored in other source (605) via an integration file, (d) process the digital signals in the digital signal processing files, (e) produce portable report files (608), and (f) generate reports utilizing report format files (609).

Patent
17 Aug 1998
TL;DR: In this article, a single-chip digital camera system is described, which includes a sensor array including rows and columns of discrete sensor elements, corresponding analog-to-digital converters to convert analog values into digital data, a storage element coupled to the analog to digital converters, and a plurality of arithmetic logic units coupled with the storage element to operate on the digital data.
Abstract: A single-chip digital camera system is described. In one embodiment, the single-chip digital camera system includes a sensor array including rows and columns of discrete sensor elements, corresponding analog-to-digital converters to convert analog values into digital data, a storage element coupled to the analog-to-digital converters, to store the digital data, and a plurality of arithmetic logic units coupled to the storage element, to operate on the digital data. The digital camera system also includes a switching matrix which is coupled between the array of analog-to-digital converters and the memory element. The switching matrix spatially rotates the analog-to-digital converter outputs for storing such outputs in the memory element.

Patent
20 May 1998
TL;DR: In this article, a transponder includes an antenna and a diode coupled between the antenna and ground, which can be used to modulate an electromagnetic signal received by a trans-ponder so that a modulated electromagnetic signal representative of the signal is re-radiated by the trans-device.
Abstract: A signal representing a physiological condition of a patient is used to modulate an electromagnetic signal received by a transponder so that a modulated electromagnetic signal representative of the signal is re-radiated by the transponder. The transponder includes an antenna and a diode coupled between the antenna and ground. Changing states of a digital signal from an analog-to digital converter that receives an input from a physiological transducer cause the diode to selectively conduct, which causes the impedance of the antenna to change accordingly. The re-radiated electromagnetic signal is demodulated to recover the digital signal, and the output signal of the transducer is recovered and may be displayed to a user and otherwise processed and/or stored.

Patent
04 Sep 1998
TL;DR: In this article, sound data is optically imprinted onto the surface of an object as a two-dimensional encodement, and the digital signal is processed into an expanded analog signal representing the sound represented by the encoder.
Abstract: Both a method and apparatus for reading sound data invisibly imprinted on the surface of an object is provided. In the method, compressed sound data is optically imprinted onto the surface of an object as a two-dimensional encodement (12). An image of the encodement is focused onto an image sensor array (44, 46) that generates a digital signal representative of the image. The digital signal is processed into an expanded analog signal representative of the sound represented by the encodement. The analog signal is then converted into sound. The method is implemented by a hand-held data reader wand (70, 85) having a lens (72), an image sensor, a microprocessor (50) for decoding the output of the image sensor array into an analog sound signal, and a sound transducer such as a speaker. The method may be used to record and play back a voice commentary on not only sheet material objects such as photographs and greeting cards, but also three-dimensional articles such as clothing (98) and furniture (99, 100).

Patent
11 Jun 1998
TL;DR: In this article, an actuator is operated to transmit a wireless signal of about 900 MHz, which is sensed with a receiver/caller unit which sends a digital signal over a telephone line to a monitoring center.
Abstract: The invention provides exemplary monitoring systems and methods for their use. In one exemplary method, a person is provided with a transmitter having an actuator. The actuator is operated to transmit a wireless signal of about 900 MHz. The signal from the transmitter is sensed with a receiver/caller unit which sends a digital signal over a telephone line to a monitoring center. This alerts the monitoring center of the actuation of the transmitter. A return signal is sent over the telephone line from the monitoring center to a speaker of the unit to verbally inquiring regarding the actuation of the transmitter.

Patent
12 Aug 1998
TL;DR: In this paper, the authors describe a communications terminal that adapts to different operating standards by using software algorithms and digital processing instead of physically dedicated hardware, such as physical hardware, software and software.
Abstract: A communications terminal adapts to different operating standards by using software algorithms and digital processing instead of physically dedicated hardware. The communications terminal includes digital processing circuits (103) having a digital signal processor and microprocessor circuits, volatile and non-volatile memory, signal characteristics stored in memory and receiver circuitry to receive and digitize a radio signal. The communications terminal receives the radio signal, converts the radio signal into a digital signal and compares the signal characteristics of the digital signal to signal characteriscs of stored signals. The comparison of the signals identifies the standard of the radio signal and determines the format and protocol of the signal. The hardware is then reconfigured to operate according to the identified standard, format and protocol.

Patent
21 Apr 1998
TL;DR: In this article, a capacitive isolation barrier across which a digital signal is communicated is provided. But the system is not suitable for use in telephony, medical instrumentation, industrial process control and other applications.
Abstract: An isolation system is provided that is suitable for use in telephony, medical instrumentation, industrial process control and other applications. Preferred embodiments of the invention comprise a capacitive isolation barrier across which a digital signal is communicated. The system provides a means of communication across the isolation barrier that is highly immune to amplitude and phase noise interference. Clock recovery circuitry may be employed on one side of the isolation barrier to extract timing information from the digital signal communicated across the barrier, and to filter the effects of phase noise introduced at the barrier. Delta-sigma converters may be disposed on both sides of the isolation barrier to convert signals between analog and digital domains. An isolated power supply may also be provided on the isolated side of the barrier, whereby direct current is generated in response to the digital data received across the isolation barrier. Finally, a bidirectional isolation system is provided whereby bidirectional communication of digital signals is accomplished using a single pair of isolation capacitors. In preferred embodiments, the digital data communicated across the barrier consists of digital delta-sigma data signals multiplexed in time with other digital control, signaling and framing information.

Patent
16 Apr 1998
TL;DR: In this paper, a system for determining a time delay of a signal propagating through a medium is described, which is used to determine the distance between transducers arranged within a body.
Abstract: This invention is a system (50) for determining a time delay of a signal (56) propagating through a medium. The time delay is used to determine the distance between transducers (52, 54) arranged within a body. One or more Digital Signal Processors (DSP) (70) are programmed to recognize various waveform patterns by matching a received waveform to a template waveform.

Patent
15 May 1998
TL;DR: In this paper, a receiver is described, for instance for GSM systems, wherein a plurality of digital signals each comprising a training sequence (x p (t)) usable to generate an estimation of the transmission channel are received in diversity (A. 1... A.N).
Abstract: A receiver is described, for instance for GSM systems, wherein a plurality of digital signals each comprising a training sequence (x p (t)) usable to generate an estimation of the transmission channel are received in diversity (A. 1 . . . A.N) in the form of a plurality of replicas ( 10.1 . . . 10 .N) each comprising a respective replica of the training sequence. The received digital signal is subjected to a delaying action thereby obtaining a plurality of versions of such signal, each comprising a respective set of signal replicas. Each version is subjected to a respective filtering action ( 23.1 . . . 23 .N) independently from the other versions, by employing a respective first set of filtering coefficients (w* 11 . . . w* N1 . . . w* Nj ) obtained starting from a respective initial set of filtering coefficients. This respective initial set is obtained by performing, for each replica of the received signal, a filtering action exploiting a respective second set of filtering coefficients identified as a signal (u(t)) able to generate, by convolution (u(t)*x p (t)) with the training sequence, a unitary function δ(t) on a given time window, preferably on one bit. The filtering coefficients of the first set are derived starting from said initial set of filtering coefficients through an MMSE adaptation, preferably with an initial rapid convergence phase of the RLS type followed by an optimisation phase of the LMS type.

Patent
21 May 1998
TL;DR: In this paper, the carrier frequencies of the QAM and VSB final IF signals are regulated to be sub-multiples of the multiple of both the symbol frequencies of both signals, by applying automatic frequency and phase control signals developed in the digital circuitry to a local oscillator.
Abstract: A radio receiver uses the same tuner for receiving a selected digital television (DTV) signal, irrespective of whether it is a quadrature-amplitude-modulation (QAM) or a vestigial sideband (VSB) signal. The tuner supplies a final IF signal in a 6-MHz-wide frequency band, the lowest frequency of which is not appreciably more than 2.69 MHz. The final IF signal is digitized at a rate that is a multiple of both the symbol frequencies of the QAM and VSB signals, for synchrodyning to baseband, with the 2.69 MHz difference between the carrier frequencies of QAM and VSB signals being taken into account in the digital synchrodyning circuitry. The carrier frequencies of the QAM and VSB final IF signals are regulated to be submultiples of the multiple of both the symbol frequencies of the QAM and VSB signals by applying automatic frequency and phase control signals developed in the digital circuitry to a local oscillator of the tuner.

Patent
01 Jun 1998
TL;DR: In this paper, a digital audio/video archive and distribution system and method utilize a signal capture and compression encoding subsystem to translate an analog signal from at least one media source (i.e., a digital signal segment is automatically correlated with identifying information via an Internet connection, and both are stored in a searchable database subsystem.
Abstract: A digital audio/video archive and distribution system (10) and method utilize a signal capture and compression encoding subsystem (12) to translate an analog signal from at least one media source (14) into at least one digital signal segment. The digital signal segment is automatically correlated with identifying information (18) input via an Internet connection, and both are stored in a searchable database subsystem (24). Upon a user request (28) received via an Internet connection, or programming prompt, a graphical user interface (GUI), such as a web-based user interface, is created to distribute one or more of the stored digital signal segments.

Patent
04 Nov 1998
TL;DR: In this paper, the gain control signal based on received signal strength is analog based and the control signal received from the control system is a pure digital signal substantially immune to noise, and the corresponding amplifier is configured to receive a digital value and provide a corresponding amplifier gain.
Abstract: Power control circuitry for the transmitting section of a mobile terminal provides gain control for amplifiers operating at different frequencies. Preferably, one amplifier controls the signal gain the signal transmission path in the IF section and another amplifier controls gain in the signal transmission path in the radio frequency (RF) section. One variable gain amplifier may be controlled based on the strength of the received signals while the other may be controlled based on commands from the base station and/or calibration and alignment settings during manufacturing. In addition, one or both of the amplifiers may optionally be controlled in whole or in part based on calibration and/or alignment settings established during manufacturing. Preferably, the gain control signal based on received signal strength is analog based and the control signal received from the control system is a pure digital signal substantially immune to noise. In such an embodiment, the corresponding amplifier is configured to receive a digital value and provide a corresponding amplifier gain.

Patent
Murtaza Ali1
15 Jul 1998
TL;DR: In this paper, a hierarchical lapped transform is used to decompose the input sequence into coefficients representative of plurality of sub-bands corresponding to critical bands of the human ear, and each coefficient is modified by a noise suppression filter operator, based upon a ratio of an estimate of the noise power to an estimation of the signal power in the corresponding sub-band; clamping of changes in the estimate over time, and use of a decaying signal envelope estimate, eliminate distortion in the processed signal.
Abstract: A communications device, such as a cellular telephone handset (10), and a method of operating the same to suppress noise in audio information such as speech, is presented. The handset (10) includes a digital signal processor (DSP) (30) having program memory (31) for controlling the DSP (30) to apply a hierarchical lapped transform to the input digital sequence. The hierarchical lapped transform decomposes the input sequence into coefficients representative of plurality of sub-bands corresponding to critical bands of the human ear. Each coefficient is modified by a noise suppression filter operator, based upon a ratio of an estimate of the noise power to an estimate of the signal power in the corresponding sub-band; clamping of changes in the noise power estimate over time, and use of a decaying signal envelope estimate, eliminate distortion in the processed signal. Musical noise is eliminated by using a minimum gain value in each sub-band. Inverse transformation of the modified coefficients provides the filtered time-domain output signal. Improved noise suppression is provided, in a manner that may be readily and robustly performed by fixed-point digital signal processors.

Patent
10 Jun 1998
TL;DR: In this article, a switch selection (SUG1 -SUGi, SB) is used to connect each of the plurality of capacitors between an input terminal and an output terminal of an operational amplifier 100 during a period when a clock 2 is at a high level.
Abstract: A D/A converter for converting a given digital signal into an analog signal includes a plurality of capacitors (C1, C2 ..., Ci) for storing an electric charge corresponding to a predetermined reference voltage (Vr + or Vr-). The reference voltage is selected depending on the digital signal during a period when a clock 1 is at a high level. A switch selection (SUG1 - SUGi, SB) is used to connect each of the plurality of capacitors between an input terminal and an output terminal of an operational amplifier 100 during a period when a clock 2 is at a high level.

Patent
13 Oct 1998
TL;DR: In this paper, a coupling circuit for coupling a first signal generated in a first circuit operating in the first clock domain to a second circuit operating on a second clock domain is introduced, where the output signal is used as reset signal to disable the first gate and reset the latches.
Abstract: A coupling circuit for coupling a first signal generated in a first circuit operating in a first clock domain to a second circuit operating in a second clock domain. The coupling circuit includes a first gate for coupling the first signal to a first logic circuit unless the coupling circuit has already applied a signal to the second circuit. The first logic circuit includes a pair of second gates that are enabled by respective rising and falling edges of the first clock signal. Thus, each of the second gates generates an output signal on respective transitions of the first clock signal as long as the first gate is coupling the first signal to the first logic circuit. The first logic circuit also includes a pair of latches coupled to respective outputs of the second gates. Each of the latches is set by its respective second gate generating the output signal. The second logic gates are coupled to a second logic circuit having a pair of third gates that are enabled by respective rising and falling edges of the second clock signal. Thus, each of the second gates generates an output signal on respective transitions of the second clock signal if the latch to which it is connected is generating an output signal. The output signal is also used as the reset signal to disable the first gate and reset the latches. Since the output signal is generated on the first transition of the first clock signal after the first signal is applied to the coupling circuit, the coupling circuit generates a single output signal that is synchronized to the second clock signal.