Showing papers on "Digital signal published in 2000"

Self-powered medical device

Abstract: A self-powered medical device, which is operated independently of the public utility network, has at least one voltage source, a signal input for accepting an analog input signal and a signal processing unit. The sampling rate for the input signal or the clock frequency of at least one digital component can be varied. Therefore, the energy demand can be reduced according to the requirements of the signal processing or when the discharge state of the voltage source requires a reduction.

Digital cancellation of D/A converter noise in pipelined A/D converters

Abstract: Pipelined analog-to-digital converters (ADCs) tend to be sensitive to component mismatches in their internal digital-to-analog converters (DACs), The component mismatches give rise to error, referred to as DAC noise, which is not attenuated or cancelled along the pipeline as are other types of noise. This paper describes an all-digital technique that significantly mitigates this problem. The technique continuously measures and cancels the portion of the ADC error arising from DAC noise during normal operation of the ADC, so no special calibration signal or auto-calibration phase is required. The details of the technique are described in the context of a nominal 14-bit pipelined ADC example at both the signal processing and register transfer levels. Through this example, the paper demonstrates that in the presence of realistic component matching limitations the technique can improve the overall ADC accuracy by several bits with only moderate digital hardware complexity.

Oversampling pulse oximeter

Abstract: An oversampling pulse oximeter includes an analog to digital converter with a sampling rate sufficient to take multiple samples per source cycle. In one embodiment, a pulse oximeter (100) includes two mor more light sources (102) driven by light source drives (104) in response to drive signals from a digital signal processing unit (116). The source drives (104) may drive the sources (102) to produce a frequency division multiplex signal. The optical signals transmitted by the light sources (102) are transmitted through a patient's appendage (103) and impinge on a detector (106). The detector (106) provides an analog current signal representative of the received optical signals. An amplifier circuit (110) converts the analog current signal to an analog voltage signal in addition to performing a number of other functions. The amplifier circuit (110) outputs an analog voltage signal which is representative of the optical signals from the sources (102). This analog voltage signal is received by a fast A/D converter (112) which samples the analog voltage signal to generate a digital voltage signal which can be processed by the digital signal processing unit (116). The fast A/D converter (112) operates at a rate sufficient to take multiple samples per source cycle and may have a sampling frequency, for example, of over 41 kHz. The digital signal processing unit (116) implements software for averaging the samples over a source cycle for improved measurement consistency, improved signal to noise ratio and reduced A/D converter word length.

Predicting error rate for microprocessor-based digital architectures through C.E.U. (Code Emulating Upsets) injection

Abstract: This paper investigates an approach to study the effects of upsets on the operation of microprocessor-based digital architectures. The method is based on the injection of bit-flips, randomly in time and location by using the capabilities of typical application boards. Experimental results, obtained on programs running on two different digital boards, built around an 80C51 microcontroller and a 320C50 Digital Signal Processor, illustrate the potentialities of this new strategy.

Voice-controlled vehicle control system

Abstract: A vehicle control system for permitting voice control of at least one device in a vehicle by at least one user includes a radio transponder unit which outputs an RF signal which includes an identification code; an electronic receiver for receiving the RF signal and down converting the received signal to output the identification code; a microphone for receiving an audible signal spoken by a user and converting the audible signal to a digital signal; a memory for storing a plurality of files, each file comprising a voiceprint of a user and a command instruction for controlling at least one function of the device; and a microprocessor for determining whether the identification code is valid and for analyzing the digital signal to determine whether it matches one of the voiceprints stored in memory if the identification code is determined valid. The microprocessor executes a command instruction to control the function of the device if a match has been found.

Portable signal transfer unit

Abstract: This invention is a portable signal transfer unit (12) for relaying a signal representative of physiological data of a mammalian subject (S) from a remote physiological sensor (10) to a remote receiver unit (16).

Microprocessor-based hand-held battery tester system

Abstract: A system for determining the operating characteristics of an energy source. The system comprises a controller for generating and shaping a time-varying voltage signal for application to the energy source; a converter for receiving from the energy source a time-varying return voltage signal and for converting the tire-varying return voltage signal into a digital signal. The amplitude of the time-varying return signal contains information representative of the operating characteristics of the energy source. The time-varying return voltage signal is produced in response to the time-varying voltage signal. The controller is responsive to the digital signal and determines the operating characteristics of the energy source. The controller generates display signals, and the display signals are representative of the operating characteristics of the energy source. The system also includes a display for displaying the display signals.

Method and apparatus for RF common-mode noise rejection in a DSL receiver

Abstract: A receiver (50) for high-speed data communications, which receives a differential signal through a pair of signal lines (20, 22). The receiver includes a common-mode choke (52), which has first and second signal windings (24, 26), which are respectively coupled in series to the pair of signal lines so as to attenuate common-mode interference in the differential signal. The choke also has a sampling winding (54), which is inductively coupled to the signal windings so as to generate a sampled signal responsive to current flowing in the signal windings. Signal processing circuitry (62) is coupled to receive the sampled signal from the sampling winding and to receive the differential signal from the signal windings and to process the differential signal responsive to the sampled signal.

Parallel amplifier architecture using digital phase control techniques

Abstract: An improved method and apparatus for using parallel amplifiers to efficiently amplify an information signal are disclosed. The improved apparatus utilizes digital signal manipulation techniques in optimizing the phase of the upconverted input signals provided to each of the parallel amplifiers. The phase and amplitude of the input signals are adjusted such that the power measured at the output of a combiner (402) is maximized as compared to the sum of the power of combiner (120) input signals.

Digital system for embedding a pseudo-randomly modulated auxiliary data sequence in digital samples

Abstract: A system for embedding auxiliary digital information (D i ) into an existing primary digitally encoded signal (X n ) to form an unobjectionable composite digital signal (C n ). Auxiliary data bits (D i ) modulate a pseudo-random (e.g., PN) sequence ( 125 ) to provide an auxiliary data sequence ( 160 ) that is used to modify the Least Perceptually Significant Bits (LPSBs) ( 180 ) of successive multi-bit samples ( 120 ) of the primary signal. In a cross-term compensation embodiment ( 300, 400, 1000 ), a correlation (V) between the PN sequence and the sample bits is determined, and compared to the auxiliary data bits (D i ) to determine whether there is a desired correspondence. The LPSBs in the samples are toggled ( 360 ), if necessary, to provide the desired correspondence. The selection of LPSBs to modify accounts for a desired noise level of the auxiliary data (D i ) in the primary signal (X n ). LPSBs may be selected to be modified based on a sparse PN sequence ( 250 ) to achieve the desired noise level and to conceal the presence of the auxiliary data (D i ). The data to be hidden can be any digital data, while the primary signal is any uncompressed or compressed digitally sampled process, including, for example, audio or video data.

Projection type display device

Abstract: PROBLEM TO BE SOLVED: To enable the correction of a change in brightness when a trapezoidal distortion correction is carried out by providing a projection type display device having a trapezoidal distortion correction means for correcting the contour of an image to a rectangular shape with a correction means for correcting the brightness. SOLUTION: The signal inputted from an image signal input terminal is inputted through an amplifier for amplitude regulation to an A/D converter 100. This signal is converted to a digital signal by the clock signal output from a VCO 110 in this A/D converter 100 and this digital signal is introduced to a display device 130 through a signal processing section 120. The trapezoidal distortion correction is executed by varying the oscillation frequencies at the top end and bottom end of the image by a saw tooth waveform Vosc generated by a saw tooth wave generator 160 from a vertical synchronizing input in an adder 150 during the course of the introduction. Simultaneously, the correction of the brightness is also executed by varying image amplitudes at the top end and bottom end of the image by the saw tooth waveform Vamp generated by the saw tooth wave generator 160 from the vertical synchronizing input. The correction of the brightness may thus be executed simultaneously with the trapezoidal distortion correction.

An efficient algorithm for sample rate conversion from CD to DAT

Abstract: This letter unveils an efficient algorithm for sampling rate conversion (SRC) technique from 44.1 kHz compact disc (CD) to 48 kHz digital audio tape (DAT). This method involves upsampling the input signal by two, and then passing the interpolated signal through a fractional delay filter that employs a simple decimation. This method can also be used for SRC from DAT to CD without changing the filter coefficients. The proposed algorithm is simulated in Matlab and can be implemented in a realtime digital signal processor (DSP). Compared with other existing methods, the proposed method has the advantage that it requires fewer million instructions per second (MIPS) and memory.

Determining transformations of media signals with embedded code signals

Abstract: An embedded signal detection process determines a transformation of a media signal subsequent to the encoding of an embedded code signal into the media signal. The process performs a logarithmic sampling of the media signal to create a sampled signal in which scaling of the media signal is converted to translation in the sampled signal. It then computes the translation of the embedded code signal in the sampled signal to determine scaling of the media signal subsequent to the encoding of the embedded signal in the media signal.

Method and apparatus for DC offset correction

Abstract: A DC offset correction loop (200, 300) utilizes a peak estimator (218, 322) to determine peaks associated with a digital signal (238, 338). The peak estimator (218, 322) averages the peaks in order to estimate the DC offset. A summer (216, 326) sums the DC offset (242, 350) with the digital signal to produce a corrected output.

Pulse width modulation circuit, optical write unit, image forming apparatus and optical write method

Abstract: A pulse width modulation circuit is provided with a signal generating circuit generating a reference clock signal and a predetermined signal which is approximately inversely proportional to a digital data input signal, a delay quantity generating circuit delaying the reference clock signal by a desired phase delay to output a pulse signal, based on the predetermined signal from the signal generating circuit, a delay quantity controller controlling a delay quantity of the delay quantity generating circuit, and a modulated signal generator generating a modulated signal which is pulse-width-modulated based on the pulse signal from the delay quantity generating circuit and the reference clock signal.

Baseband RF voltage-current probe

Abstract: An RF probe for a plasma chamber picks up current and voltage samples of the RF power applied to an RF plasma chamber, and the RF voltage and current waveforms are supplied to respective mixers. A local oscillator supplies both mixers with a local oscillator signal at the RF frequency plus or minus about 15 KHz, so that the mixers provide respective voltage and current baseband signals that are frequency shifted down to the audio range. The phase relation to the applied current and voltage is preserved in the baseband signals. These baseband signals are then applied to a stereo, two-channel A/D converter, which provides a serial digital signal to a digital signal processor or DSP. A local oscillator interface brings a feedback signal from the DSP to the local oscillator. The DSP can be suitably programmed to obtain complex Fast Fourier Transforms of the voltage and current baseband samples. The frequency-domain spectra are analyzed to obtain, with great accuracy, magnitude of voltage and current and phase angle. Other parameters are derived from these three.

Variable resistor circuit and a digital-to-analog converter

Abstract: A 1-bit D/A converter with a zero detect soft mute function is provided in such a manner that a counter is operated by detecting that a multibit digital signal is all zero for a constant period of time, and a feedback resistor of an op-amp in the analog low-pass filter is decreased stepwise based on a discrete value of the counter so as to be finally short-circuited so that a D/A convert output is fixed at a reference potential. The feedback resistor is composed of a plurality of resistors of first and second groups and first to third analog switches. A first digital control variable resistor is constituted by connecting the resistors of the first group in series and connecting a first analog switch selectively turned on/off in accordance with an output signal other than an LSB of the counter to respective nodes. A second digital control variable resistor is constituted by connecting the resistors of the second group in parallel and connecting a second analog switch controlled by the LSB of the counter to one side resistor in series. The first and second digital control variable resistors are connected in series, and a third analog switch is connected to both ends so as to constitute a feedback resistor.

Synchronous type semiconductor memory system with less power consumption

Abstract: A synchronous type dynamic random access memory (SDRAM) includes a memory cell array section having an address decoder section and a sense amplifier section, a power down signal generating section, a control signal generating section and an accessing section. The power down signal generating section generates a first power down signal and a second power down signal based on a clock enable signal, an external clock signal, a signal specific to the SDRAM and a write burst signal. The first power down signal is inactive during a predetermined time period synchronous with the specific signal, and the second power down signal is inactive during the predetermined time period and during a time period during which the write burst signal is supplied. The control signal generating section generates a control signal based on a command signal when the first power down signal is inactive. The accessing section accesses the memory cell array section based on an external address signal and an external data signal in response to the control signal when the first power down signal or the second power down signals is inactive.

Spurious signals in direct digital frequency synthesizers due to the phase truncation

Abstract: Direct digital frequency synthesizers (DDS or DDFS) are widely used in modern communications and measurement devices. Their advantages are small size and power consumption together with excellent frequency stability, high frequency resolution, and short switching times. The difficulties are rather low output frequencies (500 MHz at the present state of the art) and a large set of the spurious signals very often above the -80 dB level. One source of spurious signals in DDS is the use of smaller number, W, of the most significant bits (MSB) applied for the output sine wave reconstruction from all R bits stored in the accumulator. The result is a phase modulation of the output signal. The problem was first solved in a rather complicated way with the result that the level of the largest spurious signal is about -6 W dB below the carrier with an increase of 3.9 dB in some instances. A simpler solution of the problem of spurious signal level due to the phase truncation in DDS was found earlier. However, no attention was paid to the validity of the corrections suggested. In this paper we will be concerned with this problem and investigate the validity and correctness of these generally cited results and provide a simple way for finding positions, levels, and numbers of these spurious signals generated by truncation to W bits of the phase information stored in the DDS accumulator memory of R bits (W

Digital signal filtering, analysis and restoration

Abstract: Aiming to give an introduction to the basic theory of digital signal processing and analysis, this book starts by providing the theoretical background and principal methods for one-dimensional signals before building to more complex signals.

Dual energy x-ray imaging system and method for radiography and mammography

Abstract: A digital x-ray imaging system employs a pixelated flat panel digital x-ray detector separated by a space from a source of x-rays which is selectively switchable between first and second, different x-ray energy levels, the space accommodating a body to be subjected to x-ray irradiation and imaging. A computer controls the x-ray source to irradiate the body with the first and second energy level x-rays and produce corresponding first and second x-ray images respectively of the first and second energy levels on the detector, the computer processing the respective digital signal outputs of the detector for the first and second digital images respectively of the first and second energy levels for each pixel, in individual succession for all pixels, and selectively produces and displays a soft tissue image or a bone/calcification image.

Semi transparent tributary for synchronous transmission

Abstract: An interface for converting a variety of incoming digital signals into SDH/SONET format for transmission on a synchronous digital network, by identifying the line code of the incoming digital signal, without identifying the information for OSI layer 2 or 3 processing, i.e. format of each packet. Headers are used to encapsulate incoming packets, and enable packets to be discriminated at the receiver. Advantages of performance monitoring capability and transparency are combined. Identifying line codes enables a greater degree of error detection, than a bit based interface. Also synchronisation can be simpler since line codes for padding can be added or deleted more easily than adding or subtracting bits. The interface is semi-transparent in the sense that identification of line codes limits the interface to those formats that use identifiable line codes, but without limiting to a particular OSI layer 2 or 3 frame format.

Robust and efficient digital audio watermarking using audio content analysis

Abstract: Digital audio watermarking embeds inaudible information into digital audio data for the purposes of copyright protection, ownership verification, covert communication, and/or auxiliary data carrying. In this paper, we first describe the desirable characteristics of digital audio watermarks. Previous work on audio watermarking, which has primarily focused on the inaudibility of the embedded watermark and its robustness against attacks such as compression and noise, is then reviewed. In this research, special attention is paid to the synchronization attack caused by casual audio editing or malicious random cropping, which is a low-cost yet effective attack to watermarking algorithms developed before. A digital audio watermarking scheme of low complexity is proposed in this research as an effective way to deter users from misusing or illegally distributing audio data. The proposed scheme is based on audio content analysis using the wavelet filterbank while the watermark is embedded in the Fourier transform domain. A blind watermark detection technique is developed to identify the embedded watermark under various types of attacks.© (2000) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

Personal event monitor with linear omnidirectional response

Abstract: A monitor device for monitoring the activity of an individual to provide an alarm for anomalous by the individual. The device includes a triaxial accelerometer adapted to measure simultaneously measure acceleration in three orthogonal, linear axes and generate a voltage output identifying the amplitude and frequency of detected motion by the individual in each axis. Also included is interface electronics for receiving the voltage outputs and buffering the voltage outputs to generate a first reference voltage for each axis of the accelerometer. Amplifier electronics amplifies each voltage output and compares each voltage output to the first reference voltage to produce a digital signal. A microcontroller receives the digital signal to compare it to an adjustable second reference voltage. The microcontroller is programmed to discriminate between normal activity and anomalous activity by identifying sensor activity within sequences of preselected time intervals and sending an alarm signal upon detection of the anomalous activity. An alarm for receiving the alarm signal and signaling an alarm completes the device.

Signal recognizer for communications signals

Abstract: A signal recognizer capable of classifying any of all commonly used communications signals. The recognizer has a number of modules that may operate in parallel, each module associated with a different signal type. Each module determines signal parameters by first estimating one or more parameters of a detected signal of interest. The estimated parameter(s) is then used as the basis for demodulating the input signal. The demodulated symbols are used for hypothesis testing, during which the module decides on a candidate signal type for that module. Each module subjects its candidate signal type to a “false alarm” test, which evaluates the likelihood that the signal is not the signal type associated with the module. The resulting confidence data is collected and analyzed to determine a best candidate signal type from among all the modules, together with its signal parameters.

Detection of flip closure state of a flip phone

Abstract: A detection circuit that detects the open and close state of a flip cover of a communications device. The detection circuit includes a resistive network and an analog-to-digital converter (ADC). When the flip cover is in the closed position, the circuit detects a unique resistive value through a set of contacts. This voltage level is converted from an analog signal to a digital signal via the ADC for input into a microprocessor. When the flip cover is in the open position, the contacts are broken, thus, disabling the detection of the unique resistive value. The resulting voltage level is converted from an analog signal to a digital signal via the AD for input into a microprocessor. Software, programmed within the microprocessor, enables the communications device to operate in the appropriate mode according to the detection of the open/close state of the flip cover.

Digital image sensor with on -chip programmable logic

Abstract: An image sensor, including a substrate having formed thereon by a CMOS process a digital sensor array having a plurality of digital pixel sensors which output analog signals corresponding to a desired image. The digital sensor array further includes supporting circuitry for converting the analog signals produced by the digital pixel sensors to digital signals corresponding to the desired image. Filter circuitry, for converting the digital signals to digital values representative of the light intensity impinging upon the plurality of digital pixel sensors, is also formed on the substrate using CMOS fabrication processes. Memory devices, including a data memory, a threshold memory, and a time index memory are formed on the substrate using CMOS fabrication techniques. A clock circuit is also formed on the substrate using CMOS fabrication processes. Programmable logic structures are formed on the substrate using CMOS fabrication processes. The programmable logic structure can be configured into a variety of circuitry or routing so as to facilitate customization or specialization of the image sensor.

A fast automatic modulation recognition algorithm and its implementation in a spectrum monitoring application

Abstract: An algorithm based on an efficient decision-tree approach for performing real-time automatic modulation recognition is presented. The algorithm is computationally efficient and can discriminate between various digital and analog signal modulation, delivering reliable decisions using very short observation times. Communications formats, such as AMPS, GSM and US digital cellular, can also be recognized. The implementation of this algorithm in a practical spectrum monitoring system is discussed. Measurements using off-the-air signals, and computer simulations, indicate that the system performs well in different surveillance scenarios.

Non-linear distortion compensation circuit, transmitter device to be employed in the same and mobile communication unit

Abstract: A non-linear distortion compensation circuit, a transmission equipment employing the same and a mobile transmission equipment may accurately compensate distortion caused by non-linearity of a transmitter per bit (symbol) even while the base station is performing transmission power control for the transmitter of the mobile station. The non-linear distortion compensation circuit in a transmission equipment controls a transmission power depending upon an external transmission power control information upon transmission of a digital signal. The non-linear compensation circuit has compensation component generating means for generating a compensation component for a non-linear distortion depending upon a transmission power per bit of the digital signal and the transmission power control information, and compensating means for compensating the non-linear distortion of the transmission signal by the compensation component.