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Digital signal

About: Digital signal is a research topic. Over the lifetime, 44213 publications have been published within this topic receiving 345279 citations.


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Patent
21 Dec 1994
TL;DR: In this article, the authors propose a data detecting apparatus for detecting desired data from a digital signal comprising a first sampling circuit for sampling the digital signal to output samples, an interpolating circuit for interpolating signal values between the samples outputted from the first sampled circuit, and a second sampling circuit, which matches a phase of a point at which the desired data exists.
Abstract: A data detecting apparatus for detecting desired data from a digital signal comprising a first sampling circuit for sampling the digital signal to output samples, an interpolating circuit for interpolating signal values between the samples outputted from the first sampling circuit, and a second sampling circuit for extracting those signal values interpolated by the interpolating circuit which match a phase of a point at which the desired data exists. This constitution allows to implement all blocks making up the data detecting apparatus with digital signal processing circuits synchronously operating on the a clock, detecting the reproduced signal data without being affected by jitters contained in reproduced signals coming from a channel. The constitution also makes it possible to form on a single LSI chip such circuits including the data detecting apparatus, an ECC decoder, a controller, and an interface circuit as conventionally formed on discrete chips. This permits a compact implementation of an entire apparatus and reduces its production cost. Further, this constitution facilitates the design and test for implementing the embodiment on large scale integrations and eliminates the necessity for externally attached analog parts, making the implementation free of adjustment and less susceptible to aging.

62 citations

Patent
21 May 2014
TL;DR: In this article, the interference effects between the receiver analog circuitry and the receiver digital circuitry tend to be reduced, by partitioning the receivers analog and digital circuits so that interference effects can be reduced.
Abstract: Radio-frequency (RF) apparatus includes receiver analog circuitry that receives an RF signal and provides at least one digital signal to receiver digital circuitry that functions in cooperation with the receiver analog circuitry. The receiver analog circuitry and the receiver digital circuitry are partitioned so that interference effects between the receiver analog circuitry and the receiver digital circuitry tend to be reduced.

62 citations

Proceedings ArticleDOI
TL;DR: A digital audio watermarking scheme of low complexity is proposed in this research as an effective way to deter users from misusing or illegally distributing audio data.
Abstract: Digital audio watermarking embeds inaudible information into digital audio data for the purposes of copyright protection, ownership verification, covert communication, and/or auxiliary data carrying. In this paper, we first describe the desirable characteristics of digital audio watermarks. Previous work on audio watermarking, which has primarily focused on the inaudibility of the embedded watermark and its robustness against attacks such as compression and noise, is then reviewed. In this research, special attention is paid to the synchronization attack caused by casual audio editing or malicious random cropping, which is a low-cost yet effective attack to watermarking algorithms developed before. A digital audio watermarking scheme of low complexity is proposed in this research as an effective way to deter users from misusing or illegally distributing audio data. The proposed scheme is based on audio content analysis using the wavelet filterbank while the watermark is embedded in the Fourier transform domain. A blind watermark detection technique is developed to identify the embedded watermark under various types of attacks.© (2000) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

62 citations

Patent
30 May 1975
TL;DR: In this article, the authors proposed a digital multiplexer which combines N parallel bit-synchronized digital signals, each of bit rate f 1, into a single composite line signal, where f 2 > Nf 1.
Abstract: Disclosed is a digital multiplexer which combines N parallel bit-synchronized digital signals, each of bit rate f 1 , into a single composite line signal of bit rate f 2 , where f 2 > Nf 1 . Before the individual bits are interleaved, each digital signal is converted to a submultiple of the line frequency, f 2 . By inserting gaps having a predetermined duration and occurring at a fixed rate into each of the N digital signals, the bit rate f 1 of each bit stream is increased to f 2 /N. This is done without sampling any bit more than once. A multiplexer sequentially interleaves each bit from the N converted bit streams along with the gaps in each bit stream, forming the composite signal of bit rate f 2 . The interleaved gaps form empty time slots in the composite signal into which one or more signaling bits are added. Some of the added signaling bits carry framing information to lock the transmitter and receiver together. Thus, a composite higher-rate digital line signal consisting of interleaved information bits and signaling bits forms the time-division multiplex signal suitable for transmission over a single digital transmission path.

62 citations

Patent
01 Jul 2004
TL;DR: In this article, an analog-to-digital converter (ADC) coupled to a receiver is used to convert the received analog signal into a series of binary data bits, which are then converted to binary codes.
Abstract: A signal processing system includes a receiver for receiving an analog signal. The system also includes an analog-to-digital converter (ADC) coupled to the receiver. At each of a series of time intervals, the ADC outputs sequential digital codes. Each digital code corresponds to a sampled analog value of the received analog signal at each sample interval. The system further includes a memory in which the sequential digital codes may be stored, and a processing circuit for converting the digital codes into a series of binary data bits. The conversion may be performed in a different sequence than the sequence in which the digital codes are stored in the memory.

62 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20239
202225
2021190
2020755
2019942
2018915