Topic
Digital signal
About: Digital signal is a research topic. Over the lifetime, 44213 publications have been published within this topic receiving 345279 citations.
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TL;DR: It is shown that bandlimiting the new codes prior to pulse compression acts as a waveform amplitude weighting which has the effect of increasing the mainlobe to sidelobe ratios.
Abstract: A new class of symmetric radar pulse compression polyphase codes is introduced which is compatible with digital signal processing. These codes share many of the useful properties of the Frank polyphase code. In contrast with the Frank code, the new codes are not subject to mainlobe to sidelobe ratio degradation caused by bandlimiting prior to sampling and digital pulse compression. It is shown that bandlimiting the new codes prior to pulse compression acts as a waveform amplitude weighting which has the effect of increasing the mainlobe to sidelobe ratios.
126 citations
Patent•
23 Jul 2002TL;DR: In this paper, a multichip light-emitting-diode package having a support member, at least two LEMD chips disposed on the support member for reporting quantitative and spectral information to a controller, relating to the light output of the light emitting-diodes, and a signal processing circuit, including an analog-to-digital converter logic circuit, disposed on a supporting member for converting the analog signal output produced by the sensors to a digital signal output.
Abstract: A multichip light-emitting-diode package having a support member, at least two light-emitting-diode chips disposed on the support member, at least one sensor disposed on the support member for reporting quantitative and spectral information to a controller, relating to the light output of the light-emitting-diodes, and a signal processing circuit, including an analog-to-digital converter logic circuit, disposed on the support member for converting the analog signal output produced by the sensors to a digital signal output.
126 citations
Patent•
26 Feb 2003TL;DR: In this article, a low-cost user portable signal enhancer unit for extending service coverage of wireless communications to a user in a desired area of limited coverage is proposed, which supports an increase of signal power levels to allow wireless communication usage in a location, such as a small office or home office environment where the original cellular signals are weak or unreliable.
Abstract: A low-cost user portable signal enhancer unit for extending service coverage of wireless communications to a user in a desired area of limited coverage. The enhancement supports an increase of signal power levels to allow wireless communication usage in a location, such as a small office or home office environment where the original cellular signals are weak or unreliable. A base station signal is enhanced by a bi-directional amplifier device (BDA), which receives a base station signal, amplifies the signal power and retransmits the amplified signal in a first signal path to a user in close proximity. The bi-directional amplifier also receives a user signal, amplifies the signal power and retransmits the amplified signal to the base station in a second separate signal path. Dual polarized antennas can receive and transmit the respective signals at opposite polarizations to increase isolation of the signals.
125 citations
Patent•
21 Jun 1999TL;DR: In this paper, the analog-to-digital converter (ADC) is realized in a field programmable gate array (FPGA) without adding special dedicated analog circuitry, and the analog comparator in an interface cell of the FPGA compares an incoming digital signal to a reference voltage.
Abstract: An analog-to-digital converter (ADC) is realized in a field programmable gate array (FPGA) without adding special dedicated analog circuitry. In a digital application, a comparator in an interface cell of the FPGA compares an incoming digital signal to a reference voltage. Adjusting of the reference voltage allows the interface cell to support different digital I/O standards. In one embodiment, the comparator is not used for this digital purpose, but rather is used as a comparator in an ADC. A flash ADC is realized by using the comparators of numerous interface cells as the comparators of the flash ADC. Conversion speed is increased by reducing the impedance of the analog signal input path. An on-chip resistor string is provided so that the flash ADC can be realized without external components. In another embodiment, the comparator of the interface cell is the comparator of a successive approximation ADC. In some embodiments, an interface cell has a pad that is usable for receiving a digital signal or for receiving an analog signal. The interface cell includes special dedicated analog circuitry that has a differential input lead that is programmably couplable to the pad.
124 citations
Patent•
04 Jan 1988
TL;DR: In this article, a system for transmitting digital signals over a transmission line including a driver of an inverter employing CMOS FET's and a termination of a CFI employing CFI's is described.
Abstract: A system for transmitting digital signals over a transmission line including a driver of an inverter employing CMOS FET's and a termination of an inverter employing CMOS FET's A sense/control circuit at the termination senses changes in the operating condition of the driver inverter and in response thereto controls the operating condition of the termination inverter Under steady state conditions the termination inverter establishes the appropriate voltage at an output connection coupled thereto without dissipating any power
124 citations