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Digital signal

About: Digital signal is a research topic. Over the lifetime, 44213 publications have been published within this topic receiving 345279 citations.


Papers
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Journal ArticleDOI
TL;DR: This paper presents a 3.6-GHz digital PLL in 65-nm CMOS, with in-band fractional spurs dropping from -39 to -52 dBc when the pre-distortion is enabled, in- band phase noise of -103 dBc/Hz and power consumption of 4.2 mW.
Abstract: Digital fractional-N phase-locked loops (PLLs) are an attractive alternative to analog PLLs in the design of frequency synthesizers for wireless applications. However, the main obstacle to their full acceptance in the wireless-systems arena is their higher content of output spurious tones, whose level is ultimately set by the nonlinearity of the time-to-digital converter (TDC). The known methods to improve the linearity of the TDC either increase its dissipation and phase noise or require slow foreground calibrations. By contrast, the class of digital PLLs based on a one-bit TDC driven by a multibit digital-to-time converter (DTC) substantially reduces power dissipation and eliminates the TDC nonlinearity issues. Although its spur performance depends on DTC linearity, the modified architecture enables the application of a background adaptive pre-distortion which does not compromise the PLL phase-noise level and power consumption and is much faster than other calibration techniques. This paper presents a 3.6-GHz digital PLL in 65-nm CMOS, with in-band fractional spurs dropping from -39 to -52 dBc when the pre-distortion is enabled, in-band phase noise of -103 dBc/Hz and power consumption of 4.2 mW.

108 citations

Patent
10 Jul 2001
TL;DR: In this paper, an analog phase detector is utilized whose phase error output signal is delta-sigma modulated to encode the magnitude of the phase error using a digital (i.e., discrete-time and discrete-value) signal.
Abstract: In a feedback system such as a PLL, the integrating function associated with a loop filter capacitor is instead implemented digitally and is easily implemented on the same integrated circuit die as the PLL. There is no need for either an external loop filter capacitor nor for a large loop filter capacitor to be integrated on the same integrated circuit die as the PLL. In a preferred embodiment, an analog phase detector is utilized whose phase error output signal is delta-sigma modulated to encode the magnitude of the phase error using a digital (i.e., discrete-time and discrete-value) signal. This digital phase error signal is “integrated” by a digital integration block including, for example, a digital accumulator, whose output is then converted to an analog signal, optionally combined with a loop feed-forward signal, and then conveyed as a control voltage to the voltage-controlled oscillator. The equivalent “size” of the integrating capacitor function provided by the digital integration block may be varied by increasing or decreasing the bit resolution of circuits within the digital block. Consequently, an increasingly larger equivalent capacitor may be implemented by adding additional digital stages, each of which requires a small incremental integrated circuit area. The power dissipation of the digital integration block is reduced by incorporating a decimation stage to reduce the required operating frequency of the remainder of the digital integration block.

108 citations

Patent
12 Jun 1996
TL;DR: In this paper, a receiver (100), transmitter (200) and transceiver (400) in accordance with the present invention overcome the disadvantages of applying adaptive antenna array technology to multi-channel communication systems.
Abstract: A receiver (100), transmitter (200) and transceiver (400) in accordance with the present invention overcome the disadvantages of applying adaptive antenna array technology to multi-channel communication systems. Multi-channel radio frequency (RF) signals received via an adaptive antenna array (102) are converted from an analog form to a digital form prior to splitting and processing to recover communication channels contained therein. A number of digital communication signals are digitally combined into a multi-channel digital signal and converted from the digital form to an analog radio frequency form prior to transmission from the adaptive antenna array.

108 citations

Patent
10 Jul 1985
TL;DR: In this paper, a pocket-sized self-contained electrocardiogram monitor with a dot-matrix, liquid-crystal display is presented, which uses dry electrodes and is suitable for direct placement against the patient's chest.
Abstract: A pocket-sized, self-contained electrocardiogram monitor with a dot-matrix, liquid-crystal display. The monitor uses dry electrodes and is suitable for direct placement against the patient's chest without the use of paste or gel to insure electrical contact. An A/D converter converts an ECG signal to a digital signal which is then processed by a microprocessor and then displayed on the liquid-crystal display in real time. The microprocessor is programmed to select the maximum and minimum digital values from four consecutive samples from the A/D converter and to supply data representative of the maximum and minimum values to the display at one-fourth the conversion sampling rate.

108 citations

Patent
18 Oct 1996
TL;DR: In this paper, a physiological electrical signal connector system (20) with one connector (20a) connected to an electrode set (24) and another connector connected to a digital signal convertor (14) which leads to a patient monitor (10) is described.
Abstract: Disclosed is a physiological electrical signal connector system (20) with one connector (20a) connected to an electrode set (24) and another connector (20b) connected to a digital signal convertor (14) which leads to a patient monitor (10). Each type of electrode set has a specific code identified with it and when connected to the digital signal convertor (14), the connector code is recognized by the digital signal convertor. The connector code is then relayed to the monitor (10) which will self-configure based on the identified code.

107 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20239
202225
2021190
2020755
2019942
2018915