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Digital signal

About: Digital signal is a research topic. Over the lifetime, 44213 publications have been published within this topic receiving 345279 citations.


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Journal ArticleDOI
TL;DR: A generic framework for the enhanced statistical process control technique of cycle-based signals is presented, accomplished by monitoring the wavelet transformation of the signal, instead of monitoring the raw observations themselves.
Abstract: Due to the rapid development of computer and sensing technology, many measurements of process variables are readily available in manufacturing processes. These measurements carry a large amount of information about process conditions. It is highly desirable to develop a process monitoring and diagnosis methodology that can utilize this information. In this paper, a statistical process control monitoring system is developed for a class of commonly available process measurements-cycle-based waveform signals. This system integrates the statistical process control technology and the Haar wavelet transform. With it, one can not only detect a process change, but also identify the location and estimate the magnitude of the process mean shift within the signal. A case study involving a stamping process demonstrates the effectiveness of the proposed methodology on the monitoring of the profile-type data. Note to Practitioners-Cycle-based signal refers to an analog or digital signal that is obtained through automatic sensing during each operation cycle of a manufacturing process. The cycle-based signal is very common in various manufacturing processes (e.g., forming force in stamping processes, the holding force, and the current signals in spot welding processes, the insertion force in the engine assembly process). In general, cycle-based signals contain rich process information. In this paper, cycle-based signal monitoring will be accomplished by monitoring the wavelet transformation of the signal, instead of monitoring the raw observations themselves. Further, a decision-making technique is developed using the SPC monitoring system to locate where the mean shift occurred and to estimate magnitudes of mean shifts. Thus, this paper presents a generic framework for the enhanced statistical process control technique of cycle-based signals.

86 citations

Patent
16 Nov 2001
TL;DR: In this paper, the authors propose an apparatus for processing packets in a multimedia terminal, which has a media access controller to send and receive packets from a network, and a digital signal processor converts a series of incoming real-time transfer protocol packets into an incoming digital signal and converts an outgoing digital signal into a sequence of outgoing real time transmission control protocol packets.
Abstract: An apparatus for processing packets in a multimedia terminal has a media access controller to send and receive packets from a network. A digital signal processor converts a series of incoming real-time transfer protocol packets into an incoming digital signal and converts an outgoing digital signal into a series of outgoing real-time transfer protocol packets. A compression-decompression unit decompresses the incoming digital signal and generates an output signal to an output device and compresses an input signal from an input device and generates an outgoing digital signal. A central processing unit sends and receives transmission control protocol packets. The apparatus can store a packet in one of a plurality of queues in a buffer and assign a priority to the packet based on whether the packet is a real-time transfer protocol packet or a transfer control protocol packet.

86 citations

Journal ArticleDOI
TL;DR: A 7 bit two-step parallel A/D converter has been designed using a new quantizer-subtractor circuit which results in a fully integrable A/ D function.
Abstract: A 7 bit two-step parallel A/D converter has been designed using a new quantizer-subtractor circuit. The small delay in the new circuit allows digital signal sampling by latching comparators. A sample and hold unit is not needed which results in a fully integrable A/D function. Analog input signals up to 5 MHz can be digitally sampled with sampling frequencies up to 50 MHz. A double layer metallization process is used to reduce the die size to 2.4/spl times/2.5 mm.

86 citations

Journal ArticleDOI
TL;DR: Two DASP approaches for spectrum estimation of continuous-time signals are presented, named the weighted sample (WS) and weighted probability (WP) density functions, respectively, which utilize random sampling to suppress aliasing and produce unbiased estimators of the signal spectrum.
Abstract: Nonuniform sampling can facilitate digital alias-free signal processing (DASP), i.e., digital signal processing that is not affected by aliasing. This paper presents two DASP approaches for spectrum estimation of continuous-time signals. The proposed algorithms, named the weighted sample (WS) and weighted probability (WP) density functions, respectively, utilize random sampling to suppress aliasing. Both methods produce unbiased estimators of the signal spectrum. To achieve this effect, the computational procedure for each method has been suitably matched with the probability density function characterising the pseudorandom generators of the sampling instants. Both proposed methods are analyzed, and the qualities of the estimators they produce have been compared with each other. Although none of the proposed spectrum estimators is universally better than the other one, it has been shown that in practical cases, the WP estimator produces generally smaller errors than those obtained from WS estimation. A practical limitation of the approaches caused by the sampling-instant jitter is also studied. It has been proven that in the presence of jitter, the theoretically infinite bandwidths of WS and WP signal analyses are limited. The maximum frequency up to which these analyses can be performed is inversely proportional to the size of the jitter.

86 citations

Patent
31 May 1996
TL;DR: In this paper, the authors adapted conversion circuitry for coupling to a primary process control loop (PPCL) by using digital receiver circuitry (46, 52) in the conversion circuitry (40) for use in a process control system.
Abstract: Conversion circuitry (40) for use in a process control system (10) is adapted for coupling to a primary process control loop (26). Digital receiver circuitry (46, 52) in the conversion circuitry (40) receives a digital signal transmitted over the primary process control loop (26) from a field transmitter (22) and responsively provides a digital output. A microprocessor (50) receives the digital output and responsively provides a secondary loop control output. Secondary loop control circuitry (62) for coupling to a secondary process control loop (58) receives the secondary loop control output from the microprocessor (50) and responsively controls current flowing through the secondary process control loop (58). The current flowing through the secondary process control loop (58) is related to the digital signal transmitted by the field transmitter (22).

86 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20239
202225
2021190
2020755
2019942
2018915