Digital signal

About: Digital signal is a research topic. Over the lifetime, 44213 publications have been published within this topic receiving 345279 citations.

Digital architecture for radio-frequency apparatus and associated methods

Abstract: A radio-frequency (RF) receiver includes a receiver analog circuitry and a receiver digital circuitry. The receiver analog circuitry resides within a first integrated circuit and the receiver digital circuitry resides within a second integrated circuit. The second integrated circuit couples to the first integrated circuit via a one-bit digital interface. The receiver analog circuitry receives an RF signal and processes the received RF signal to generate a digital signal. The receiver analog circuitry provides the digital signal to the receiver digital circuitry. The receiver digital circuitry includes a digital down-converter circuitry that mixes the digital signal with an intermediate frequency (IF) local oscillator (LO) signal to generate a digital down-converted signal. The receiver digital circuitry also includes a digital filter circuitry that filters the digital down-converted signal to generate a filtered digital signal.

Solid-state imaging device and camera system

Abstract: A solid-state imaging device includes a pixel array section including a plurality of pixels, a pixel drive line controlling driving the pixels in each row, a signal line reading an analog signal of the pixels in each column, a pixel drive unit driving the pixels to perform a readout through the pixel drive line, and a readout circuit capable of converting the analog signal into a digital signal. At least the number of pixel drive lines or the number of signal lines is more than one, and the pixels of each pixel group are connected to different lines of either the pixel drive lines or the signal lines. The pixel drive unit sequentially drives the pixels in the pixel group at shifted timings, and the readout circuit includes an analog-to-digital converter sequentially receiving analog signals from the pixel group and sequentially converting the analog signals into digital signals.

Digital signal processing apparatus

Abstract: A specific pattern in an inputted digital signal is detected (13) and the input digital signal is sampled and held (14) in accordance with such a detection output. A clock (15-17) whose phase is synchronized with the input digital signal is generated on the basis of the sampling output. With such a construction as mentioned above, the phase of the clock can be optimally controlled by a simple construction. The clock can be precisely extracted from the input digital signal, so that the operation of a circuit is also stable.

Memory management for an MPEG2 compliant decoder

Abstract: Disclosed is a digital signal decoder system for receiving compressed encoded digitized video signals and transmitting decompressed decoded digital video signals. This is accomplished with a minimum of DRAM demand through the use of a Spill Buffer.