Showing papers on "Digital signal processing published in 1980"

The wigner distribution - a tool for time-frequency signal analysis part ii: discrete-time signals

Abstract: In this second part of the paper the Wigner distribution is adapted to the case of discrete-time signals. It is shown that most of the properties of this time-frequency signal representation carry over directly to the discrete-time case, but some.others cause problems. These problems are associated with the fact that in general the Wigner distribution of a discrete-time signal contains aliasing contributions. It is indicated that these aliasing components will not be present if the signal is either oversampled by a factor of at least two, or is analytic. 1. Introduetion In part I of this paper 1) the Wigner distribution (WD) of continuous-time signals was discussed, and it was shown that this function has some very interesting properties. The determination of this distribution function requires, like the spectrum, an integral of the Fourier type to be evaluated. Ideally this requires the signal to be known for all. time, but in practice windowing techniques can be used to relax this requirement. The effects of windowing on the WD were discussed in part 1. In general two different approaches can be distinguished to compute these Fourier-type integrals. The first is by means of analogue signal processing, and recently optical signal processing methods have been proposed for determining suitable approximations to the WD 2). The second approach is based on digital signal processing. This opens the way to apply computationally efficient methods for evaluating the discrete Fourier transform, but requires the concept of the Wigner distribution to be transferred to the case of discretetime signals. This is the aim of this part of the paper. As can be expected, the WD for discrete-time signals shows much similarity with that for continuous-time signals, but in some respects it has characteristic differences.

Frequency domain data transmission using reduced computational complexity algorithms

Abstract: In this paper we describe a frequency domain data transmission method to be used for digital data transmission over analog telephone lines which exploits recently derived reduced computational complexity algorithms, such as the Winograd Fourier Transform, to achieve a significantly lower computational rate than comparable time domain QAM modems implemented digitally using signal processing techniques. In addition to the lower computational rate, the proposed method also allows for better channel bandwidth utilization by allowing optimal signal power allocation based on the channel's signal to noise versus frequency characteristics. Experimental results on this method are presented, indicating that it may be possible to send over 10,000 BPS over an unconditioned telephone line while maintaining a 10-5BER.

Spread spectrum arrangement for (de)multiplexing speech signals and nonspeech signals

Abstract: It is known to multiplex speech signals and nonspeech signals over a common communication path. One arrangement uses a portion of the frequency spectrum of the path for speech signals with the remainder for nonspeech signals. Another inserts data signals during gaps in the speech signals. Still another treats a speech signal as a carrier signal and modulates the speech signal with data signals. Unfortunately, users of such known arrangements experience excessive distortion or perceive others as encroaching on the path. These and other problems are mitigated by my improved signal processor (100, 200) for the spread spectrum (de)multiplexing of speech signals and nonspeech signals. In an illustrative embodiment, at a transmitter, a block (110) of speech signals may be converted (140) from a time domain to a frequency domain by a Fourier transformation. A Fourier component may be pseudo-randomly selected (130) from a subset of such components. Responsive to the selected component, a prediction (160) of the component may be substituted therefor, the prediction being thereafter modified (170), e.g., by its amplitude being incremented or decremented to reflect the multiplexing of a logic 1 or a logic 0 nonspeech signal. The modified prediction may be converted (150) back to the time domain for transmission to a receiver. At the receiver, a parallel demultiplexing (200) occurs for extracting (270) speech signals and nonspeech signals from the multiplexed signals.

An analysis of multiple correlation cancellation loops with a filter in the auxiliary path

Abstract: A technique known as a "multiple correlation cancellation loop" and also as the "LMS algorithm" is widely used in adaptive arrays for radar, sonar, and communications, as well as in many other signal processing applications. In this paper, an analysis of this technique is extended to the case when a linear filter appears in the auxiliary signal path. A general solution to this problem is obtained and several examples for narrowband and broad-band signals are presented.

Distributed signal processing system

Abstract: A distributed, fault-tolerant, self-repairable, reconfigurable signal processing system with redundant elements comprising signal processors, mass memories and input-output controllers interconnected by redundant busses forming a high reliability system. The input-output controller element has redundant busses for interconnecting multiple fault-tolerant distributed signal processing systems into a network configuration. One signal processor element in a system is initially designated as the executive and assigns processing tasks from a mass memory to the other elements or other systems. When a failure is detected, the executive verifies the failure, isolates the faulty element and reassigns the task to another spare element. If another element is not available, the executive reconfigures the system to permit degraded operation using the available elements. The executive element, itself, is fault monitored by one of the other elements which is capable of assuming the role of executive as required. The fault-tolerant and reconfiguration capabilities of the system result from a virtual addressing technique for each element, a distributed bus arbitration method and a two-level distributed operating system.

Orthogonal cascade realization of real multiport digital filters

Abstract: A generally applicable theory for multiport orthogonal digital filter synthesis is discussed, using a direct algebraic method. Standard (complex) degree 1 and irreducible (real) degree 2 chain scattering matrices are derived and the computability problem which normally occurs in such filters is discussed and solved for the general case. It is shown that any finite causal and lossless real multivariate system can be realized as a computationally compatible cascade of real degree 1 and degree 2 factors consisting of an orthogonal constant interconnecting part and a lossless dynamic portion. In order to increase the practical interest of the paper, realizations of these sections are explicitly given. The known scalar wave digital filter ‘adaptors’ emerge as a special case of the theory presented in this paper. The general results are of interest in multiport digital signal processing, in multivariate interpolation theory and in multichannel prediction and modelling theory and techniques.

Analog memory for storing digital information

Abstract: The present invention is directed to an analog memory for storing digital information in analog signal form. Typically, digital information is stored in digital signal form, where each digital bit is stored in a separate digital memory cell. In accordance with the present invention, an analog memory such as a charge transfer device (CTD), bubble memory, or magnetostrictive memory is used to store analog signals. Each analog signal is representative of a plurality of digital bits, thereby providing storage for a plurality of digital bits in each analog memory cell. Use of such an analog memory in combination with a digital system facilitates a hybrid memory, where digital information is stored in analog signal form. In one embodiment, a digital to analog converter is used to convert digital information from a digital processor to analog signal form for storage in an analog memory and an analog to digital converter is used to convert analog signals stored in the analog memory to digital signal form for processing with the digital processor. In another embodiment, an analog read only memory is used to store a program for a stored program digital computer in analog signal form. Storage of digital information in analog signal form increases the efficiency of storage because a plurality of digital bits can be stored in each memory cell. An embodiment having analog error compensation utilizes a reference signal for adaptive compensation of errors. Various systems using such memories are disclosed including signal processors, stored program computers, reverbation systems, and others.

Introduction to digital filters

Abstract: In this chapter, digital filter are discussed. Digital signal processing (DSP) is an established method of filtering electrical waveforms and digital images, and it is an important topic in a number of diverse fields of science and technology. The realisation of the many practical applications has been made possible by the increased availability and falling costs of sophisticated very-large-scale integrated (VLSI) circuits. In particular, the ubiquitous microprocessor and associated peripheral chips provide the means of implementing relatively simple and cost-effective digital filters.

Electronic speckle pattern interferometry using digital image processing techniques.

Abstract: The use of digital image processing techniques for electronic speckle pattern interferometry is discussed. A digital TV-image processing system with a large frame memory allows us to perform precise and flexible operations such as subtraction, summation, and level slicing. Digital image processing techniques make it easy compared with analog techniques to generate high contrast fringes. Some experimental verifications are presented in the cases of surface displacement and vibration amplitude measurements.

Passive cascaded lattice digital filters

Abstract: Energy and power analogies are used for the analysis of cascaded (possibly time-varying) lattice digital filters. This approach leads to the requirements for passivity of the sections, and a procedure for the removal of zero-input parasitic oscillations, along with several other results.

A single-chip digital signal processor for voiceband applications

Abstract: A single-chip digital signal processor utilizing parallel multiplier and 3μ NMOS technology will be presented. Development can implement 41 second-order digital filter sections for 8kHz sampling of voiceband signals.

Earth probing radar system

Abstract: A ground probing radar method and apparatus which is effective to view the earth in advance of coal mining activity provides visual display of a coal seam and particular discontinuities that may lie therein. The system operates in the frequency range of 10 Megahertz to 5 Gigahertz. The received electromagnetic energy is amplified, sampled and band pass filtered with subsequent time gain amplification. A time analog return signal may be viewed directly and/or the return signal may be digitally processed to enable further signal refinement. A control microprocessor is utilized for both tape record control and digital signal processing, and the processor includes the capability for compositing and/or stacking of common source point data for output record and display.

Special-purpose devices for signal and image processing : an opportunity in VLSI

Abstract: : Based on the systolic array approach, new designs of special-purpose devices for filtering, correlation, convolution, and discrete Fourier transform are proposed and discussed. It is argued that because of high degrees of simplicity, regularity and concurrency inherent to these designs, their VLSI implementation will be cost effective. (Author)

Spatial-domain design of two-dimensional recursive digital filters

Abstract: A technique using linear algebraic projection is proposed to design two-dimensional (2-D) recursive digital filters that best approximate a desired input/output relationship in terms of total weighted squared error. A 2-D difference equation representation is used. Examples of first-quadrant and asymmetric half-plane filters are presented and compared with other spatial-domain designs. One of the main advantages of the proposed method is that the solution is obtained directly with no need for iterations. >

Decision methods and realization of 2-D digital filters using minimum number of delay elements

Abstract: A combination of techniques taken from graph theory and decision theory is used to solve the problem of realization of 2-D digital filters using minimum number of delay elements called minimal realization. The solution is presented in the form of an algorithm which, when executed, yields one (and hence, infinitely many) minimal realization.

Digital signal processing apparatus

Abstract: In a digital video signal processing apparatus having error correcting and concealing capabilities, a video signal is converted to a digital signal and transmitted or recorded with error detecting and error correcting signals. Upon receiving or reproducing the transmitted signal, an error in th digitized video signal is detected by means of the error detecting signal, and corrected, if possible, by means of the error correcting signal. If the error is so extensive that its correction by the error correction signal is not possible, the erroneous signal is concealed by its replacement with a substantially corresponding signal of the previous field which has been stored in a suitable memory.

Signal processing method for improving the dynamic range of A/D and D/A converters

Abstract: A method is described for improving the dynamic range of A/D and D/A converters. In the case of A/D conversion it consists of an analog preprocessing, an A/D converter of B' bits operating at a high sampling rate f' s , followed by a digital postprocessing. This system effectively operates as an A/D converter with B > B' bits with low sampling rate f s . A relation between the required oversampling factor N = f' s /f s and the improvement in dynamic range (R = B- B') is derived which indicates that for moderate values of R (3 to 5 bits) the oversampling factor must range from 6-15, which is quite acceptable. The method is also applicable to D/A conversion, but then the pre-processing has to be digital and file postprocessing analog.

Method and apparatus for suppressing digital error noise in digital communication

Abstract: In digital telecommunication, the suppression of digital error noise contained in the signals received by the receiver is accomplished by subjecting the received signals to Fourier transform thereby to obtain a frequency spectrum, subtracting a predetermined flat spectrum from the amplitude spectrum of the frequency spectrum, subjecting the resulting difference to invert Fourier transform thereby to extract any digital error noise component and correcting the particular sampled signal containing the noise component by use of interpolation with respect to the preceding and following sets each of several sampled signals between which the particular sampled signal is interposed, whereby sampled signals free from the digital error noise are delivered as output signals.

Input-output buffers for a digital signal processing system

Abstract: Input-output buffers interface a data terminal, such as a digital signal processor adapted to perform complex arithmetic functions on vectors of data words, with a storage controller. The input buffer interfaces the storage controller with the data terminal and generates control signals indicating when it is in condition to receive a vector of data words from the storage controller, whereon the storage controller transfers a vector of data to the input buffer; and, further, generates signals indicating when it contains a complete vector of data at which time the input buffer will transfer the vector of data contained therein to the data terminal. Each output buffer interfaces the data terminal with the storage controller and generates control signals indicating when it is in condition to receive a vector of data whereon a vector of data will be transferred from the data terminal to the output buffer; and, further, generates signals indicating when it contains a complete vector of data at which time the output buffer will transfer the vector contained therein to the storage controller.

Arithmetic for Ultra-High-Speed Tomography

Abstract: The first of a new generation of high performance X-ray computed tomographic (CT) machines, the Dynamic Spatial Reconstructor, imposes a requirement for digital signal processing rates which are 3–4 orders of magnitude greater than the capability of current X-ray computed tomography processors. To solve the large-scale computational problems for this and similar CT units which are currently under development, three candidate arithmetic implementations of ultra-high-speed convolutional filtering and weighted linear summation algorithms have been developed and compared. Since both convolution and weighted summation are performed via the inner product operation, which is the basis for most digital signal processing algorithms, the results are widely applicable. The three arithmetic approaches are a two's complement modular array, a merged arithmetic module, and a sign/logarithm convolver. A figure of merit, which relates processing speed to complexity, is used to compare the three arithmetic approaches. It is demonstrated that processing rates in the billions of multiply-add operations per second may be realized with special-purpose processors of moderate complexity.

A digital signal processor for telecommunications applications

Abstract: This paper will report on a programmable digital signal processor chip which can decode on instruction, fetch data, perform a 16 × 20b multiply, and add the resultant to a 40b accumulator in 80ns. Circuit permits all signal processing functions of a dual-tone multifrequency receiver or a low-speed modem to be realized on one chip.

Some new signal processors for arrays of sensors

Abstract: The problem of estimating the strengths of signals arriving at an array of receivers when the arrival directions are known, is addressed. Several new estimators are derived and relationships between them and the conventional and adaptive beamformers are given. Algorithms are provided for numerical solutions for these estimators, with examples using experimental data. The techniques are not confined to sensor-array processing but can be applied to a wide range of other estimation problems.

120-Channel Transmultiplexer Design and Performance

Abstract: A 120-channel transmultiplexer has been developed which interfaces two FDM basic supergroup signals (2 x 60 channels) directly to the digital time division switch or digital transmission systems. The equiplnent exploits a block processing digital SSB-FDM multiplex/demultiplex scheme, and has been built using newly developed high-speed CMOS pipeline multipliers and variable length shift registers. System design considerations and hardware implementation techniques are described in detail as well as the measured performance.

Digital television transmission using bandwidth compression techniques

Abstract: It has been shown that interframe coding techniques provide an effective means to reduce the transmission bit rate of video signals without sacrificing picture quality The channel capacity of various coding schemes over existing digital transmission links is listed For digital satellite, for example, even a single television (TV) channel cannot be transmitted by conventional PCM, whereas one or two channels of TV can be transmitted by employing efficient coding techniques However, much greater advantage is obtained by use of interframe coding Three network quality TV signals can becarried through a transponder For teleconferencing applications, a single satellite transponder can managuep to 20 simultaneous conference signals on a TDMA basis, if one uses a 3M bit/s interframe coder Our satellite experiment has demonstrated excellent performance for network digital TV application The TRIDEC teleconferencing system has been commercially used by NTT in Japan since 1979 and the NETEC-6/3 interframe encoder is being seriously considered for application in North American teleconferencing applications

An NMOS Microprocessor for Analog Signal Processing

Abstract: A special purpose microprocessor for real time processing of analog signals is described. Design and implementation of architecture allowing a user programmable and erasable read only memory (EPROM), a 25 bit digital processor and a 9 bit analog acquisition system on the same substrate is discussed. The relationship between the device's resources and specific signal processing building blocks is discussed.

System for processing audio PCM digital signals

Abstract: A processing system for reproduced audio digital signals used in an audio PCM (pulse code modulation) recording/reproducing system using a recording/reproducing apparatus such as a video tape recorder having a dropout-compensation circuit is disclosed. The reproduced signal processing system is connected to receive digital information signals reproduced through the dropout compensation circuit from a recording medium on which audio information signals are recorded in the form of digital data words and includes circuit means (18, 19, 20, 21; 57, 60, 63, 64) for detecting whether a reproduced digital signal has been dropout-compensated or not and circuit means (17; 58, 59) for adding an error pointer to a reproduced digital signal which is detected as being dropout-compensated.