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Showing papers on "Digital signal processing published in 1981"


Journal ArticleDOI
TL;DR: Digital Control Of Dynamic Systems This well-respected, market-leading text discusses the use of digital computers in the real-time control of dynamic systems with an emphasis on the design of digital controls that achieve good dynamic response and small errors while using signals that are sampled in time and quantized in amplitude.
Abstract: Digital Control Of Dynamic Systems This well-respected, market-leading text discusses the use of digital computers in the real-time control of dynamic systems. The emphasis is on the design of digital controls that achieve good dynamic response and small errors while using signals that are sampled in time and quantized in amplitude. Digital Control of Dynamic Systems (3rd Edition): Franklin ... This well-respected, market-leading text discusses the use of digital computers in the real-time control of dynamic systems. The emphasis is on the design of digital controls that achieve good dynamic response and small errors while using signals that are sampled in time and quantized in amplitude. Digital Control of Dynamic Systems: Gene F. Franklin ... Digital Control of Dynamic Systems, 2nd Edition. Gene F. Franklin, Stanford University. J. David Powell, Stanford University Digital Control of Dynamic Systems, 2nd Edition Pearson This well-respected work discusses the use of digital computers in the real-time control of dynamic systems. The emphasis is on the design of digital controls that achieve good dynamic response and small errors while using signals that are sampled in time and quantized in amplitude. MATLAB statements and problems are thoroughly and carefully integrated throughout the book to offer readers a complete design picture. Digital Control of Dynamic Systems, 3rd Edition ... Digital control of dynamic systems | Gene F. Franklin, J. David Powell, Michael L. Workman | download | B–OK. Download books for free. Find books Digital control of dynamic systems | Gene F. Franklin, J ... Abstract This well-respected work discusses the use of digital computers in the real-time control of dynamic systems. The emphasis is on the design of digital controls that achieve good dynamic... (PDF) Digital Control of Dynamic Systems Digital Control of Dynamic Systems, Addison.pdf There is document Digital Control of Dynamic Systems, Addison.pdfavailable here for reading and downloading. Use the download button below or simple online reader. The file extension PDFand ranks to the Documentscategory. Digital Control of Dynamic Systems, Addison.pdf Download ... Automatic control is the science that develops techniques to steer, guide, control dynamic systems. These systems are built by humans and must perform a specific task. Examples of such dynamic systems are found in biology, physics, robotics, finance, etc. Digital Control means that the control laws are implemented in a digital device, such as a microcontroller or a microprocessor. Introduction to Digital Control of Dynamic Systems And ... The discussions are clear, nomenclature is not hard to follow and there are plenty of worked examples. The book covers discretization effects and design by emulation (i.e. design of continuous-time control system followed by discretization before implementation) which are not to be found on every book on digital control. Amazon.com: Customer reviews: Digital Control of Dynamic ... Find helpful customer reviews and review ratings for Digital Control of Dynamic Systems (3rd Edition) at Amazon.com. Read honest and unbiased product reviews from our users. Amazon.com: Customer reviews: Digital Control of Dynamic ... 1.1.2 Digital control Digital control systems employ a computer as a fundamental component in the controller. The computer typically receives a measurement of the controlled variable, also often receives the reference input, and produces its output using an algorithm. Introduction to Applied Digital Control From the Back Cover This well-respected, marketleading text discusses the use of digital computers in the real-time control of dynamic systems. The emphasis is on the design of digital controls that achieve good dynamic response and small errors while using signals that are sampled in time and quantized in amplitude. Digital Control of Dynamic Systems (3rd Edition) Test Bank `Among the advantages of digital logic for control are the increased flexibility `of the control programs and the decision-making or logic capability of digital `systems, which can be combined with the dynamic control function to meet `other system requirements. `The digital controls studied in this book are for closed-loop (feedback) Every day, eBookDaily adds three new free Kindle books to several different genres, such as Nonfiction, Business & Investing, Mystery & Thriller, Romance, Teens & Young Adult, Children's Books, and others.

902 citations


Journal ArticleDOI
01 Mar 1981
TL;DR: This paper presents a tutorial overview of multirate digital signal processing as applied to systems for decimation and interpolation and discusses a theoretical model for such systems (based on the sampling theorem), and shows how various structures can be derived to provide efficient implementations of these systems.
Abstract: The concepts of digital signal processing are playing an increasingly important role in the area of multirate signal processing, i.e. signal processing algorithms that involve more than one sampling rate. In this paper we present a tutorial overview of multirate digital signal processing as applied to systems for decimation and interpolation. We first discuss a theoretical model for such systems (based on the sampling theorem) and then show how various structures can be derived to provide efficient implementations of these systems. Design techniques for the linear-time-invariant components of these systems (the digital filter) are discussed, and finally the ideas behind multistage implementations for increased efficiency are presented.

584 citations


Journal ArticleDOI
01 Apr 1981
TL;DR: A systematic survey of the theoretical/experimental work accomplished in the area of digital phase-locked loops (DPLL's) during the period of 1960 to 1980, thereby offering speedy access to the techniques and hardware developments which have been presented in a scattered literature.
Abstract: The purpose of this paper is to present a systematic survey of the theoretical/experimental work accomplished in the area of digital phase-locked loops (DPLL's) during the period of 1960 to 1980. The DPLL represents the heart of the Building blocks required in the implementation of coherent (all digital) communications and tracking receivers. This survey is particularly motivated by the fact that microprocessor technology is advancing rapidly to the extent that sophisticated and flexible signal processing algorithms for communications and control can be realized in the digital domain. In fact, it is anticipated that the use of this signal processing technology will continue to expand rapidly in the development of advanced communications and tracking receivers, e.g., all digital modems. Consequently, one major purpose of this paper is to provide the reader with a survey and an overview of the theoretical and experimental work accomplished to date, thereby offering speedy access to the techniques and hardware developments which have been presented in a scattered literature. In addition, the authors feel that a tutorial article revealing the various theories, their relationships to one another, their shortcomings, their advantages and the assumptions on which each is based, would be of tremendous value to the engineer trying to decide what particular analysis procedure is applicable to his peculiar problem. Consequently, a byproduct of this presentation will be to point out unsolved problems of practical interest. A broad class of digital modulation techniques, viz. I-Q modulations and demodulation, are studied in a rather general way.

568 citations


Journal ArticleDOI
B. Hirosaki1
TL;DR: This paper provides a novel digital signal processing method based on an N /2-point DFT processing in the O-QAM system that is more economical than the digitally implemented conventional single-channel data transmission system.
Abstract: An orthogonally multiplexed QAM (O-QAM) system is a multichannel system with a baud rate spacing between adjacent carrier frequencies; this property is desirable to digitally implement the system using the discrete Fourier transformation (DFT). This paper provides a novel digital signal processing method based on an N /2-point DFT processing in the O-QAM system. A complexity comparison between a digital O-QAM system and a digital singlechannel QAM system shows that the digital O-QAM system using the new method is more economical than the digitally implemented conventional single-channel data transmission system.

544 citations


Journal ArticleDOI
01 Nov 1981
TL;DR: This paper is a tutorial which describes "main stream" sonar digital signal processing functions along with the associated implementation considerations to promote further cross-fertilization of ideas amongdigital signal processing applications in sonar, radar, speech, communications, seismology, and other related fields.
Abstract: This paper is a tutorial which describes "main stream" sonar digital signal processing functions along with the associated implementation considerations. The attempt is to promote further cross-fertilization of ideas among digital signal processing applications in sonar, radar, speech, communications, seismology, and other related fields.

431 citations


Journal ArticleDOI
TL;DR: In this paper, the authors present a framework for computing the minimal sampling period of a given digital filter structure when the speed of arithmetic operations is given but the number of processing units is unlimited.
Abstract: This paper presents a framework for Fiding efficient multiprocessor realizations of digital filters. Based on simple graph-theoretic concepts, a method is derived for determining the minimal sampling period of a given digital filter structure when the speed of arithmetic operations is given but the number of processing units Is unlimited. It Is shown how realistic hardware implementations can be found and evaluated by using the timing diagram of this maximal rate realization as a starting point. The minimal sampling periods of several common digital filter structures are given in terms of addition and multiplication times.

305 citations


Journal ArticleDOI
01 Jul 1981

201 citations


BookDOI
01 Jan 1981

160 citations


Journal ArticleDOI
TL;DR: It is shown that bandlimiting the new codes prior to pulse compression acts as a waveform amplitude weighting which has the effect of increasing the mainlobe to sidelobe ratios.
Abstract: A new class of symmetric radar pulse compression polyphase codes is introduced which is compatible with digital signal processing. These codes share many of the useful properties of the Frank polyphase code. In contrast with the Frank code, the new codes are not subject to mainlobe to sidelobe ratio degradation caused by bandlimiting prior to sampling and digital pulse compression. It is shown that bandlimiting the new codes prior to pulse compression acts as a waveform amplitude weighting which has the effect of increasing the mainlobe to sidelobe ratios.

126 citations


Journal ArticleDOI
TL;DR: Algorithms based on interpolating techniques introduced the least amount of error when 16 bit data were used while algorithms based on least-squares data fit methods performed best on the less accurate 8 bit data.
Abstract: Five commonly used algorithms for digital differentiation are evaluated to determine how they perform in the presence of 8, 12, and 16 bit quantization noise. The algorithms are compared on the basis of rms error between a model derivative of the left ventricular pressure waveform and the approximate results of each algorithm. Algorithms based on interpolating techniques introduced the least amount of error when 16 bit data were used while algorithms based on least-squares data fit methods performed best on the less accurate 8 bit data. Some of the band-limiting characteristics of the algorithms are also discussed.

102 citations


Journal ArticleDOI
01 Nov 1981
TL;DR: The overall performance of the various transmultiplexer approaches are compared with each other by means of different criteria, such as stability under looped conditions, absolute value of the group delay, computational and control complexity, modularity, potential of intelligible crosstalk, and the impact of out-of-band signaling.
Abstract: With this survey, an attempt is made to describe the great majority of all known methods of digital transmultiplexing (i.e., conversion) of time-division-multiplex (TDM) to frequency-division-multiplex (FDM) signals, and vice versa. To this end, the individual transmultiplexer approaches are classified into four categories according to the underlying algorithm: Bandpass filter bank, low-pass filter bank, Weaver structure method, and multistage modulation method. Finally, the overall performance of the various transmultiplexer approaches are compared with each other by means of different criteria [1], such as stability under looped conditions, absolute value of the group delay, computational and control complexity, modularity, potential of intelligible crosstalk, absence of an additional analog frequency conversion, and the impact of out-of-band signaling For a more profound understanding of the individual digital trsnsmultiplexer approaches, the main chapter is preceded by an introductory discussion on analog and digital generation of single-sideband signals. In this context, the associated problems of sample rate alteration and multi-rate filtering arising from digital signal processing are dealt with.


Patent
15 Oct 1981
TL;DR: In this paper, a signal processor having a wide dynamic range and which can process both data in the fixed point representation and data in a floating point representation by the use of a single floating-point arithmetic circuit is presented.
Abstract: A signal processor having a wide dynamic range and which can process both data in the fixed point representation and data in the floating point representation by the use of a single floating-point arithmetic circuit is capable of processing digital signals, such as voice signals, at high speed and in real time. In addition, this signal processor is capable of executing data input/output operations with an external circuit in the data format of the fixed point representation and of performing internal operations in the floating point representation format. Further, conversion of an operational result from fixed point representation to floating point representation, and vice versa, can be performed internally in accordance with program instruction.

Journal ArticleDOI
TL;DR: This paper explores the use of the Bell Laboratories digital signal processing integrated circuit for digitally encoding speech or audio signals based on the sub-band coding technique, and considers some general issues involved in implementing multirate signal processing algorithms of this type on the digital signal processor.
Abstract: This paper explores the use of the Bell Laboratories digital signal processing integrated circuit for digitally encoding speech or audio signals based on the sub-band coding technique. Sub-band coding represents a next level in algorithmic complexity over that of adaptive differential pulse-code modulation, discussed in a companion paper, and it has a corresponding advantage in performance. We discuss the details of a real-time, two-band sub-band coding implementation on the digital signal processor. We then comment on how this approach can be extended to more than two band designs for greater bit rate compression capability. In connection with this, we also consider some general issues involved in implementing multirate signal processing algorithms of this type on the digital signal processor.

Book ChapterDOI
01 Jul 1981
TL;DR: The running order statistics (ROS) problem is defined, a generalization of median smoothing, and algorithms designed for VLSI implementation are presented which solve the ROS problem and are efficient with respect to hardware resources, computation time, and communication bandwidth.
Abstract: Median smoothing, a filtering technique with wide application in digital signal and image processing, involves replacing each sample in a grid with the median of the samples within some local neighborhood. As implemented on conventional computers, this operation is extremely expensive in both computation and communication resources. This paper defines the running order statistics (ROS) problem, a generalization of median smoothing. It then summarizes some of the issues involved in the design of special purpose devices implemented with very large scale integration (VLSI) technology. Finally, it presents algorithms designed for VLSI implementation which solve the ROS problem and are efficient with respect to hardware resources, computation time, and communication bandwidth.

Journal ArticleDOI
TL;DR: A special purpose digital processor which has been implemented using residue arithmetic does two-dimensional pulse matching by convolving a twodimensional five-by-five filter with the Incoming data stream.
Abstract: This paper contains a description of a special purpose digital processor which has been implemented using residue arithmetic. The processor does two-dimensional pulse matching by convolving a twodimensional five-by-five filter with the Incoming data stream. The digital processor is controlled by an Intel 8066 16-bit microprocessor and can store up to 16 distinct pulse patterns with the option of elementary error detection. The design employs modular architecture and a pipeline approach with emitter coupled logic (ECL) Integrated circuits and uses table look-up for calculations in the residue number system. Components have been chosen so that the filter is capable of making thirty million five-by-five filter convolutions per second for two-dimensional pulse matching and signal detection. In actual operation the hardware runs error free at the rate of twenty million operations per second. The circulating input buffer is the limiting factor for higher operation rates.

Journal ArticleDOI
TL;DR: A novel approach to the realization of fast and efficient IIR digital filters is presented, based on recently introduced state-space structures and retains and enhances their low noise and sensitivity properties while reducing the number-of-required multiplications.
Abstract: A novel approach to the realization of fast and efficient IIR digital filters is presented. The realization is based on recently introduced state-space structures and retains and enhances their low noise and sensitivity properties while reducing the number-of-required multiplications. This permits the implementation of higher order optimal forms requiring only 1.34 to 1.65 times the number of multiplications used in the direct form (well known for 'its poor coefficient sensitivity and high output noise levels). The high inherent parallelism of the state-space structure is also further enhanced by the proposed fast digital filter (FDF). The resulting block-processing algorithm is suitable for high speed implementation of digital filters on parallel processing systems. These systems employ fast and efficient techniques, such as distributed arithmetic or multimicroprocessor techniques, to perform the required computation of the long-independent inner products. In addition to low quantization noise, the FDF structure has other desirable properties including low sensitivity and improved limit cycle behavior. For output decimating IIR filters additional savings in the number of multiplications is achieved with the proposed structure.

Journal ArticleDOI
TL;DR: The DSP is a recently developed integrated circuit implementing a programmable digital signal processor that permits the realization of signal processing functions of such applications as dual-tone multifrequency receivers or low-speed data modems with a single device.
Abstract: This paper describes the DSP, a recently developed integrated circuit implementing a programmable digital signal processor. The single-chip device is fabricated in depletion-load NMOS and is packaged in a 40-pin DIP. It has the speed, precision, and flexibility for a variety of telecommunication applications. The processor can decode an instruction, fetch data, perform a 16- by 20-bit multiplication and a full 36-bit product accumulation in one machine cycle of 800 ns. This permits the realization of signal processing functions of such applications as dual-tone multifrequency receivers or low-speed data modems with a single device. The arithmetic precision of the processor is also sufficient for many voice signal applications.

Journal ArticleDOI
TL;DR: The processor incorporates a 16/spl times/16-bit full hardware multiplier and a sophisticated bus structure to minimize bus conflicts, thus attaining the capability to implement 55 second-order filters at a sampling rate of 8 kHz with sufficient dynamic range to process PCM encoded signals.
Abstract: A single-chip, software-programmable digital signal processor, intended for telecommunication applications, has been developed. The processor, fabricated with the most advanced 3 /spl mu/m n-channel E/D MOS technology, incorporates a 16/spl times/16-bit full hardware multiplier and a sophisticated bus structure to minimize bus conflicts, thus attaining the capability to implement 55 second-order filters at a sampling rate of 8 kHz with sufficient dynamic range to process PCM encoded signals. The authors describe the design concept, architecture, instructions, device design, and application techniques.

Journal ArticleDOI
TL;DR: Using this approach, an imaging instrument design is presented that has the capability of reconstructing images in real time in TV format without conventional scan conversion and Freeze frame is also possible although no image memory is required.

Patent
26 Oct 1981
TL;DR: In this paper, an amplifier for amplifying an amplitude and frequency varying input signal is described, which includes a circuit (24, 100) responsive to the input signal to provide a digital representation thereof, and a plurality of signal sources (30-36) providing an associated signal.
Abstract: An amplifier (FIGS. 1-3) is disclosed for amplifying an amplitude and frequency varying input signal. The amplifier includes a circuit (24, 100) responsive to the input signal to provide a digital representation thereof. In addition, a plurality of signal sources (30-36) are provided which each provide an associated signal. Another circuit (38-52) combines selected ones of the associated signals in accordance with the digital representation to provide a first combined signal having substantially the same waveform as, but of greater amplitude than the input signal. In several embodiments, a circuit (74, 76-78) provides an error signal in accordance with the difference between the desired and actual forms of the first signal. This error signal is combined with the first combined signal to derive an error corrected signal.

Book ChapterDOI
01 Jan 1981
TL;DR: VLSI structures and algorithms are given for bit-serial FIR filtering, IIR filtering, and convolution, and a bit-parallel FIR filter design that is completely pipelined and independent of both word size and filter length.
Abstract: VLSI structures and algorithms are given for bit-serial FIR filtering, IIR filtering, and convolution. We also present a bit-parallel FIR filter design. The structures are highly regular, programmable, and area-efficient. In fact, we will show that most are within log factors of asymptotic optimality. These structures are completely pipelined; that is, the throughput rate (bits/second) is independent of both word size and filter length. This is to be contrasted with algorithms designed and implemented in terms of, say, multipliers and adders whose throughput rates may depend on word length.

PatentDOI
Jonathan Allen1
TL;DR: A system for interpolating digital data signals to a frequency band above analog speech signals in a common transmission channel is disclosed and is compatible with digital signal processing techniques using Fast Fourier Transform Technology in conjunction with solid state logic elements.
Abstract: A system for interpolating digital data signals to a frequency band above analog speech signals in a common transmission channel is disclosed. The system utilizes short time frequency analysis techniques to determine the cutoff frequency of the speech signal. Data signals temporarily held in storage within the system are thereafter modulated into an unused frequency band of the transmission channel above that needed for speech signals. The combined speech and data signals in the system are sent to a receiver which relays the respective speech and data signals to their appropriate locations. This system is compatible with digital signal processing techniques using Fast Fourier Transform Technology in conjunction with solid state logic elements.

Journal ArticleDOI
TL;DR: A sufficient condition for the absence of zero-input granularity limit cycles in error feedback digital filters designed with one magnitude-truncation quntizer is presented and the roundoff noise in these digital filters is discussed.
Abstract: A sufficient condition for the absence of zero-input granularity limit cycles in error feedback digital filters designed with one magnitude-truncation quntizer is presented. This sufficient condition Is satisfied, i.e., no limit cycles can exist, in first- and second-order digital filters, if the parameters in the error feedback loop are properly chosen. The roundoff noise in these digital filters is also discussed.

DOI
01 Oct 1981
TL;DR: The paper describes a method of digital signal processing for extracting and isolating targets in the return signal of an FMCW radar that gives enhanced detection of weak return signals.
Abstract: The paper describes a method of digital signal processing for extracting and isolating targets in the return signal of an FMCW radar. Digital filtering of the frequency spectrum of the return signal is followed by nonlinear optimisation to detect the presence of multiple targets amid clutter. Results using a practical radar show that the method gives enhanced detection of weak return signals.

Patent
02 Jul 1981
TL;DR: In this article, an analog servo-positioning signal is transduced from a recorded member, such as embedded servo signals recorded on a disc memory or the like, which are to be compared to one another in order to derive an error signal indicative of off-track position deviations, are normalized for accurate responsive positioning changes by use of an analog-to-digital converter referenced by both a positive and a negative summation of the two analog signals and supplied with the individual analog signals as inputs, such that the digitalized output comprises a pair of digital signals, the first representative
Abstract: Analog servo-positioning signals transduced from a recorded member, such as embedded servo signals recorded on a disc memory or the like, which are to be compared to one another in order to derive an error signal indicative of off-track position deviations, are normalized for accurate responsive positioning changes by use of an analog-to-digital converter referenced by both a positive and a negative summation of the two analog signals and supplied with the individual analog signals as inputs, such that the digitalized output comprises a pair of digital signals, the first representative of the quotient of the first analog signal divided by the summation of the two analog signals, and the second representative of the second analog signal divided by the same summation of analog signals. The two resulting digital signals are then processed in a microprocessor by subtracting the second such quotient-representative signal from the first, thereby providing a fully-normalized digital signal representative of the deviation from true position. An analog multiplexer is preferably used as a switching input to the A/D converter, and the latter comprises a multiplying-type A/D converter.

Proceedings ArticleDOI
01 Apr 1981
TL;DR: A novel approach to digital sampling frequency conversion based on a single, multistage filter and adapted to conversion between arbitrary, a priori unknown sampling frequency ratios is presented.
Abstract: Digital Audio requires high-quality signal conversion between a variety of sampling frequencies, often in non-trivial integer ratios. In such applications, conventional methods based on analog processing or classical FIR filter rate-changing are not adequate. A novel approach to digital sampling frequency conversion based on a single, multistage filter and adapted to conversion between arbitrary, a priori unknown sampling frequency ratios is presented. Its design, implementation and control are discussed in some detail.


Patent
Toshiro Watanabe1
31 Mar 1981
TL;DR: In this article, the authors proposed a color television signal processing apparatus which is capable of producing a keying signal (soft key signal) with gradation usable for such signal processing as detecting portions with a specified color in a first composite colour television signal and inserting a second color TV signal in the detected portions, and further enabling efficient image mixing operations by sampling color television signals or using stored data of three color signal components.
Abstract: A novel color television signal processing apparatus which is capable of producing a keying signal (soft key signal) with gradation usable for such signal processing as detecting portions with a specified color in a first composite color television signal and inserting a second color television signal in the detected portions, and is capable of processing line (encoded) and soft chromakey operations by producing a soft chromakey signal from a composite color image signal made by, e.g. NTSC system, and further enables efficient image mixing operations by sampling color television signals or using stored data of three color signal components and obtaining a keying signal with high precision in digital signal processing.

Journal ArticleDOI
TL;DR: A framework for the analysis and synthesis of linear shift-variant (LSV) digital filters in the frequency domain is developed and an efficient implementation procedure which reduces the number of filter coefficients and the amount of computation is proposed.
Abstract: The present paper develops a framework for the analysis and synthesis of linear shift-variant (LSV) digital filters in the frequency domain. First, LSV digital filters are theoretically modeled by the successive use of linear shift-invariant (LSI) filters. On the basis of the model, we present an interpretation of shift-variant spectral modification or filtering. Further, shift-variant digital filtering is discussed in relation to the notions of the short-time spectrum and the generalized frequency function. In addition, we propose an efficient implementation procedure which reduces the number of filter coefficients and the amount of computation. The effectiveness of LSV digital filters in processing time-varying signals is demonstrated by experimental verification.