Showing papers on "Digital signal processing published in 1984"

A new algorithm to compute the discrete cosine Transform

Abstract: A new algorithm is introduced for the 2m-point discrete cosine transform. This algorithm reduces the number of multiplications to about half of those required by the existing efficient algorithms, and it makes the system simpler.

Coding of Real-Number Sequences for Error Correction: A Digital Signal Processing Problem

Abstract: Error-correcting codes defined over the real-number and complex-number fields are introduced. The possibility of utilizing realnumber arithmetic permits the codes to be implemented with operations normally available in standard programmable digital signal processors by methods which are discussed. Hadamard and discrete Fourier transform codes are presented for block coding, and the latter are seen to be cyclic and to include the class of BCH codes. It is shown that maximum distance separable real-number BCH ( N, K ) codes exist for all nontrivial values of N and K . A large class of block and convolutional real-number single-error-correcting codes, derived from similar codes over GF(p) , are presented. Both block and convolutional codes are seen to be describable by the z -transform in a manner which emphasizes their similarities to conventional digital signal processing structures such as digital filters and digital filter banks. Methods for correcting weight t and t + 1 errors in a t error-correcting code are demonstrated and interpreted; in particular, the use of a VLSI digital signal processor for implementation of an algorithm for correcting almost all double adjacent error patterns in a single-error-correcting convolutional code is discussed.

Some complexity issues in digital signal processing

Abstract: Over the past decade a large class of problems, called NP-complete [5], have been shown to be equivalent in the sense that if a fast algorithm can be found for one, fast algorithms can be found for all. At the same time, despite much effort, no fast algorithms have been found for any, and these problems are widely regarded as intractable. This class includes such notoriously difficult problems as the traveling salesman problem, graph coloring, and satisfiability of Boolean expressions. Using FIR filter implementation as an illustration, we describe some problems in digital signal processing that are NP-complete. These include: 1) minimize the number of additions needed to implement a fixed FIR filter; 2) minimize the number of registers needed to implement a fixed FIR filter; and 3) minimize the time to perform the additions of such an FIR filter using P adders. Large-seale instances of such problems may become important with the use of programmable chips to implement signal processing. Our main purpose in this paper is to illustrate the usefulness of asymptotic complexity theory in the field of digital signal processing. The theory discriminates between tractable and intractable problems, Sometimes identifies fast algorithms for the former, and justifies heuristics for the latter.

Multiprocessor system employing dynamically programmable processing elements controlled by a master processor

Abstract: There is disclosed a multiple processor system which employs dynamically programmable processing elements (DDPE) utilized as slave devices and under the control of a master processor. A plurality of DPPE's have input/output data lines connected to a digital signal processing (DSP) bus. Communication between the DPPE's is afforded via the (DSP) bus from a master processor which interfaces with the bus via a dual port memory designated as a global memory. Each DPPE is connected together via another bidirectional serial bus so that the individual DPPE's can communicate one with the other in regard to processing and exchanging of arithmetic data. The digital signal processing bus allows the master processor to interface with the DPPE devices for control of input/output and control functions. In this manner, the master processor interfaces directly with a codec and has outputs which allow the transmission of plaintext or ciphertext data which data is formed by arithmetic operations performed by the slave DPPE's. The master processor also accesses a host computer and user terminal via a deuce circuit which essentially is a dual enhanced communications element. The status of the DPPE's and priority between the DPPE's and the master processor is controlled by an arbiter circuit which essentially controls the access of the DPPE's to the dual port memory (global memory) via the digital signal processing bus. The system is employed to operate on complicated algorithms and is patricularly adapted for use as a voice processor or modem processor is regard to modern communications systems.

Digital modulator with variations of phase and amplitude modulation

Abstract: A phase modulator includes a digital frequency word generator, an adder and a register arranged to generate recurrent digital sawtooth signals at a carrier rate. A second digital adder is coupled to receive the sawtooth signals and also receives digital information signals. The adder produces recurrent digital sawtooth signals phase-modulated by the information signal. A pair of adders receive the digital sawtooth signals and mutually sign-reversed digital information signals to produce a pair of oppositely phase-modulated constant-amplitude signals in a pair of channels. A sine memory is addressed by the phase-modulated digital sawtooth signals to produce phase-modulated sinusoidal-representative digital signals. The digital signals are then converted to analog signals. Since the two channels contain signals which are phase-modulated but not amplitude-modulated, the signals may be amplified by nonlinear amplifiers. An adder is coupled to the outputs of the two channels to sum together the two phase-modulated signals to produce an amplitude-modulated signal. Combinations of amplitude and phase modulation may be generated by a combined structure.

Television transmission network with scrambling and descrambling

Abstract: A controlled access television communications network in which scrambling and descrambling are accomplished by digital signal processing. At the scrambler, the video and audio information are digitized, segmented for example on a line-by-line basis, and randomly reordered. Decryption data corresponding to the random reordering of the information segments are derived, and inserted into the scrambled video data. A composite signal comprising the video data, audio modulated subcarrier, synchronizing signals and the decryption data is transmitted to the receivers along with dedicated keys whereby descramblers at the receivers are selectively enabled in accordance with the remote selection of authorized users.

Image processing method using a collapsed walsh-hadamard transform

Abstract: An improved image processing method uses a modified Walsh-Hadamard transform to remove noise and preserve image structure in a sampled image. Image signals representative of the light value of elements of the image are grouped into signal arrays corresponding to blocks of image elements. These signals are mapped into larger signal arrays such that one or more image signals appear two or more times in each larger array. The larger arrays are transformed by Walsh-Hadamard combinations characteristic of the larger array into sets of coefficient signals. Noise is reduced by modifying--i.e., coring or clipping--and inverting selected coefficient signals so as to recover processed signals--less noise--representative of each smaller signal array. The results exhibit acceptable rendition of low contrast detail while at the same time reducing certain processing artifacts characteristic of the unimproved Walsh-Hadamard block transform.

Digital tone decoder and method of decoding tones using linear prediction coding

Abstract: An all digital feature based pattern recognition tone detection system distinguishes one or more tones from speech or other background noise and provides extremely reliable, low cost DTMF tone detection. The system includes a digital signal processing system which uses a modified PARCOR signal analysis technique to efficiently calculate inverse filter coefficients defining in functional form a smoothed LPC spectrum from a received frame of digital pulse code data. A Fourier transform provides high resolution evaluation of the LPC data at frequencies of interest to permit evaluation of the spectral response in accordance with known features of an expected tone signal.

Digital Disks

Abstract: Geometric properties of digital disks are discussed. An algorithm is presented that determines whether or not a given digital region is a digital disk.

Transform processing method for reducing noise in an image

Abstract: An improved image processing method reduces noise in a sampled image while minimizing unintended distortion of image features. Image signals are generated representative of the light value of elements of the image. These signals are formed into signal arrays aligned to blocks of image elements. The signal arrays are transformed by a set of 4 by 4 Walsh-Hadamard functions into a corresponding set of coefficient signals. Certain of these coefficient signals represent the difference between the light value of each image element and an average light value over an image region smaller than the block being transformed. By modifying--i.e., coring or clipping--and inverting only these selected coefficient signals, artifacts related to the introduction of "false" edge-like structure are reduced in the reconstructed image. In addition, in a multi-stage processing method, the excluded coefficient signals may represent the input signals to the next stage.

A-D encoder and D-A decoder system

Abstract: An encoder converts an analog input signal to a digital signal. The encoder comprises a circuit for generating a control signal with a predetermined bandwidth from the input analog signal. The control signal indicates the desired optimum step-size to be applied in the encoder. The encoder further comprises a converter for converting the analog input signal to a digital signal. The converter is responsive to the control signal representing step-size so that the digital signal will be generated in accordance with the step-size information. Since the generation of a limited bandwidth control signal requires time, the encoder also includes a circuit for introducing time delay to the analog input signal, so that the delayed input signal reaches the converter when the control signal is available for digital encoding. A decoder generates an analog output signal from a digital signal received from an encoder through a transmission medium. The digital signal received includes a digital representation of an analog input signal to the encoder and step-size information which was used to digitally encode the analog signal in the encoder. The decoder comprises a converter responsive to a second control signal of limited bandwidth derived from the step-size information for generating from the digital representation an analog output signal. The analog output signal so generated is similar to the input analog signal.

Figures of merit for VLSI implementations of digital signal processing algorithms

Abstract: The advent of digital VLSI technology demands a reappraisal of the most suitable algorithms for a given processing function. A cost function is developed for making quantitative comparisons between digital algorithm implementations including control and overheads. This provides a tool allowing different implementations of the same algorithm, and also different algorithms for the same function, to be compared. The cost function is chosen to characterise the algorithm and associated logic design independently of the circuit technology that might be used. In this way the techonology options can be introduced separately in designing a practical system. Also, configurations which achieve a higher throughput by using a proportionally larger quantity of hardware or higher logic speed are assessed as having the same effectiveness or cost. As an illustration, the costing is applied to FFT and Winograd Fourier-transform algorithms (WFTA). The results show the advantage gained by minimising the true costs including, particularly, control overheads, instead of just the number of arithmetic operations. Despite its fewer arithmetic operations, the WFTA is shown to be less efficient than the FFT except in the most fully parallel case.

Audio digital recording and playback system

Abstract: A microcomputer system for converting an analog input signal, such as an audio signal representative of sound into a digital form for storing in digital form in a highly condensed code and for reconstructing the analog signal from the coded digital form is disclosed. The system includes reductive analytic means where the original digital data stream is converted to a sequential series of frequency spectrograms, signal amplitude histograms and waveform code tables. Approximately 100 times less storage space than previously required for the storage of digitized audio signals of high fidelity quality is thereby obtained. Additive synthesis logic interprets the stored codes and recreates an output digital data stream for digital to analog conversion that is nearly identical to the original source material.

Cryptographic digital signal transceiver method and apparatus

Abstract: Hybrid subband coding and decoding (using different encloding/decoding algorithms in at least one subband channel) and subband time delay compensation at a point of maximum digital bandwidth compression are effected so as to reduce required DSP on-chip memory requirements. At the same time a special digital signal format is employed so as to provide enhanced data frame synchronization, enhanced cryptographic synchronization and selective signalling ability within a cryptographic digital signal transceiver. The ability to successfully accomplish late entry (or to re-establish synchronization once lost) into an ongoing received message is provided.

PCM signal recording/reproducing apparatus

Abstract: A digital signal recording/reproducing apparatus capable of recording and reproducing digital signals having differences in respect to sampling frequency thereof and the number of quantization bits per sample by means of a common circuit arrangement includes means (30) for varying revolution speed of rotating heads (7, 7') for recording and reproduction ortravelling speed of a recording medium (9) as a function of different sampling frequencies. A signal processing circuit (13) for processing the digital signals so as to be suited for the recording on the recording medium (19) is controlled by a clock signal (18) of which frequency is changed in dependence on the different sampling frequencies (17, 27, 28). The signal processing circuit is arranged so that PCM data contained in a frame is constituted by a number of bits which is equal to a common multiple of the different quantization bit numbers (16 bits and 12 bits) and added with a common frame synchronizing signal and common error detection and correction codes to thereby prepare the PCM signal of the frame arrangement. The digital signals which differ in the sampling frequency and the quantization bit numbers can be recorded by same recording and reproducing apparatus with an improved efficiency with a same wavelength and in a same signal format.

A digital signal processing apparatus having a digital filter

Abstract: A digital signal processing apparatus with a rate-conversion function has at least two digital filters and a memory. A digital signal stored in the memory is selectively transferred to the at least two digital filters. These digital filters perform a filtering operation in parallel, and the results from each of the digital filters are alternately derived by a multiplexer. Thus, high-speed filtering can be executed. The memory temporarily stores a time-division-multiplexed signal which is sequentially read out of the memory and selectively transferred to the digital filters. Thus, a plurality of digital signals can be filtered by the same digital filters without an increase in hardware elements. Therefore, the digital filter section can be integrated in a single semiconductor chip. A shift register may be used as the memory, whereby a circuit arrangement of the digital filter section can be extremely simplified.

Digital Single Sideband Detection For Interferometric Sensors

Abstract: Digital single sideband detection with time discrete phase modulation for interferometric sensors utilizes integrated-optic components, and a direct digital processing. A dynamic range of 57 dB, and a maximum phase error of 0.07° are achieved with 10 bit converters.

A Modular Scintillation Camera for Use in Nuclear Medicine

Abstract: A "modular" scintillation camera is discussed as an alternative to using Anger cameras for gamma-ray imaging in nuclear medicine. Each module is an independent gamma camera and consists of a scintillation crystal, light pipe and mask plane, PMT's, and processing electronics. Groups of modules efficiently image radionuclide distributions by effectively utilizing crystal area. Performance of each module is maximized by using Monte-Carlo computer simulations to determine the optical design of the camera, optimizing the signal processing of the PMT signals using maximum-likelihood (ML) estimators, and incorporating digital lookup tables. Each event is completely processed in 2 ?sec, and FWHM of the PSF over the crystal area is expected to be 3 mm. Both one-dimensional and two-dimensional prototypes are tested for spatial and energy resolution.

Method and apparatus for recording digitized information on a disc

Abstract: Digital data consisting of different kinds of digital audio signals having sampling frequencies, numbers of quantization bits and the like that are different from those of the two-channel digital audio signals, display data, program data, and the like are recorded in the same signal format as that of the two-channel digital audio signals. A code signal representing either of the two-channel digital audio signals and the digital data is recorded and control data indicative of the linear velocity of the digital disc upon reproduction are inserted in every frame of the recording signal. One block of the digital data is formed by a predetermined amount of data and the same control data used for controlling the processing of the digital data is recorded at least twice in one block. The digital disc is rotated at a constant linear velocity on the basis of the control data upon reproduction. The reproduced audio data from the reproducing circuit is D/A converted, and the pass band of the low-pass filter to which the reproduced analog audio signals are supplied is adapted to the band of the reproduced analog audio signals.

Computer system for processing analog and digital data

Abstract: A computer system for processing analog and digital data input signals from many sources and producing analog and digital data output control signals includes a plurality of digital processing devices for processing the input data, a Processor Bus that interconnects the processing devices for relatively very high speed data transmission between the processing devices a plurality of analog and digital input and output data converter modules, a Converter Bus that interfaces the converter modules and a controller device that couples the Processor Bus and the Converter Bus together and controls the flow of signals therebetween, whereby analog and digital input data received at a range of data rates from relatively low to relatively high rates by input converter modules is transmitted on the Converter Bus to the Processor Bus, via the controller device, in digital format and is processed in the digital format at relatively very high data rates by one or more of the processing devices and digital output data from the processing devices is transmitted on the Processor Bus to the Converter Bus via the controller device and is converted by the converter modules which produce system outputs.

Detecting signals within a passband on a telephone line

Abstract: An improved combination of a hardware and digital signal processing filter for detecting pick-up of a telephone call, solely through audio information on the telephone line. The apparatus employs a high gain band pass filter (28) with no automatic gain control, the output of which goes to a window comparator (30). The output from the window comparator (31) goes to a digital high pass filter (32) and from there to an integrator 37 for providing a digital output signal (40) indicative of the presence or absence on the telephone line of a signal exceeding a predetermined magnitude within the filter pass band. The digital signal is then processed by an intelligent digital filter having a set of predetermined threshold values of durations for states of the digital output signal, by which determinations of pick-up are made. The digital filter is adaptive and learns the durations high and low states of the digital output signal as they occur, subsequently checking for deviations from previously learned valid values. The digital filter includes a digital phase lock loop which will lock into a periodic but asymmetric pattern in the digital output signal and declare pick-up when lock is lost.

Modulator-demodulator method and apparatus with efficient bandwidth utilization

Abstract: A method and apparatus for modulating and demodulating information for bandlimited communication is disclosed. Serialized digital data is divided into equal segments which are arranged in parallel. Each data segment is converted into a digital representation of a modulating value (either frequency, phase, amplitude or some combination). Each such digital representation is then combined in a particular manner with a number of digital representations of different carrier frequencies. This overlapping, whereby each digital representation of a carrier frequency is combined with several digital words in such a way that the corresponding analog carrier frequency would be modulated, and each digital word so "modulates" several carrier frequency representations, is called shoring. The resulting digital signals are processed to construct a digital representation of an analog signal which is the superposition, or amplitude sum over time, of all the different modulated carrier frequencies. The digital representation is then converted into an analog signal for transmission.

Image Decimation and Interpolation Techniques Based on Frequency Domain Analysis

Abstract: A scheme for a spatial domain image data preprocessing decimation and postprocessing interpolation is presented. The scheme is implemented by appropriate FIR digital filters. Frequency and patial domain specifications are discussed in the design of the corresponding digital filters. Fast approximation techniques in the spatial domain are presented.

Application Of The Radon Transform To Optical Production Of The Wigner Distribution Function

Abstract: The Wigner distribution function (WDF), a simultaneous coordinate and frequency representation of a signal, has properties useful in pattern recognition. Because the WDF is computationally demanding, its use is not usually appropriate in digital processing. Optical schemes have been developed to compute the WDF for one-dimensional (1 -D) signals, often using acousto-optic signal transducers. Some recent work has demonstrated the computation of two-dimensional (2-D) slices of the four-dimensional (4-D) WDF of a 2-D input transparency. In this latter case, the required 2-D Fourier transformation is performed by coherent optics. We demonstrate that computation of the WDF of real 2-D signals is susceptible to Radon transform solution. The 2-D operation is reduced to a series of 1 -D operations on the line-integral projections. The required projection data are produced optically, and the Fourier transformation is performed by efficient 1 -D processors (surface acoustic wave filters) by means of the chirp-transform algorithm. The resultant output gives 1 -D slices through the 4-D WDF nearly in real time, and the computation is not restricted to coherently illuminated transparencies. This approach may be useful in distinguishing patterns with known texture direction. The optical setup is easily modified to produce the cross-Wigner distribution function, a special case of the complex, or windowed, spectrogram.

Phase measurements of whistler mode signals from the Siple VLF transmitter

Abstract: A digital signal processing program has been developed to measure the phases of coherent VLF signals from analog tape recordings made in the field. The program uses a constant frequency pilot tone recorded with the VLF data to correct tape speed errors and reconstruct the signal phases. We analyze several examples of whistler mode signals from the VLF transmitter at Siple Station, Antarctica, as received at Roberval, Quebec. Pulses with temporal growth show a relative phase advance with time, and thus a positive frequency offset from the transmitted signal, often from the beginning of the pulse. Amplitude beating is often seen toward the end of a pulse, sometimes with phase cycle-skipping as the emission becomes unlocked from the input signal. Current theories of wave-particle interaction are reviewed and found to explain some of the observed signal features, though no theory predicts the initial frequency offset of a growing pulse.

The integrated signal processing system ISP

Abstract: The Integrated Signal Processing System (ISP) is a Lisp machine-based workstation which provides a unified environment for signal data processing and the development of signal processing algorithms. ISP is based on a model of signal processing computation in which the fundamental activities are creating and manipulating abstract signal objects. ISP consists of three main subsystems. The signal representation language (SRL) formalizes the semantic foundation of ISP and provides a set of facilities for defining signal classes and creating instances of signal objects. The ISP environment provides a signal stack, signal pictures and signal display layouts which are used to create and view selected signals from the universe defined by SRL. Finally, the user interface consists of a number of interactive mechanisms for manipulating components of the environment.

Data transfer system using digital disc

Abstract: PCT No. PCT/JP84/00081 Sec. 371 Date Oct. 23, 1984 Sec. 102(e) Date Oct. 23, 1984 PCT Filed Mar. 2, 1984 PCT Pub. No. WO84/03580 PCT Pub. Date Sep. 13, 1984.Digital data consisting of different kinds of digital audio signals having sampling frequencies, numbers of quantization bits and the like that are different from those of the two-channel digital audio signals, display data, program data, and the like are recorded in the same signal format as that of the two-channel digital audio signals. A code signal representing either of the two-channel digital audio signals and the digital data is recorded and control data indicative of the linear velocity of the digital disc upon reproduction are inserted in every frame of the recording signal. One block of the digital data is formed by a predetermined amount of data and the same control data used for controlling the processing of the digital data is recorded at least twice in one block. The digital disc is rotated at a constant linear velocity on the basis of the control data upon reproduction. The reproduced audio data from the reproducing circuit is D/A converted, and the pass band of the low-pass filter to which the reproduced analog audio signals are supplied is adapted to the band of the reproduced analog audio signals.

Integrated and programmable processor for word-wise digital signal processing

Abstract: A description is given of an integrated and programmable processor for word-wise digital signal processing. The processor comprises a multiplier element, an arithmetic and a logic unit (122), a data memory and a connection for a control memory which may be integrated on-chip. The elements are interconnected by means of a double bus (20, 22) on which addresses as well as data may be transported by means of suitable selectors. Consequently, a pipeline operation can also take place within one instruction cycle.