Showing papers on "Digital signal processing published in 2009"

Blind Multiband Signal Reconstruction: Compressed Sensing for Analog Signals

Abstract: We address the problem of reconstructing a multiband signal from its sub-Nyquist pointwise samples, when the band locations are unknown. Our approach assumes an existing multi-coset sampling. To date, recovery methods for this sampling strategy ensure perfect reconstruction either when the band locations are known, or under strict restrictions on the possible spectral supports. In this paper, only the number of bands and their widths are assumed without any other limitations on the support. We describe how to choose the parameters of the multi-coset sampling so that a unique multiband signal matches the given samples. To recover the signal, the continuous reconstruction is replaced by a single finite-dimensional problem without the need for discretization. The resulting problem is studied within the framework of compressed sensing, and thus can be solved efficiently using known tractable algorithms from this emerging area. We also develop a theoretical lower bound on the average sampling rate required for blind signal reconstruction, which is twice the minimal rate of known-spectrum recovery. Our method ensures perfect reconstruction for a wide class of signals sampled at the minimal rate, and provides a first systematic study of compressed sensing in a truly analog setting. Numerical experiments are presented demonstrating blind sampling and reconstruction with minimal sampling rate.

Digital communications. 3rd ed

Abstract: Digital communications is the foundation of modern telecommunications and digital signal processing. The second edition of Digital Communications is updated to include current techniques and systems used in the rapidly expanding field of fixed and mobile communications. The text has comprehensive coverage of digital communications without going into unnecessary detail or irrelevant topics. Its main aims are to develop the mathematical theory behind signal processing and use this knowledge to develop fixed and mobile data communications systems. This text is geared towards students who already have a technical understanding of electrical engineering from their introductory years at university and who wish to focus on digital communications. It covers everything these students will need to know, including modern techniques.

Speech signal processing

Abstract: A speech signal processing system comprises an audio processor (103) for providing a first signal representing an acoustic speech signal of a speaker. An EMG processor (109) provides a second signal which represents an electromyographic signal for the speaker captured simultaneously with the acoustic speech signal. A speech processor (105) is arranged to process the first signal in response to the second signal to generate a modified speech signal. The processing may for example be a beam forming, noise compensation, or speech encoding. Improved speech processing may be achieved in particular in an acoustically noisy environment.

Noise Reduction in Speech Processing

Abstract: Noise is everywhere and in most applications that are related to audio and speech, such as human-machine interfaces, hands-free communications, voice over IP (VoIP), hearing aids, teleconferencing/telepresence/telecollaboration systems, and so many others, the signal of interest (usually speech) that is picked up by a microphone is generally contaminated by noise. As a result, the microphone signal has to be cleaned up with digital signal processing tools before it is stored, analyzed, transmitted, or played out. This cleaning process is often called noise reduction and this topic has attracted a considerable amount of research and engineering attention for several decades. One of the objectives of this book is to present in a common framework an overview of the state of the art of noise reduction algorithms in the single-channel (one microphone) case. The focus is on the most useful approaches, i.e., filtering techniques (in different domains) and spectral enhancement methods. The other objective of Noise Reduction in Speech Processing is to derive all these well-known techniques in a rigorous way and prove many fundamental and intuitive results often taken for granted. This book is especially written for graduate students and research engineers who work on noise reduction for speech and audio applications and want to understand the subtle mechanisms behind each approach. Many new and interesting concepts are presented in this text that we hope the readers will find useful and inspiring.

A 128-Channel 6 mW Wireless Neural Recording IC With Spike Feature Extraction and UWB Transmitter

Abstract: This paper reports a 128-channel neural recording integrated circuit (IC) with on-the-fly spike feature extraction and wireless telemetry. The chip consists of eight 16-channel front-end recording blocks, spike detection and feature extraction digital signal processor (DSP), ultra wideband (UWB) transmitter, and on-chip bias generators. Each recording channel has amplifiers with programmable gain and bandwidth to accommodate different types of biological signals. An analog-to-digital converter (ADC) shared by 16 amplifiers through time-multiplexing results in a balanced trade-off between the power consumption and chip area. A nonlinear energy operator (NEO) based spike detector is implemented for identifying spikes, which are further processed by a digital frequency-shaping filter. The computationally efficient spike detection and feature extraction algorithms attribute to an auspicious DSP implementation on-chip. UWB telemetry is designed to wirelessly transfer raw data from 128 recording channels at a data rate of 90 Mbit/s. The chip is realized in 0.35 mum complementary metal-oxide-semiconductor (CMOS) process with an area of 8.8 times 7.2 mm2 and consumes 6 mW by employing a sequential turn-on architecture that selectively powers off idle analog circuit blocks. The chip has been tested for electrical specifications and verified in an ex vivo biological environment.

The Digital Signal Processing Handbook

Abstract: Now available in a three-volume set, this updated and expanded edition of the bestselling The Digital Signal Processing Handbook continues to provide the engineering community with authoritative coverage of the fundamental and specialized aspects of information-bearing signals in digital form. Encompassing essential background material, technical details, standards, and software, the second edition reflects cutting-edge information on signal processing algorithms and protocols related to speech, audio, multimedia, and video processing technology associated with standards ranging from WiMax to MP3 audio, low-power/high-performance DSPs, color image processing, and chips on video. Drawing on the experience of leading engineers, researchers, and scholars, the three-volume set contains 29 new chapters that address multimedia and internet technologies, tomography, radar systems, architecture, standards, and future applications in speech, acoustics, video, radar, and telecommunications. This volume, Wireless, Networking, Radar, Sensor Array Processing, and Nonlinear Signal Processing, provides complete coverage of the foundations of signal processing related to wireless, radar, spacetime coding, and mobile communications, together with associated applications to networking, storage, and communications.

Accurate Small-Signal Model for the Digital Control of an Automotive Bidirectional Dual Active Bridge

Abstract: The derivation of an accurate small-signal model for a galvanically isolated, bidirectional dc-dc converter and the implementation of a corresponding controller on a DSP as well as key methods and functions required for the digital implementation are detailed in this paper. The investigated dc-dc converter, an automotive dual active bridge (DAB) system, enables power transfer between a low-voltage port (ranging from 11 to 16 V) and an HV port (240 to 450 V). The nominal power rating is 2 kW. The developed small-signal model yields highly accurate results for the DAB system, but the proposed modeling procedure could also be applied to arbitrary resonant power converters with unidirectional or bidirectional power transfer.

DSP for Coherent Single-Carrier Receivers

Abstract: In this paper, we outline the design of signal processing (DSP) algorithms with blind estimation for 100-G coherent optical polarization-diversity receivers in single-carrier systems. As main degrading optical propagation effects, we considered chromatic dispersion (CD), polarization-mode dispersion (PMD), polarization-dependent loss (PDL), and cross-phase modulation (XPM). In the context of this work, we developed algorithms to increase the robustness of the single DSP receiver modules against the aforesaid propagation effects. In particular, we first present a new and fast algorithm to perform blind adaptive CD compensation through frequency-domain equalization. This low complexity equalizer component inherits a highly precise estimation of residual dispersion independent from previous or subsequent blocks. Next, we introduce an original dispersion-tolerant timing recovery and illustrate the derivation of blind polarization demultiplexing, capable to operate also in condition of high PDL. At last, we propose an XPM-mitigating carrier phase recovery as an extension of the standard Viterbi-Viterbi algorithm.

Performance of Dual-Polarization QPSK for Optical Transport Systems

Abstract: The emergence of capable semiconductor processes has allowed digital signal processing to extend the application range of high-capacity optical systems. We report the performance of polarization multiplexed (or dual-polarization) quadrature phase-shift keying at 40 and 100 Gb/s.

Evaluation of DSP-Based PID and Fuzzy Controllers for DC–DC Converters

Abstract: In this paper, digital proportional-integral-derivative (PID)-type and fuzzy-type controllers are compared for application to the buck and boost dc-dc converters. Comparison between the two controllers is made with regard to design methodology, implementation issues, and experimentally measured performance. Design of fuzzy controllers is based on heuristic knowledge of converter behavior, and tuning requires some expertise to minimize unproductive trial and error. The design of PID control is based on the frequency response of the dc-dc converter. Implementation of linear controllers on a digital signal processor is straightforward, but realization of fuzzy controllers increases computational burden and memory requirements. For the boost converter, the performance of the fuzzy controller was superior in some respects to that of the PID controllers. The fuzzy controller was able to achieve faster transient response in most tests, had a more stable steady-state response, and was more robust under some operating conditions. In the case of the buck converter, the fuzzy controller and PID controller yielded comparable performances.

Time-frequency analysis using NVIDIA compute unified device architecture (CUDA)

Abstract: The Digital Signal Processing (DSP) requires high computing power. Von Neuman architecture reaches it's limits. To meet the high requirement of DSP algorithms the parallel processing techniques are being used. The paper presents an example of DSP application on NVIDIA graphic card using CUDA environment. The presented result shows the high effectiveness of multi-core graphical card in Digital Signal Processing. The processing time of the example spectrogram is reduced 10 times compared to Central Processing Unit (CPU) of the standard PC

Recent advances in coherent optical communication

Abstract: Recent progress in coherent optical communication, a field revived by advances in digital signal processing (DSP), is reviewed. DSP-based phase and polarization management techniques make coherent detection robust and practical. With coherent detection, the complex field of the received signal is fully recovered, allowing compensation of linear impairments including chromatic dispersion and polarization-mode dispersion using digital filters. In addition, fiber nonlinearities can also be compensated by using backward propagation in the digital domain.

Phase Estimation Methods for Optical Coherent Detection Using Digital Signal Processing

Abstract: The advent of digital signal processing (DSP) to optical coherent detection means that more phase estimation options are available, compared to the earlier generation where phase-locked loops (PLLs) were invariably deployed in synchronous coherent receivers. Several phase estimation methods are numerically modeled: the maximum a posteriori (MAP) phase estimate, decision directed estimate, power law-Wiener filter estimate and power law-PLL estimate. An asynchronous coherent detection case is also modeled. The phase estimates are evaluated with respect to their tolerance of finite laser linewidth and their suitability for implementation in a parallel digital processor. Laser phase noise causes transmission system performance to be degraded by excess bit errors and cycle slips. The optimal phase estimate is the MAP estimate, and it is also included as a baseline. The power law-Wiener filter phase estimate is found to perform only marginally worse than the MAP estimate. It must be recast using a look-ahead computation to be implemented in a parallel digital processor, and the impact is investigated of the increase in the number of computations required. Differential logical detection is often used to reduce the impact of cycle slip events, and the implications of this operation on the bit error rate are studied. It is found that by choosing the correct FEC scheme differential logical detection does not increase the Q-factor penalty.

Camera-based tracking and position determination for sporting events

Abstract: Position information of equipment at an event, such as a ball, one or more players, or other items in a game or sporting event, is used in selecting camera, camera shot type, camera angle, audio signals, and/or other output data for providing a multimedia presentation of the event to a viewer. The position information is used to determine the desired viewer perspective. A network of feedback robotically controlled Pan-Tilt-Zoom (PTZ), manually controlled cameras and stationary cameras work together with interpolation techniques to create a 2D video signal. The position information may also be used to access gaming rules and assist officiating of the event. The position information may be obtained through a transceiver(s), accelerometer(s), transponder(s), and/or RADAR detectable element(s) fitted into the ball, apparel or equipment of players, the players themselves, or other playing equipment associated with the game or sporting event. Other positioning methods that can be used include infrared video-based tracking systems, SONAR positioning system(s), LIDAR positioning systems, and digital signal processing (DSP) image processing techniques such as triangulation.

Multi-core for mobile phones

Abstract: High-end mobile phones support multiple radio standards and a rich suite of applications, which involves advanced radio, audio, video, and graphics processing. The overall digital workload amounts to nearly 100GOPS, from 4b integer to 24b floating-point operations. With a power budget of only 1W this inevitably leads to heterogeneous multi-core architectures with aggressive power management. We review the state-of-the-art as well as trends.

Multi-Level, Multi-Dimensional Coding for High-Speed and High-Spectral-Efficiency Optical Transmission

Abstract: We review and study several single carrier based multi-level and multi-dimensional coding (ML-MDC) technologies recently demonstrated for spectrally-efficient 100-Gb/s transmission. These include 16-ary PDM-QPSK, 64-ary PDM-8PSK, 64-ary PDM-8QAM as well as 256-ary PDM-16 QAM. We show that high-speed QPSK, 8PSK, 8QAM, and 16QAM can all be generated using commercially available optical modulators using only binary electrical drive signals through novel synthesis methods, and that all of these modulation formats can be detected using a universal receiver front-end and digital coherent detection. We show that the constant modulus algorithm (CMA), which is highly effective for blind polarization recovery of PDM-QPSK and PDM-8PSK signals, is much less effective for PDM-8QAM and PDM-16 QAM. We then present a recently proposed, cascaded multi-modulus algorithm for these cases. In addition to the DSP algorithms used for constellation recovery, we also describe a DSP algorithm to improve the performance of a coherent receiver using single-ended photo-detection. The system impact of ASE noise, laser phase noise, narrowband optical filtering and fiber nonlinear effects has been investigated. For high-level modulation formats using full receiver-side digital compensation, it is shown that the requirement on LO phase noise is more stringent than the signal laser. We also show that RZ pulse shaping significantly improves filter- and fiber-nonlinear tolerance. Finally we present three high-spectral-efficiency and high-speed DWDM transmission experiments implementing these ML-MDC technologies.

Beyond bandlimited sampling

Abstract: Digital applications have developed rapidly over the last few decades. Since many sources of information are of analog or continuous-time nature, discrete-time signal processing (DSP) inherently relies on sampling a continuous-time signal to obtain a discrete-time representation. Consequently, sampling theories lie at the heart of signal processing devices and communication systems. Examples include sampling rate conversion for software radio and between audio formats, biomedical imaging, lens distortion correction and the formation of image mosaics, and super-resolution of image sequences.

Real-Time Estimation of Fundamental Frequency and Harmonics for Active Shunt Power Filters in Aircraft Electrical Systems

Abstract: A novel algorithm for fundamental frequency and harmonic components detection is presented in this paper. The technique is based on a real-time implementation of discrete Fourier transform, and it allows fast and accurate estimation of fundamental frequency and harmonics of a distorted signal with variable fundamental frequency. It is suitable for active shunt filter applications, when fast and accurate tracking of the reference signal is required to achieve a good control performance. The main application for the algorithm is aircraft ac power systems, where the fundamental frequency can be either fixed on 400 Hz and its actual value fluctuates around the nominal value, or variable in the range 360-900 Hz. Hence, a real-time estimation of fundamental frequency is essential for active filter control. The proposed algorithm has been at first implemented in Matlab/Simulink for computer simulation, and it has been compared with a Phase Locked Loop (PLL) algorithm for frequency detection and the synchronous dq reference method for harmonic detection. Experimental tests have been carried out in order to validate the simulation results. The distorted current absorbed by a nonlinear load is analyzed and processed by means of a digital implementation of the algorithm running on the active shunt power filter control DSP, in order to calculate the active filter compensating current.

Improving the Nonlinear Tolerance of Polarization-Division-Multiplexed CO-OFDM in Long-Haul Fiber Transmission

Abstract: We present digital signal processing techniques and algorithms for improving the tolerance of polarization-division multiplexed (PDM) coherent optical orthogonal frequency-division multiplexing (CO-OFDM) to fiber nonlinear effects, in both single-channel and wavelength-division multiplexed (WDM) transmission. For single-channel transmission, we discuss a self-phase modulation (SPM) compensation method that jointly processes two polarization components of a PDM CO-OFDM signal. For WDM transmission, we describe a novel OFDM channel estimation scheme that reduces the cross-phase-modulation (XPM) penalty among the WDM channels. The nonlinear tolerance improvements enabled by these signal processing techniques are quantified through numerical simulations for both dispersion-unmanaged and dispersion-managed long-haul optical fiber transmission with 112-Gb/s PDM CO-OFDM wavelength channels.

A DSP- and FPGA-Based Industrial Control With High-Speed Communication Interfaces for Grid Converters Applied to Distributed Power Generation Systems

Abstract: New energy concepts such as distributed power generation systems (DPGSs) are changing the face of electric distribution and transmission. Power electronics researchers try to apply new electronic controller solutions with the capacity of implementing new and more complex control algorithms combined with internal high-speed communication interfaces. Thus, it is possible to monitor, store, and transfer a large number of internal variables that can be sent online to local or remote hosts in order to take new set points of different generation units. With this objective, this paper presents the design, implementation, and test of an industrial multiprocessor controller based on a floating-point digital signal processor (DSP) and a field-programmable gate array, which operate cooperatively. The communication architecture, which has been added to the proposed electronic solution, consists of a universal serial bus (USB), implemented with a minimum use of the DSP core, and a controller area network (CAN) bus that permits distributed control. Although the proposed system can be readily applied to any DPGS, in this paper, it is focused on a 150-kVA back-to-back three-level neutral-point-clamped voltage source converter for wind turbine applications.

The Hardware and Signal Processing Architecture of LabPET™, a Small Animal APD-Based Digital PET Scanner

Abstract: The highly multiplexed analog processing front-end of current Positron Emission Tomography (PET) scanners yields high accuracy for timing but adds significant dead time and offers little flexibility for improvement. A new fully digital APD-based scanner architecture is proposed wherein nuclear pulses are sampled directly at the output of the Charge Sensitive Preamplifier (CSP) with one free-running ADC per channel. This approach offers the opportunity to explore new digital signal processing algorithms borrowed from other fields like command and control theory, as well as advanced heuristics such as neural networks. The analog front-end consists of a dedicated 0.18- mum, 16-channel CMOS charge sensitive preamplifier. Digitization is performed with off-the-shelf dual 8-bit analog-to-digital converters running at 45-MSPS. Digital processing is shared between a FPGA and a Digital Signal Processor (DSP), which can process the data from up to 64 parallel channels without dead time. The FPGA deals with the initial signal analysis for energy measurement and time stamping, while crystal identification is deferred to the DSP running computation-intensive recursive algorithms. The entire system is controlled serially through a Firewire link by a Graphic User Interface. The initial LabPETtrade implementation of the system is a dedicated small animal scanner holding up to 4608 APD channels at an averaged count rate of up to 10 000 events/s each.

Multi-Gigabit communication: the ADC bottleneck 1

Abstract: The economies of scale in modern communication systems are enabled by architectures that take advantage of Moore's law to implement most transceiver functionalities in digital signal processing (DSP) The bottleneck in scaling such “mostly digital” architectures to multi-Gigabit rates becomes the analog-to-digital converter (ADC): high-speed, high-precision ADCs are either not available, or are too costly and power-hungry In this paper, we report on recent results on two approaches towards addressing this bottleneck The first is to simply use drastically low-precision (1–4 bit) ADCs than current practice This could be suitable for applications that require limited dynamic range (eg, line-of-sight communication using small constellations), but there are fundamental and algorithmic questions as to whether all the functions of a communication receiver can be realized with such a significant nonlinearity early in the processing The second is to use a time-interleaved ADC, where a large number of low-speed, high-precision ADCs are employed in parallel to realize a high-speed, high-precision ADC This is more generally applicable to applications requiring large dynamic range (eg, large constellations and/or dispersive channels), but the important question is how to effectively address the mismatch between the component ADCs, which leads to a performance floor if left uncompensated

Sensorless Control for a Switched Reluctance Wind Generator, Based on Current Slopes and Neural Networks

Abstract: In this paper, the analysis, design, and implementation of a novel rotor position estimator for the control of variable-speed switched reluctance generators (SRGs) are presented. The rotor position is obtained using the unsaturated instantaneous inductance. This unsaturated inductance is estimated calculating the slope of the phase current and using a reduced-size neural network (NN) whose inputs are the average current and the saturated inductance. The proposed estimator requires less processing time than traditional methods and can be fully implemented using a low-cost DSP with very few additional analog/digital components. The rotor position estimator presented in this paper can be applied to a wind energy conversion system where the SRG is used as a variable-speed generator. This application is currently being studied because the SRG has well-known advantages such as robustness, low manufacturing cost, and good size-to-power ratio. Simulation and experimental results are presented using a 2.5-kW 8/6-SRG prototype.

A 20MHz BW 68dB DR CT ΔΣ ADC based on a multi-bit time-domain quantizer and feedback element

Abstract: Low-power, small-area, 20MHz-BW ADCs that can be integrated in nanoscale CMOS technologies are of immense interest to the wireless communication industry. Implementation of high-performance analog circuits in nanometric technologies faces several challenges [1]. Time-domain digital signal processing (TDSP) [2] can be used as an alternative for some analog circuits to overcome these challenges. The TDSP technique utilizes the high timing resolution available in nanoscale technologies, and can be implemented using digital circuits that are inherently less susceptible to noise. Circuits using this technique also become faster, smaller and consume less power with technology scaling. Hence, solutions using TDSP with as many digital circuits as possible are desired. An ADC architecture that uses a VCO-based time-domain quantizer is presented in [3]. This architecture uses a conventional feedback element (multi-element DAC with DEM) and 950MHz sample rate that leads to high power consumption. In this work, a pulse-width modulator (PWM) and an all-digital time-to-digital converter (TDC) are used to implement the quantizer as well as the feedback element in the time domain. This approach achieves the necessary linearity in the feedback path without DEM or calibration, and allows a low output rate of 250MS/s.

A review of digital techniques for modeling vacuum-tube guitar amplifiers

Abstract: Although semiconductor technologies have displaced vacuum-tube devices in nearly all fields of electronics, vacuum tubes are still widely used in professional guitar amplifiers. A major reason for this is that electric-guitar amplifiers are typically overdriven, that is, operated in such a way that the output saturates. Vacuum tubes distort the signal in a different manner compared to solid-state electronics, and human listeners tend to prefer this. This might be because the distinctive tone of tube amplifiers was popularized in the 1950s and 1960s by early rock and roll bands, so musicians and listeners have become accustomed to tube distortion. Some studies on the perceptual aspects of vacuum-tube and solid-state distortion have been published (e.g., Hamm 1973; Bussey and Haigler 1981; Santo 1994). Despite their acclaimed tone, vacuum-tube amplifiers have certain shortcomings: large size and weight, poor durability, high power consumption, high price, and often poor availability of spare parts. Thus, it is not surprising that many attempts have been made to emulate guitar tube amplifiers using smaller and cheaper solid-state analog circuits (e.g., Todokoro 1976; Sondermeyer 1984). The next step in the evolution of tube-amplifier emulation has been to simulate the amplifiers using computers and digital signal processors (DSP). A primary advantage of digital emulation is that the same hardware can be used for modeling many different tube amplifiers and effects. When a new model is to be added, new parameter values or program code are simply uploaded to the device. Furthermore, amplifier models can be implemented

Delta–Sigma A/D Conversion Via Time-Mode Signal Processing

Abstract: In this paper, a signal processing methodology is proposed that performs delta-sigma (DeltaSigma) analog-to-digital (A/D) conversion on voltage signals while implementing all the circuits in a digital CMOS logic style. This methodology, called time-mode (TM) signal processing, uses time-difference variables as an intermediate signal between the input voltage and the digital output. The resulting low-cost silicon devices offer very compact, low-power, high-speed, and robust A/D converter (ADC) alternatives. A first-order DeltaSigma ADC is implemented using this methodology. Two ICs were fabricated in a 0.18- mum CMOS technology to demonstrate the feasibility of the TM DeltaSigma ADC approach. The first IC implements a single-ended input design while a differential design was fabricated in the second IC. Experimental results reveal that these devices can achieve 7-9-bit resolutions within 125-400-kHz bandwidths, while occupying areas smaller than 50 mum t50 mum and consuming less than 800 muW.

An Ultra Low Power Wakeup Receiver for Wireless Sensor Nodes

Abstract: An ultra-low power 2.4 GHz RF Wakeup Receiver is designed for wireless sensor networks nodes. The receiver demodulates On-Off Keying at 100 kbps. A 120 nm CMOS chip includes the analog front-end and consumes only 7.5 mu W from a single 1.5 V supply. The digital signal processing is implemented in an FPGA. The results of measures and simulations are evaluated for the use of this receiver in wireless sensor networks.

Receiver algorithms for coherent detection of polarization-multiplexed optical signals

Abstract: A digital signal processor (DSP) operating within, for example, an optical receiver wherein the DSP processes complex sample streams derived from a modulated optical signal, the DSP configured to perform a method of acquiring an intermediate frequency (IF) signal from within the received optical signal, the method comprising: processing at least one block of complex sample stream symbols using a frequency locked loop (FLL) to achieve an initial constellation lock condition, the FLL having a nominal lock-in spectral region; if an initial constellation lock condition is not achieved within a predetermined amount of time, shifting the spectral region processed by the FLL to a spectral region proximate a current operating spectral region.