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Digital signal processing

About: Digital signal processing is a research topic. Over the lifetime, 38111 publications have been published within this topic receiving 477741 citations. The topic is also known as: DSP & Digital Signal Process.


Papers
More filters
Journal ArticleDOI
01 Jun 1999
TL;DR: The basic adaptive algorithm for ANC is developed and analyzed based on single-channel broad-band feedforward control, then modified for narrow-bandFeedforward and adaptive feedback control, which are expanded to multiple-channel cases.
Abstract: Active noise control (ANC) is achieved by introducing a cancelling "antinoise" wave through an appropriate array of secondary sources. These secondary sources are interconnected through an electronic system using a specific signal processing algorithm for the particular cancellation scheme. ANC has application to a wide variety of problems in manufacturing, industrial operations, and consumer products. The emphasis of this paper is on the practical aspects of ANC systems in terms of adaptive signal processing and digital signal processing (DSP) implementation for real-world applications. In this paper, the basic adaptive algorithm for ANC is developed and analyzed based on single-channel broad-band feedforward control. This algorithm is then modified for narrow-band feedforward and adaptive feedback control. In turn, these single-channel ANC algorithms are expanded to multiple-channel cases. Various online secondary-path modeling techniques and special adaptive algorithms, such as lattice, frequency-domain, subband, and recursive-least-squares, are also introduced. Applications of these techniques to actual problems are highlighted by several examples.

1,254 citations

01 Jan 1988
TL;DR: A general overview of VLSI array processors is provided and a unified treatment from algorithm, architecture, and application perspectives is provided.
Abstract: High speed signal processing depends critically on parallel processor technology. In most applications, general-purpose parallel computers cannot offer satisfactory real-time processing speed due to severe system overhead. Therefore, for real-time digital signal processing (DSP) systems, special-purpose array processors have become the only appealing alternative. In designing or using such array Processors, most signal processing algorithms share the critical attributes of regularity, recursiveness, and local communication. These properties are effectively exploited in innovative systolic and wavefront array processors. These arrays maximize the strength of very large scale integration (VLSI) in terms of intensive and pipelined computing, and yet circumvent its main limitation on communication. The application domain of such array processors covers a very broad range, including digital filtering, spectrum estimation, adaptive array processing, image/vision processing, and seismic and tomographic signal processing, This article provides a general overview of VLSI array processors and a unified treatment from algorithm, architecture, and application perspectives.

1,249 citations

Journal ArticleDOI
TL;DR: Using the analytical solution an upper bound on the number of taps required to compensate chromatic dispersion is obtained, with simulation revealing an improved bound of 2.2 taps per 1000ps/nm for 10.7GBaud data.
Abstract: Digital filters underpin the performance of coherent optical receivers which exploit digital signal processing (DSP) to mitigate transmission impairments. We outline the principles of such receivers and review our experimental investigations into compensation of polarization mode dispersion. We then consider the details of the digital filtering employed and present an analytical solution to the design of a chromatic dispersion compensating filter. Using the analytical solution an upper bound on the number of taps required to compensate chromatic dispersion is obtained, with simulation revealing an improved bound of 2.2 taps per 1000ps/nm for 10.7GBaud data. Finally the principles of digital polarization tracking are outlined and through simulation, it is demonstrated that 100krad/s polarization rotations could be tracked using DSP with a clock frequency of less than 500MHz.

1,201 citations

Journal ArticleDOI
TL;DR: In this article, the phase tracking system of the three phase utility interface inverters is investigated in both continuous and discrete-time domains, and the optimization method is considered for the second order PLL system.
Abstract: The analysis and design of the phase-locked loop (PLL) system is presented for the phase tracking system of the three phase utility interface inverters. The dynamic behavior of the closed loop PLL system is investigated in both continuous and discrete-time domains, and the optimization method is considered for the second order PLL system. In particular, the performance of the three phase PLL system is analyzed in the distorted utility conditions such as the phase unbalancing, harmonics, and offset caused by the nonlinear load conditions and measurement errors. The tracking errors under these distorted utility conditions are also derived. The phase tracking system is implemented in a digital manner using a digital signal processor (DSP) to verify the analytic results. The design considerations for the phase tracking system are deduced from the analytic and experimental results.

1,129 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20241
2023233
2022532
2021486
2020799
20191,017