Showing papers on "Division (mathematics) published in 1985"
TL;DR: In another study as mentioned in this paper, a total of 623 pupils enrolled in 13 Italian schools (Grades 5, 7, and 9) were asked to choose the operation needed to solve 26 multiplication and division word problems.
Abstract: Arithmetical operations were assumed to remain attached to primitive behavioral models that influence tacitly the choice of an operation even after the learner has had solid formal-algorithmic training. The model for multiplication was conjectured to be repeated addition, and two primitive models (partitive and quotative) were seen as linked to division. A total of 623 pupils enrolled in 13 Italian schools (Grades 5, 7, and 9) were asked to choose the operation needed to solve 26 multiplication and division word problems. Violations by the numerical data of the constraints imposed by the assumed tacit models (for instance, when the operator was a decimal number) constituted particular sources of difficulty at all three grade levels. The findings seemed to confirm the impact of the repeated addition model on multiplication and of the partitive model on division. The quotative division model influenced the pupils' choices only at the ninth-grade level. The present study was inspired by previous findings on the difficulties children encounter when faced with verbal problems in multiplication and division. Bell, Swan, and Taylor (1981) have shown that when children are presented with a series of problems with the same content, they may change their minds about the operation needed to solve the problem, depending on the specific numerical data that are given. For instance, 12- to 15-year-old
426 citations
Patent•
13 Sep 1985
TL;DR: In this article, a clock synchronized time division switches are connected respectively to the input signal lines, bus highways, and the output signal lines in a multihop system, and each one is controlled by its own storage of selected addresses in time slot order.
Abstract: Ports including at least input and output signal lines are collected into port groups. For each port group three separate clock synchronized time division switches are connected respectively to the input signal lines, bus highways and the output signal lines. All time division switches of the system are synchronized by a system clock and each one is controlled by its own storage of selected addresses in time slot order. A plurality of bus highways is provided and the input time division switch connects signals to a specific bus highway of the system. A second time division switch selects the bus highway for connection to the output section of the port group. A third time division switch selects the output port to which the selected bus highway is connected. In one embodiment the bus highways directly connect the port groups. In another, a central inter-connect matrix is provided to make the connection between the first and second time division switches.
89 citations
Patent•
06 Jun 1985
TL;DR: The arithmetic pipeline processor (APP) as discussed by the authors is a group of boards capable of solving an equation of the form A.sup.m B.supn +C.supr +D.supm C.supp +E.q F.sups H.
Abstract: The arithmetic pipeline processor (which is used for computer graphics such as a flight simulator) is a group of boards capable of solving an equation of the form A.sup.m B.sup.n +C.sup.o D.sup.P +E.sup.q F.sup.r +G.sup.s H.sup.t where A, B, C, D, E, F, G, H are 32-bit implied one floating point numbers, and m, n, o, p, q, r, s, t can take on the values 1/4, 1/2, 1, 2 and 0. It includes a digital logarithmic calculator using shifters and stored tables to perform arithmetic functions such as multiplication, division, squares, square roots, and fourth roots. It comprises two input ports each capable of receiving digital data N bits wide. Included are a log transform unit, a log sum or difference unit and an antilog unit. Following these is an M-bit Aritmetic Logic Unit (ALU) and circuitry for converting between fixed point and floating point numbers. It uses piece wise linear approximation in conjunction with stored slope information in tables to do the transform calculation of logarithms and antilogarithms. The M-bit arithmetic unit performs accumulation of up to K terms. In a specific emodiment, N=32, M=36, and K=128. Note that a pipeline processor has no central processing unit or software in itself, but it may interface with a computer for inputs and outputs including control information.
46 citations
01 Jan 1985
TL;DR: In this article, the focus is on relating logistics resource alternatives to the peacetime readiness and wartime sustainability of the operating commands of the US military, where the maintenance, distribution, and procurements systems exist only to provide serviceable Line Replaceable Uints (LRUs) to keep end items available and the amount of money we invest in the maintenance system, and how we choose to invest it, affect the base Repair Cycle Time, Depot Repair Cycle time, and the fraction of repairs that can be accomplished at base level.
Abstract: : The Directorate of Management Science (AFLC/XRS) is comprised of three Divisions: the Assessment Applications Division (XRSA), the Concept Development Division (XRSC), and the Consultant Services Division (XRSM). We conduct and sponsor studies and research of significant logistics issues. We use, modify, and develop new or improved methods, models, and tools to manage logistics resources. We have developed outstanding capabilities in determining requirements for recoverable items (items that are repaired, as opposed to thrown away, when they fail), relating recoverable item assets to the number of aircraft available to accomplish the mission, and relating jet engine maintenance shop resources to aircraft availability. Our focus is on relating logistics resource alternatives to the peacetime readiness and wartime sustainability of the operating commands. In our scenario, the maintenance, distribution, and procurements systems exist only to provide serviceable Line Replaceable Uints (LRUs) to keep end items available. The amount of money we invest in the maintenance system, and how we choose to invest it, affect the base Repair Cycle Time, Depot Repair Cycle Time, and the fraction of repairs that can be accomplished at base level.
38 citations
TL;DR: The approach to steady-state size distribution is studied for a growing population of cells and incorporates cell growth at a linear rate and division into two equal daughters after a random time composed of an exponentially distributed phase and a constant deterministic phase.
Abstract: The approach to steady-state size distribution is studied for a growing population of cells. The model incorporates cell growth at a linear rate and division into two equal daughters after a random time composed of an exponentially distributed phase and a constant deterministic phase.
32 citations
TL;DR: In this article, the abelian Galois subfields of the Malcev-Neumann formal series division rings of universal division algebras were determined and a lower bound for the rank of Galois splitting fields was established.
Abstract: The abelian Galois subfields of Malcev-Neumann formal series division rings are determined. The results obtained in this paper lead to a lower bound for the rank of Galois splitting fields of universal division algebras.
32 citations
TL;DR: An algorithm for computing the quotient of two complex numbers is modified to make it more robust in the presence of underflows.
Abstract: An algorithm for computing the quotient of two complex numbers is modified to make it more robust in the presence of underflows.
27 citations
23 citations
Patent•
14 Aug 1985TL;DR: In this paper, a buffer memory (150 or 160) in a time division multiplexed trunk (120) may be used to interchange the predetermined time slots, or the buffer memory may be provided in a return loop (21') for use during the loop-back test.
Abstract: A time division exchange interchanges predetermined time slots of a time division multiplexed signal and returns it to a network (1) during a loop-back test. A buffer memory (150 or 160) in a time division multiplexed trunk (120) may be used to interchange the predetermined time slots. Alternatively, the buffer memory may be provided in a return loop (21') for use during the loop-back test. Therefore, it can be determined that the received signal is sent from another exchange and the loop-back test can be performed using ordinary exchanging processing procedures.
23 citations
TL;DR: This correspondence provides a fast algorithm for performing the integer division of a variable by a predetermined divisor in assembly languages, in microcodes, and in special-purpose circuits.
Abstract: When there is no division circuit available, the arithmetical function of division is normally performed by a library subroutine. The library subroutine normally allows both the divisor and the dividend to be variables, and requires the execution of hundreds of assembly instructions. This correspondence provides a fast algorithm for performing the integer division of a variable by a predetermined divisor. Based upon this algorithm, an efficient division routine has been constructed for each odd divisor up to 55. These routines may be implemented in assembly languages, in microcodes, and in special-purpose circuits.
21 citations
Patent•
02 May 1985
TL;DR: In this paper, the authors proposed a method to attain detection and correction of a data error by means of a read Solomon code in a short time by providing a connecting means connecting function blocks and controlling the control means based on a timing signal.
Abstract: PURPOSE:To attain detection and correction of a data error by means of a read Solomon code in a short time by providing a connecting means connecting function blocks and controlling the control means based on a timing signal. CONSTITUTION:A syndrome operating section 21 calculates syndrome by accumulating sequentially each data applied via a data bus DABS2 and outputs the result to an internal bus INBS. A multiplication/division section 22 applies multiplication/division of the syndrome of a data outputted to the INBS. An adder/ subtractor section 23 applies addition/subtraction to the result of the multiplication/division section 22. Then a double error detection section 24 detects whether or not a double error exits based on an output of the adder/subtractor section 23. Moreover, a single circuit detection section 25 detects the data of the INBS as to whether or not a single error exists. A data correction section 26 corrects erroneous data based on the data applied via each INBS for the data applied via a DABS2. The operation of each functional block is controlled by a timing signal of a timing signal generating circuit 27.
Patent•
08 Jul 1985TL;DR: A multi-stage time division switch as discussed by the authors interconnects a plurality of processors that individually communicate over one or more channels at various signalling rates, and any processor may initiate a call and request that a connection be set by the switch.
Abstract: A multi-stage time division switch interconnects a plurality of processors that individually communicate over one or more channels at various signalling rates. Any processor may initiate a call and request that a connection be set by the switch. The switch assigns one or more time slots to the call and gathers or distributes data over the interconnecting channels through the utilization of polling techniques, thereby creating a virtual circuit through the combination of a time division switch and a polled communication line.
TL;DR: A fast algorithm to calculate the shortest distances between rods in a tridimensional space is presented that makes use of the division of rods.
TL;DR: (n log n) time is required to sort n integers using comparison, addition, subtraction, multiplication, division, indirect addressing, and mildly restricted truncation.
Abstract: ?(n log n) time is required to sort n integers using comparison, addition, subtraction, multiplication, division, indirect addressing, and mildly restricted truncation.
TL;DR: It is shown how analog integrated optical components can be assembled to design compact 10Cs for implementing both analog and digital algorithms for carrying out matrix multiplication.
Abstract: Optical systems are particularly adept at performing high speed multiplication and division, which are the operations required for matrix multiplication. Implementing these operations in an integrated optical circuit (IOC) has the additional advantage of compactness and manufacturability. In this paper it is shown how analog integrated optical components can be assembled to design compact 10Cs for implementing both analog and digital algorithms for carrying out matrix multiplication.
04 Jun 1985
TL;DR: In complex interval arithmetic three different types of intervals are introduced: rectangles, circles and circular sectors1, 4.
Abstract: In complex interval arithmetic three different types of intervals are introduced: rectangles, circles and circular sectors1, 4. The arithmetic operations for all three types of intervals should deliver the closest inclusion of the set of all possible values, i.e.
Patent•
08 Jul 1985TL;DR: In this paper, a bit-string address or a multi-bit character count is converted to a real word memory address by division by a constant value without reference to an arithmetic logic unit.
Abstract: A bit-string address or a multi-bit character count is converted to a real word memory address by division by a constant value. The division is accomplished without reference to an arithmetic logic unit. Division is accomplished by means of a look-up table stored in a ROM with the quotient and remainder values being stored in the ROM. The provided address, or dividend, values are used to address the ROM to determine the quotient and remainder values corresponding thereto. When the dividend values are of a dimension larger than can be divided by a single pass at the ROM, the division is accomplished by several successive passes through the ROM to provide a succession of partial quotient values. The resulting quotient and remainder values define the proper address for the computer memory.
Patent•
21 Jun 1985
TL;DR: In this article, the authors present a process for the energy-efficient operation of a distillation column, which is provided in a section with a longitudinal division executed in the form of a partition for repressing transverse mixing of liquid streams and vapour streams.
Abstract: Process for the energy-efficient operation of a distillation column, which is provided in a section with a longitudinal division - executed in the form of a partition - for repressing transverse mixing of liquid streams and vapour streams, in which - in the longitudinally divided region of the column, in the central region of the part, which is situated both above the feed point and above the take-off point of the side fraction or in the case of two take-off points above the topmost take-off point, temperature measurement points are arranged in pairs in the feed part and in the take-off part at the same height of the column and/or - in the longitudinally divided region of the column, in the central region of the part, which is situated both beneath the take-off point of the side fraction or in the case of two take-off points beneath the lowest take-off point, temperature measurement points are arranged in pairs in the feed part and in the take-off part at the same height of the column, and - by means of a temperature difference control, which is performed automatically or manually, the temperatures at the described measurement points are adjusted in such a way that the temperature in the feed part at the upper measurement point is lower than, or at most the same as, in the take-off point and the temperature in the feed part at the lower measurement point is higher than, or at least exactly as high as, in the take-off part and - the control operation used for the temperature difference control is the liquid division at the top end of the longitudinal division.
TL;DR: In this paper, it was shown that if D is unramified and C is an elliptic curve, then D contains a maximalk-algebraic splitting field, which enables us to give a new class of counter examples to the Hasse principle for division algebras.
Abstract: LetD be a division algebra with centerK a function field of a curveC overk;k(C)=K. We study the maximalk-algebraic subfields ofD. In Theorem 3.1 it is shown that ifD is unramified andC is an elliptic curve thenD contains ak-algebraic splitting field. This enables us to give a new class of counter examples to the Hasse principle for division algebras.
Patent•
21 Oct 1985
TL;DR: In this article, a pattern of weaknesses is provided for facilitating lengthwise division of heat exchanger fin arrays and the array may be attached to a uniform number of heat exchange elements to form a sub-assembly of uniform size.
Abstract: Heat exchanger fin (12) arrays of uniform width are made and are subsequently divided lengthwise into arrays of smaller width. A pattern (11) of weaknesses is provided for facilitating lengthwise division. Before such division, the array may be attached to a uniform number of heat exchange elements (13) to form a heat exchanger sub-assembly of uniform size. Lengthwise division then produces smaller sub-assemblies. The invention allows flowline production of heat exchangers of a wide variety of different sizes and utilizing fin forming and welding apparatus at or near full capacity.
Patent•
04 Sep 1985
TL;DR: In this article, the authors disclosed a hybrid optical wavelength division multiplexer for one-directional transmission, a hybrid OWD demultiplexer, and a hybrid OFDM for bidirectional transmission.
Abstract: There are disclosed a hybrid optical wavelength division multiplexer for one-directional transmission, a hybrid optical wavelength division demultiplexer for one-directional transmission, and a hybrid optical wavelength division multiplexer-demultiplexer for bidirectional transmission. The multiplexer-demultiplexer has light-emitting diodes and photodetectors integral with an optical wavelength division multiplexer-demultiplexer, with input and output ports comprising electric interfaces, with the result that there is required no optical fiber coupling system between the light-emitting diodes and photodetectors and the optical wavelength division multiplexer-demultiplexer. The hybrid multiplexer, demultiplexer, or the multiplexer-demultiplexer is small in size and light in weight The hybrid optical wavelength division multiplexer for one-directional transmission has collimator lenses for converting light of different wavelengths emitted from the light-emitting diodes into parallel beams of light, interference filters of different transmittivities for multiplexing the parallel beams of light, and another collimator lens for converging and coupling the modulated beams of light to the common-port optical fiber. The hybrid optical wavelength division demultiplexer for one-directional transmission demultiplexer light of different wavelengths from the common-port optical fiber, the demodulated light being detected by the photodetectors. The hybrid optical wavelength division multiplexer-demultiplexer for bidirectional transmission is a combination of the multiplexer and demultiplexer.
TL;DR: It is shown that, for a system of n band- limited signals, FDM and band-limited TDM are equivalent in the sense that one can be derived from the other by a simple linear transformation.
Abstract: On the basis of a general sampling formula it is shown that, for a system of n band-limited signals, FDM and band-limited TDM are equivalent in the sense that one can be derived from the other by a simple linear transformation. The transformation matrix is the same as for expanding an arbitrary polyphase system with n phases into its symmetric components. It is further shown that this equivalence also holds for nonideal sampling waveforms as they appear in certain multiplexing and demultiplexing systems used in practice.
TL;DR: In this article, the authors studied the existence of a continuous inverse to the multiplication mapping (/, g) defined on pairs of C°° functions on a manifold M. They proved a theorem adequate for application to the study of inverting the mapping (A, X), where X is a vector valued C° − function and A is a square matrix valued C"5 function on M whose determinant may vanish on a nowhere dense set.
Abstract: In this paper we study the question of the existence of a continuous inverse to the multiplication mapping (/, g) -» (fg, g) defined on pairs of C°° functions on a manifold M. Obviously, restrictions must be imposed on the domain of such an inverse. This leads us to the study of a modified problem: Find an appropriate domain for the inverse of (/, G) -» (/(/> ° G), G), where G is a C°° mapping of the manifold M into an analytic manifold N and p is a fixed analytic function on N. We prove a theorem adequate for application to the study of inverting the mapping (A, X) -» (A, AX), where X is a vector valued C°° function and A is a square matrix valued C"5 function on M whose determinant may vanish on a nowhere dense set.
Patent•
30 Apr 1985
TL;DR: In this article, an address table and an address surver are connected to the network to check errors such as double registration through the management division 14 while modifying the contents of the table 13.
Abstract: PURPOSE: To permit simple and correct address management by connecting an address table and an address surver in which an address management division locates to inform each work station of modification information from the address surver as an automatic notification or an answer for an enquiry. CONSTITUTION: The address table 13 and the address surver (a) having the address management division 14 are connected to the network to check errors such as double registration through the management division 14 while modifying the contents of the table 13. This modification information is noticed to a station (b) according to the automatic notification from the surver (a) or the enquiry from the address management division 4 of each work station (b). The table 3 is updated through the management division 4 for each station (b), allowing simple and correct address management of the local area network. COPYRIGHT: (C)1986,JPO&Japio
Patent•
21 Feb 1985
TL;DR: In this article, a teaching methodology provides the student with hand conformed symbols representative of the numbers 6 through 9 to solve problems in multiplication and division involving the numbers six through 9.
Abstract: A teaching methodology provides the student with hand conformed symbols representative of the numbers 6 through 9 Observation of these symbols permits the students to use their mastery of multiplication of the numbers 1 through 5 and 10 to solve problems in multiplication and division involving the numbers 6 through 9
TL;DR: In this paper, it is argued that Hamilton became aware of the fact that these consequences meant a serious limitation of algebra and that this awareness made him change his view, and that the associativity of multiplication and the possibility of division are consequences of Hamilton's view.
Journal Article•
01 Sep 1985-Transactions of the Institute of Electronics and Communication Engineers of Japan. Section E
Patent•
13 Jun 1985
TL;DR: In this paper, set values for a counter which can be preset therewith and which is reset step by step by the input cycle to be divided, are stored in a table (T).
Abstract: To implement an arbitrary division factor, set values for a counter which can be preset therewith and which is reset step by step by the input cycle to be divided, are stored in a table (T). Each time the initial setting is reached, a pulse of the output cycle occurs. At the same time, by appropriate addressing of the next memory position in the table, the set value held there for the counter (ET) is made ready and set. The process alternates between at least two set values, in different sequences. After a certain number of set values, the address sequence is repeated. This number corresponds to the lowest possible denominator of the fraction which represents the ratio of the input cycle to the output cycle with sufficiently close approximation.
TL;DR: An optical system, which divides two arrays in real time, has been conceived and demonstrated for the first time to the knowledge and analysis of the circuit and experimental results are presented.
Abstract: An optical system, which divides two arrays in real time, has been conceived and demonstrated for the first time to our knowledge. The pixel-by-pixel division, performed with analog signals, treats two incoherently illuminated arrays in parallel. The configuration used is a feedback arrangement with the data introduced in the loop through two optical image converters (liquid-crystal light valves in our experiments). Analysis of the circuit and experimental results are presented.