Showing papers on "Division (mathematics) published in 2004"

Computing shapley values, manipulating value division schemes, and checking core membership in multi-issue domains

Abstract: Coalition formation is a key problem in automated negotiation among self-interested agents. In order for coalition formation to be successful, a key question that must be answered is how the gains from cooperation are to be distributed. Various solution concepts have been proposed, but the computational questions around these solution concepts have received little attention. We study a concise representation of characteristic functions which allows for the agents to be concerned with a number of independent issues that each coalition of agents can address. For example, there may be a set of tasks that the capacity-unconstrained agents could undertake, where accomplishing a task generates a certain amount of value (possibly depending on how well the task is accomplished). Given this representation, we show how to quickly compute the Shapley value--a seminal value division scheme that distributes the gains from cooperation fairly in a certain sense. We then show that in (distributed) marginal-contribution based value division schemes, which are known to be vulnerable to manipulation of the order in which the agents are added to the coalition, this manipulation is NP-complete. Thus, computational complexity serves as a barrier to manipulating the joining order. Finally, we show that given a value division, determining whether some subcoalition has an incentive to break away (in which case we say the division is not in the core) is NP-complete. So, computational complexity serves to increase the stability of the coalition.

Wireless systems, methods and devices employing forward- and/or return-link carriers having different numbers of sub-band carriers

Abstract: Wireless Orthogonal Frequency Division Multiplexing and/or Orthogonal Frequency Division Multiple Access (OFDM/OFDMA) and/or Time-Frequency Division Multiplexing and/or Time-Frequency Division Multiple Access (T-FDM/T-FDMA) systems and methods include forward and return link carriers (112, 122) comprising number of sub-carrier groupings (110, 120) that are not identical. A return link carrier (122) may consist of fewer sub-band carriers than a forward link carrier (112) and the return link carrier (122) also may consist of a single sub-band carrier.

End point detection in time division multiplexed etch processes

Abstract: An improved method for determining endpoint of a time division multiplexed process by monitoring an identified region of a spectral emission of the process at a characteristic process frequency. The region is identified based upon the expected emission spectra of materials used during the time division multiplexed process. The characteristic process frequency is determined based upon the duration of the steps in the time division multiplexed process. Changes in the magnitude of the monitored spectra indicate the endpoint of processes in the time division multiplexed process and transitions between layers of materials.

Code division multiplexing commands on a code division multiplexed channel

Abstract: Techniques for efficient signaling to a plurality of mobile stations are disclosed. In one embodiment, each of a plurality of symbol streams are encoded with one of a plurality of covering sequences, the covered symbol streams are combined to form a Code Division Multiplexed (CDM) signal, and the CDM signal is further covered by another covering sequence for code division multiplexing with one or more additional signals for transmission to a remote station. In another embodiment, a plurality of CDM signals are formed from the covered symbol streams, and the plurality of CDM signals are Time Division Multiplexed (TDM) prior to the further covering. In other embodiments, decovering and demultiplexing is performed to recover one or more of the symbol streams. Various other aspects are also presented. These aspects have the benefit of providing efficient utilization of the reverse link capacity, accommodating varying requirements such as low-latency, high throughput or differing quality of service, and reducing forward and reverse link overhead for providing these benefits, thus avoiding excessive interference and increasing capacity.

Construction of secure random curves of genus 2 over prime fields

Abstract: For counting points of Jacobians of genus 2 curves defined over large prime fields, the best known method is a variant of Schoof's algorithm. We present several improvements on the algorithms described by Gaudry and Harley in 2000. In particular we rebuild the symmetry that had been broken by the use of Cantor's division polynomials and design a faster division by 2 and a division by 3. Combined with the algorithm by Matsuo, Chao and Tsujii, our implementation can count the points on a Jacobian of size 164 bits within about one week on a PC.

Construction of secure random curves of genus 2 over prime fields

Abstract: For counting points of Jacobians of genus 2 curves defined over large prime fields, the best known method is a variant of Schoof's algorithm. We present several improvements on the algorithms described by Gaudry and Harley in 2000. In particular we rebuild the symmetry that had been broken by the use of Cantor's division polynomials and design a faster division by 2 and a division by 3. Combined with the algorithm by Matsuo, Chao and Tsujii, our implementation can count the points on a Jacobian of size 164 bits within about one week on a PC.

Teaching mathematics to deaf children

Abstract: Preface.Acknowledgements.Conventions used for descriptions of interviews.Chapter 1 Introduction.Chapter 2 Counting and its creative uses.Chapter 3 Additive reasoning: connecting addition and subtraction.Chapter 4 Reading and writing numbers.Chapter 5 Multiplicative reasoning: connecting multiplication, division and many other mathematical ideas.Chapter 6 Teaching mathematics to deaf children: how the story began and the happy ending.References.Index.

Software Division and Square Root Using Goldschmidt's Algorithms

Abstract: Goldschmidt's Algorithms for division and square root are often characterized as being useful for hardware implementation, and lacking self-correction. A reexam- ination of these algorithms show that there are good software counterparts that retain the speed advantage of Goldschmidt's Algorithm over the Newton-Raphson iteration. A final step is needed, however, to get the last bit rounded correctly.

Fixing device and image forming apparatus

Abstract: PROBLEM TO BE SOLVED: To reduce the occurrence of overshoot of a fixing roller and a pressure roller in an image forming apparatus, such as a copying machine and a printer, and a fixing device applied to it. SOLUTION: The temperature of a roller surface (Ta) is detected at the start of copying to compare it with a temperature T1 previously set, and when Ta>T1, time division control is immediately started, for example, and when Ta≤T1, the time division control is performed, for example, after keeping a heater on as is done conventionally, is performed. The lowest point of the temperature of the roller surface is detected in the state that the heater is kept on continuously, and the time division control is started when the temperature rises by δ°C from the lowest point. COPYRIGHT: (C)2004,JPO

Programmable frequency divider

Abstract: Various apparatus and method embodiments are disclosed. One apparatus embodiment, among others, comprises a frequency divider configured to provide an output signal having a period equal to a period of a clock signal multiplied by a programming division ratio, the frequency divider comprising a plurality of edge-triggered storage elements arranged in at least one loop, wherein each of the storage elements has a state, and a clock input, and wherein the state of each storage element is determined responsive to a transition of the clock input, the state, or the inverse thereof, of one or more previous storage elements in the loop, a characteristic of the division ratio, and the previous state, or the inverse thereof, of the storage element, and the output signal is derived from the state, or the inverse thereof, of at least one of the storage elements in the loop, a circuit for determining the number of storage elements in the loop responsive to the desired division ratio, and wherein the loop is configured such that there are odd number loop inversions within the loop, the loop inversions are implemented through inverters, and each of the storage elements is configured to enter a power save mode responsive to assertion of a power control signal.

How to cope with division problems under interval uncertainty of claims

Abstract: The paper deals with division situations where individual claims can vary within closed intervals. Uncertainty of claims is removed by weighting in a consistent way the upper and lower bounds of the claim intervals. Deterministic division problems with the obtained compromise claims are then considered and classical division rules from the bankruptcy literature are used to generate several procedures leading to efficient and reasonable rules for division problems under interval uncertainty of claims.

Program and method for screen display control, and portable information device

Abstract: An operation for changing a screen division ratio when one screen is divided into two is facilitated. A display screen of a portable information device is divided into two by a division bar 126 into a heading list display field 128 and a detailed display field 130 for displaying the text of an item selected from the heading list. When the user inputs the right or left direction with the direction key 110, the screen display control program moves the dividing bar 126 to the right or left one step accordingly. As a result, the user can easily change the screen division ratio with only one hand. [Selection] Figure 5

Spectral division methods for block generalized Schur decompositions

Abstract: We provide a different perspective of the spectral division methods for block generalized Schur decompositions of matrix pairs. The new approach exposes more algebraic structures of the successive matrix pairs in the spectral division iterations and reveals some potential computational difficulties. We present modified algorithms to reduce the arithmetic cost by nearly 50%, remove inconsistency in spectral subspace extraction from different sides (left and right), and improve the accuracy of subspaces. In application problems that only require a single-sided deflating subspace, our algorithms can be used to obtain a posteriori estimates on the backward accuracy of the computed subspaces with little extra cost.

System and method for compressing data in a communications environment

Abstract: A method for compressing data is provided that includes accumulating a plurality of bits associated with a communications flow and determining whether one or more of the bits correspond to a silence signal associated with a time division multiplexed (TDM) circuit that facilitates propagation of the flow. A predefined silence pattern may be communicated, in place of one or more of the bits, to a next destination when it is determined that one or more of the bits correspond to the silence signal.

Two-dimensional Real Division Algebras Revisited

Abstract: A new classification of two-dimensional real division algebras is given. We also obtain a new classification of commutative real division algebras.

Manufacturing method of semiconductor device and semiconductor device

Abstract: In a dividing method according to the present invention, a wiring board formed of ceramic is forced up (upper swing) by a lower clamp claw of a clamper, and some of a protruded wiring board portion protruding from a conveying chute is pressed against a support body to perform a first division under bending stress. Thereafter, the upward-located clamper is rotatably swung (lower swing) downward to allow an upper clamp claw to press down the protruded wiring board portion, thereby performing a reverse division at the first division section again as a second division. Since the second division allows a tensile force to act on a remaining and thin non-divided resin portion, the non-divided resin portion is torn off. Thus, the perfect division is enabled. Fractionalizing is done by a one-row division and an individual division so that each semiconductor device is formed.

Method for image coding and decoding

Abstract: PROBLEM TO BE SOLVED: To provide a moving image coding method and a moving image decoding method capable of performing motion compensation taking account of a moving object boundary, even when coding is performed by dividing a screen into a macro blocks. SOLUTION: A division controller 102 includes a plurality of methods for dividing a macro block, including a method for dividing the macro block with an arbitrary line segment. The division controller 102 successively instructs the plurality of division method to a divider 103. In the divider 103, the macro block is divided into division areas according to the instructed method. A motion detector 104 performs motion detection for each division area, so as to obtain motion vectors and evaluation values. The division controller 102 encodes by dividing the macro block using a division method by which the evaluation value obtained from the motion detector 103 becomes optimal. The above division method is described in a code sequence by a division method describer 114. COPYRIGHT: (C)2006,JPO&NCIPI

Phase-error-compensation techniques in a fractional-N PLL frequency synthesizer

Abstract: A fractional-type phase-locked loop circuit, for synthesising an output signal multiplying a frequency of a reference signal by a selected fractional conversion factor, includes a frequency divider for generating a feedback signal dividing the frequency of the output signal by a frequency division factor selectable among at least two different integer-value division factors, and frequency divider control means for causing the frequency division factor to vary between the at least two integer-value division factors in a pre-defined number of cycles, thereby an average frequency division factor over said pre-defined number of cycles has a fractional value. Means are provided for compensating a phase error introduced by the frequency divider on the basis of a value indicative of the phase error obtained from said frequency divider control means. The phase-error compensation means includes rounding means, receiving an input binary code with a first number of binary digits, indicative of the phase error value, and providing an output binary code, with a second number of binary digits lower than the first number of digits, defining a rounded phase error value.

Delta-sigma type fraction division pll synthesizer

Abstract: It is possible to obtain a low spurious of a delta-sigma type fraction division PLL synthesizer. The delta-sigma type fraction division PLL synthesizer includes a first and a second L-value accumulator (31, 30), and an adder (29) for calculating a difference of overflow signals (16, 17) of the first and the second L-value accumulator (31, 30), so that the output of the adder (29) switches the division ratio of a variable divider (2) having a division ratio which can be switched to M, M+1, M-1. Thus, frequency of spurious generated by an operation noise of the first and the second L-value accumulator (31, 30) is shifted to a higher frequency component than the prior art and removed by a loop filter (low pass filter) (5).

Image display control method, apparatus for controlling image display, and program for controlling image display

Abstract: When a whole image having a large area or high resolution is displayed, the boundary lines are made less noticeable with a small amount of calculation by displaying partial images by a plurality of image projection units. An apparatus has a division position creation unit to create division positions such that the division positions vary at given timings, an image division unit to divide images at the division positions created by the division position creation unit, and plural image projection units PJ 1 , PJ 2 , . . . , PJN to display the images divided by the image division unit.

Heat transfer fin

Abstract: PROBLEM TO BE SOLVED: To improve heat transfer performance of a heat transfer fin by forming a division hole for dividing a ridge part of the heat transfer fin, and to reduce pressure loss. SOLUTION: In this heat transfer fin used for a heat exchanger, ridge parts 2 and bottom walls 6 are alternately formed one-by-one in a direction perpendicular to a flowing direction A1 of a fluid. Each ridge part 2 comprises a top wall 3 and a pair of side walls 4; two or more division holes 10 of a predetermined number of two or more columns R for dividing each ridge part 2 and each bottom wall 6 into three or more in the flowing direction A1 are formed in the heat transfer fin; and each division hole 10 comprises one long hole continuing over each ridge part 2 and each bottom wall 6. The division hole 10 in each column R comprises: an intermediate division hole 10b formed in intermediate ridge parts 2b, and end division holes 10a formed only in inner side walls 4b of each end ridge parts 2a. A bypass passage 33 reduced in pressure loss as compared with a main passage 30 formed by the intermediate ridge part 2b and the bottom wall 6 is formed by each end ridge part 2a. COPYRIGHT: (C)2006,JPO&NCIPI

An algorithm and hardware architecture for integrated modular division and multiplication in GF(p) and GF(2/sup n/)

Abstract: This work presents an algorithm and architecture that integrates modular division and multiplication in both GF(p) and GF(2/sup n/) fields (unified). The algorithm is based on the extended binary GCD algorithm for modular division and on the Montgomery's method for modular multiplication. For the division operation, the proposed algorithm uses a counter to keep track of the difference between two field elements and this way eliminate the need for comparisons which are usually expensive and time-consuming. The proposed architecture efficiently supports all the operations in the algorithm and uses carry-save unified adders for reduced critical path delay, making the proposed architecture faster than other previously proposed designs. Experimental results using synthesis for AMI 0.5 /spl mu/m CMOS technology are shown and compared with other dividers and multipliers.

Area division analog resistance film touch panel

Abstract: PROBLEM TO BE SOLVED: To solve problems caused by increase in the number of wiring patterns due to area division for improving reliability in an area division analog resistance film touch panel. SOLUTION: On a glass plate 111, wiring patterns 119-1 to 119-4 are formed between dispersed relay electrodes 118-1 to 118-4 and aligned external connection terminals 120-1 to 120-4. Four upper division transparent conductive film parts 133-1 to 133-4 on the lower face of a film 130 are connected to the relay electrodes 118-1 to 118-4 individually. No wiring pattern is formed on the film 130. COPYRIGHT: (C)2006,JPO&NCIPI

File management device, network system, file management method and program

Abstract: PROBLEM TO BE SOLVED: To realize an inexpensive storage management system adaptable even to the increase of data quantity during an operation without any increase of a backup time. SOLUTION: This file management device for virtually managing a storage system constituted by combining a plurality of types of storage media whose physical characteristics are different as a single storage is provided with: a hierarchy management part (a) for performing the unitary management of the storage region of each storage medium configuring the storage system by logical hierarchy division for each project; and a movement managing part (b) for moving a project file from the high order division to low order division of the hierarchy division according to movement conditions predetermined for each project. COPYRIGHT: (C)2006,JPO&NCIPI

Accelerating correctly rounded floating-point division when the divisor is known in advance

Abstract: We present techniques for accelerating the floating-point computation of x/y when y is known before x. The proposed algorithms are oriented toward architectures with available fused-mac operations. The goal is to get exactly the same result as with usual division with rounding to nearest. It is known that the advanced computation of 1/y allows performing correctly rounded division in one multiplication plus two fused-macs. We show algorithms that reduce this latency to one multiplication and one fused-mac. This is achieved if a precision of at least n+1 bits is available, where n is the number of mantissa bits in the target format, or if y satisfies some properties that can be easily checked at compile-time. This requires a double-word approximation of 1/y (we also show how to get it). Compilers to accelerate some numerical programs without loss of accuracy can use these techniques.

Image processing method, image processing apparatus and computer-readable storage medium

Abstract: An image processing apparatus is provided with a process unit to carry out a resolution conversion process and an image division process with respect to an input image, and a control unit to control a division number of the image division process depending on a size of an image display region and a resolution after the resolution conversion process. The division number indicates a number of divided image portions into which the input image is divided into by the image division process. The control unit may control the division number of the image division process depending on an image size of the input image in addition to the size of the image display region and the resolution after the resolution conversion process.