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Showing papers on "Division (mathematics) published in 2007"


Patent
06 Dec 2007
TL;DR: In this article, an apparatus, system and method for storage space recovery in solid-state storage 110 is described, where the data packets are sequentially stored by order of processing.
Abstract: An apparatus, system and method are disclosed for storage space recovery in solid-state storage 110. A sequential storage module 802 sequentially writes data packets in a storage division. The storage division includes a portion of a solid-state storage 110. The data packets are derived from an object. The data packets are sequentially stored by order of processing. A storage division.selection module 804 selects a storage division for recovery. A data recovery module 806 reads valid data packets from the storage division selected for recovery, queues the valid data packets with other data packets to be written sequentially, and updates an index with a new physical address of the valid data. The index includes a mapping of physical addresses of data packets to object identifiers. A storage division recovery module 808 marks the storage division selected for recovery as available for sequentially written data packets in response to completing copying valid data from the storage division.

90 citations


Patent
04 Jan 2007
TL;DR: In this paper, an apparatus, method, and medium for providing an area division unit having a touch pad function, and more particularly an apparatus and method for providing a touchpad function which are capable of dividing a display screen of a display device into one or more display areas using an area-division unit equipped with a transparent touch pad and allowing a user to choose and execute one of a plurality of menu items that are displayed on the display screen and are seen through the transparent touchpad.
Abstract: Provided are an apparatus, method, and medium for providing an area division unit having a touch pad function, and more particularly, an apparatus and method for providing an area division unit having a touch pad function which are capable of dividing a display screen of a display device into one or more display areas using an area division unit equipped with a transparent touch pad and allowing a user to choose and execute one of a plurality of menu items that are displayed on the display screen and are seen through the transparent touch pad. The apparatus includes an area division unit which can be moved in a predetermined direction by a user and can thus divide a display screen into one or more display areas, the display screen which is divided into one or more display areas according to the location of the area division unit, and a touch pad which is attached on the top surface of the area division unit and allows the user to choose and execute one of a plurality of icons displayed on the display screen.

79 citations


Journal ArticleDOI
TL;DR: The most significant slice of the recurrence, which includes the selection function, is implemented in radix-2, avoiding the additional delay introduced by the Radix-10 carry-save additions and allowing the balancing of the paths to reduce the cycle delay.
Abstract: In this work, we present a radix-10 division unit that is based on the digit-recurrence algorithm. The previous decimal division designs do not include recent developments in the theory and practice of this type of algorithm, which were developed for radix-2k dividers. In addition to the adaptation of these features, the radix-10 quotient digit is decomposed into a radix-2 digit and a radix-5 digit in such a way that only five and two times the divisor are required in the recurrence. Moreover, the most significant slice of the recurrence, which includes the selection function, is implemented in radix-2, avoiding the additional delay introduced by the radix-10 carry-save additions and allowing the balancing of the paths to reduce the cycle delay. The results of the implementation of the proposed radix-10 division unit show that its latency is close to that of radix-16 division units (comparable dynamic range of significant) and it has a shorter latency than a radix-10 unit based on the Newton-Raphson approximation

50 citations


Patent
Jun Makino1
25 Apr 2007
TL;DR: In this article, the setting unit sets at least one of the division position of a slice and the number of divisions of the slice so that slice boundaries differ from each other between adjacent pictures.
Abstract: An image coding apparatus includes: a division unit configured to divide a coding target picture included in an input video signal into a plurality of slices each including one or more data blocks; a coding unit configured to code the video signal in a unit of the slice divided by the division unit; and a setting unit configured to set at least one of a division position of the slice and a number of divisions of the slice, to the division unit. In the image coding apparatus, the setting unit sets at least one of the division position of the slice and the number of divisions of the slice so that slice boundaries differ from each other between adjacent pictures.

48 citations


Patent
25 Apr 2007
TL;DR: In this paper, a method of configuring a sub-slot having a layer-modulated multi-user packet (MUP) is disclosed, which comprises modulating symbols associated with a first layer by using non-layered modulation scheme, and modulating symbol associated with second layer and a third layer using a different layered-modulation scheme.
Abstract: A method of configuring a sub-slot having a layer-modulated multi-user packet (MUP) is disclosed. More specifically, the method comprises modulating symbols associated with a first layer by using non-layered modulation scheme, and modulating symbols associated with a second layer and a third layer using a different layered-modulation scheme. Here, the symbols associated with the second layer and the third layer are multiplexed by any one of an orthogonal frequency division multiplexing, a code division multiplexing, a multi-carrier code division multiplexing, or a time division multiplexing.

44 citations


Journal Article
TL;DR: In this paper, prospective teachers were introduced to an alternative model for representation of fractions based on a rate or ratio model of division involving whole numbers, which appeared to be associated with difficulty in multiplicative thinking.
Abstract: The purpose of this study was to determine prospective teachers’ knowledge about the concept of division. One focus of interest was whether the prospective teachers were able to represent division of fractions. The participants were introduced to an alternative model for representation of fractions based on a rate or ratio model of division involving whole numbers. A second focus of interest was whether the prospective teachers would be able to apply this model to problems of division of fractions. The findings revealed that the prospective teachers’ successfully represented division of whole numbers using models of fair sharing and, to a lesser extent, repeated subtraction. However, they had difficulty in successfully representing division of fractions. Some improvement was observed in participants’ performance in attempts to represent division of fractions after introduction of the rate/ratio model. However the prospective teachers often used the rate or ratio model mistakenly where the situations were not appropriate for the model, which appeared to be associated with difficulty in multiplicative thinking.

40 citations


Book ChapterDOI
25 Jun 2007
TL;DR: It is proved that this model characterises P and logspace uniform families are introduced, which characterises the power of a class of membrane systems that fall under the so-called P conjecture for membrane systems.
Abstract: In this paper we introduce a variant of membrane systems with elementary division and without charges. We allow only elementary division where the resulting membranes are identical; we refer to this using the biological term symmetric division. We prove that this model characterises P and introduce logspace uniform families. This result characterises the power of a class of membrane systems that fall under the so-called P conjecture for membrane systems.

32 citations


Patent
21 Aug 2007
TL;DR: In this article, a method of manufacturing the image display device that makes it possible to form pixels with a smaller number of sub-pixels as compared with a case where one pixel is formed so as to separately include one each of subpixels of three colors of R, G, and B, and make full-color display by making the sub pixels emit light by time division.
Abstract: The present invention relates to an image display device and a method of manufacturing the image display device that make it possible to form pixels with a smaller number of sub-pixels as compared with a case where one pixel is formed so as to separately include one each of sub-pixels of three colors of R, G, and B, and make full-color display by making the sub-pixels emit light by time division. The present invention can provide an image display device that makes it possible to reduce the number of sub-pixels and form pixels at a high density by sharing respective sub-pixels between pixels and displaying the sub-pixels by time division and thus realize high picture quality and reduction in the number of parts.

30 citations


Patent
Jung Ah Lee1
19 Oct 2007
TL;DR: In this article, a method and apparatus for multiplexing code division and frequency division transmissions is described, which includes accessing at least one first symbol and at least two second symbols, encoding the first symbol according to a frequency division protocol and encoding the second symbol using a coding sequence having a cyclic correlation properly.
Abstract: The present invention provides a method and apparatus for multiplexing code division and frequency division transmissions. One embodiment of the method includes accessing at least one first symbol and at least one second symbol, encoding the at least one first symbol according to a frequency division protocol, and encoding the at least one second symbol using a coding sequence having a cyclic correlation properly. The method also includes transmitting a radiofrequency signal indicative of the at least one encoded first symbol and the at least one encoded second symbol.

30 citations


Patent
Tomoyuki Haga1, Hideki Matsushima1, Takayuki Ito1, Manabu Maeda1, Taichi Sato1 
07 Nov 2007
TL;DR: In this article, the authors present a falsification detection method for a program loaded into a memory at high speed without deterioration of reliability, where a dividing size deciding means (12) decides a block division size on the basis of random number information prior to loading the program, a dividing means (13) divides the program into block data with the block-division size, a first converting means (14) converts the bock data into authentication temporary data that are not bigger than the block division by carrying out a logical operation, and a second converting mean (15) carries out the
Abstract: It is an object to carry out falsification detection processing for a program loaded into a memory at high speed without deterioration of reliability. With respect to a program subjected to falsification detection, a dividing size deciding means (12) decides a block division size on the basis of random number information prior to loading the program, a dividing means (13) divides the program into block data with the block division size, a first converting means (14) converts the bock data into authentication temporary data that are not bigger than the block division size by carrying out a logical operation, and a second converting means (15) carries out the second conversion processing of the authentication temporary data to calculate authentication data and stores the authentication data together with the block division size. After loading the program, the block division and the first and second conversions are carried out for the loaded program by means of the stored block division size, so that comparison data are calculated. The comparison of the authentication data with the comparison data detects program falsification.

30 citations


Proceedings ArticleDOI
07 Jul 2007
TL;DR: This paper describes the implementation of Division Blocks and some of the ways that it can support experiments on the open-ended evolution of development, form, and behavior, and presents preliminary data from simulations, demonstrating the reliable emergence of cooperative resource transactions.
Abstract: We present a new framework for artificial life involving physically simulated, three-dimensional blocks called Division Blocks. Division Blocks can grow and shrink, divide and form joints, exert forces on joints, and exchange resources. They are controlled by recurrent neural networks that evolve, along with the blocks, by natural selection. Division Blocks are simulated in an environment in which energy is approximately conserved, and in which all energy derives ultimately from a simulated sun via photosynthesis. In this paper we describe our implementation of Division Blocks and some of the ways that it can support experiments on the open-ended evolution of development, form, and behavior. We also present preliminary data from simulations, demonstrating the reliable emergence of cooperative resource transactions.

Patent
24 May 2007
TL;DR: A radio communication system for covering a service area with a plurality of cells and dividing and allocating a system band of each cell to a mobile station has a division pattern server and a base station.
Abstract: A radio communication system for covering a service area with a plurality of cells and dividing and allocating a system band of each cell to a mobile station has a division pattern server and a base station. The division pattern server decides a division pattern indicating a pattern of dividing the system band which is commonly applied to a predetermined range to which the plurality of cells belong. The base station divides the system band into two or more bands, using the division pattern decided by the division pattern server, and allocates the band as a pilot transmission frequency band to the mobile station accommodated in the cell constructed by the base station. (Fig. 3)

Journal ArticleDOI
01 Oct 2007
TL;DR: Two lines of extension of the division operator are studied and one of the goals is to point out those which ensure that the resulting relation is a quotient (in reference to the characterization of the quotient of two integers).
Abstract: The role and properties of the division are very well known in the context of queries addressed to regular relational databases. However, Boolean queries whose result is expressed in terms of all or nothing may turn out to be too limited to answer certain user needs and it is desirable to envisage extended queries by introducing preferences in the conditions. In this paper, two lines of extension of the division operator are studied: (i) operand relations of the division are fuzzy relations (i.e., they are made of weighted tuples) and (ii) the universal quantifier underlying the division is weakened. Various approaches to these extensions can be considered and one of our goals is to point out those which ensure that the resulting relation is a quotient (in reference to the characterization of the quotient of two integers). So doing, a sound semantics for the extended division is guaranteed.

Patent
30 Oct 2007
TL;DR: In this paper, a lattice dividing unit determines lattice lines to divide parameters of all points of a picture at every division and supplies distortion correction parameters (distortion correction coordinates) on the lattice points to a distortion correction memory (not shown).
Abstract: A lattice dividing unit determines lattice lines to divide parameters of all points of a picture at every division and supplies distortion correction parameters (distortion correction coordinates) on the lattice points to a distortion correction memory (not shown). A polynomial of degree n coefficient deriving unit expresses all distortion correction coordinates on each lattice line in the form of a function relative to positions on lattice lines and approximates the distortion correction coordinates by desired division polynomial of degree n. Further, a sample point deriving unit compresses distortion correction parameters based upon the division polynomial of degree n obtained from the polynomial of degree n coefficient deriving unit. In the derived division polynomial of degree n, internal points which result from dividing both ends of the division polynomial of degree n by n is supplied to the distortion correction memory as new distortion correction parameters (approximated distortion correction coordinates). Thus, a memory capacity of a required memory can be reduced in the image processing for correcting distortion of an image.

Patent
28 Jun 2007
TL;DR: A discharge lamp lighting apparatus includes a switch circuit for DC/AC converting, a discharge lamp connected to a secondary winding of a transformer, a current detector detecting an AC output current of the discharge lamp, an error amplifier outputting an error signal to a detected current, and a control circuit generating control signals that turn on/off the switching elements in such a way as to control the output current at a predetermined value as discussed by the authors.
Abstract: A discharge lamp lighting apparatus includes a switch circuit for DC/AC converting, a discharge lamp connected to a secondary winding of a transformer, a current detector detecting an AC output current of the discharge lamp, an error amplifier outputting an error signal to a detected current, a control circuit generating control signals that turn on/off the switching elements in such a way as to control the AC output current at a predetermined value, and a time division signal generator generating a time division signal at the start of an ON/OFF operation of the switching elements, wherein the time division signal delays a change in a burst dimming signal or has a predetermined inclination on the burst dimming signal The error amplifier changes the error signal according to the time division signal from the time division signal generator

Patent
04 Jul 2007
TL;DR: In this article, a region setter is proposed to reduce a load of processing for detecting a plurality of objects by using an image, based on the position of a forward object of its own vehicle detected by a radar device.
Abstract: PROBLEM TO BE SOLVED: To reduce a load of processing for detecting a plurality of objects by use of an image SOLUTION: A region setter 131 sets two division regions of an obstacle region where an existence of a forward vehicle is supposed in a processed image and a road surface region where an existence of a traffic lane is supposed, based on a position of a forward object of its own vehicle detected by a radar device 112 An image former 132 adjusts a dynamic range and a resolution of a forward image captured by a camera 111 for each division region based on a forward brightness of the vehicle to form the processed image A traffic lane detector 141 detects the traffic lane based on an image inside the road surface region of the processed image, and a vehicle detector 142 detects the forward vehicle based on an image inside the obstacle region of the processed image The present invention is applicable to an on-board image processor COPYRIGHT: (C)2009,JPO&INPIT

Patent
01 Feb 2007
TL;DR: In this paper, a method of compensating a signal of an image of one screen for distortions in the horizontal and/or vertical directions of a screen of the image is presented.
Abstract: Disclosed herein is a method of compensating a signal of an image of one screen for distortions in the horizontal and/or vertical directions of a screen of the image. The method includes the steps of: dividing one screen area of the image into a plurality of picture divisions; and detecting a movement vector of the image for each particular one of the picture divisions from information on a difference in image between the particular picture division on one of two screens and the particular division on the other of the two screens. The method further includes the steps of: finding a difference in the detected movement vector between any specific picture division and a picture division adjacent to the specific picture division in order to detect a velocity of a change in image distortion for the specific picture division; and compensating the image for a distortion for each of the picture divisions on the basis of a velocity detected for each of the picture divisions as the velocity of a change in image distortion.

Patent
Kwang-Jin Lee1, Woo-Yeong Cho1
24 Aug 2007
TL;DR: In a phase change random access memory (PRAM) device, data is programmed in selected memory cells using a plurality of program loops as discussed by the authors, where each program loop performs division program operations for cell groups.
Abstract: In a phase change random access memory (PRAM) device, data is programmed in selected memory cells using a plurality of program loops. In each program loop, division program operations for cell groups including the selected memory cells are performed in consecutive timeslots.

Patent
19 Dec 2007
TL;DR: In this article, a matrix multiplication parallel calculation system based on multi-FPGA is prepared as utilizing FPGA as processing unit to finalize dense matrix multiplication calculation and to raise sparse matrix multiplication computation function.
Abstract: A matrix multiplication parallel calculation system based on multi-FPGA is prepared as utilizing FPGA as processing unit to finalize dense matrix multiplication calculation and to raise sparse matrix multiplication calculation function, utilizing Ethernet and star shaped topology structure to form master-slave distributed FPGA calculation system, utilizing Ethernet multicast-sending mode to carry out data multicast-sending to processing unit requiring the same data and utilizing parallel algorithm based on line one-dimensional division output matrix to carry out matrix multiplication parallel calculation for decreasing communication overhead of system.

Journal ArticleDOI
TL;DR: This paper investigates the implementation of division in SET technology using a novel computation paradigm called electron counting, and proposes a division scheme based on the computation of periodic symmetric functions.
Abstract: Emerging nanotechnologies, like single-electron tunneling (SET) technology, possesses properties that are fundamentally different from what CMOS offers to engineers. This opens up avenues for novel computational paradigms, which can perform arithmetic operations efficiently by utilizing these new available properties. In this line of reasoning, in this paper we investigate the implementation of division in SET technology using a novel computation paradigm called electron counting. First, we present two schemes that are based on sequential approximation of the quotient. The first scheme is basic and simple to build, but suffers from overshoot and has a rather large delay. The second scheme, which is a modification of the first one, has a delay logarithmic in the quotient magnitude and the simulation results we present indicate that this scheme works correctly. Finally, we propose a division scheme based on the computation of periodic symmetric functions. Although this scheme requires a varactor for which no nanoscale implementation yet exists and which cannot be directly simulated, it demonstrates the possibilities that nanotechnology, and specifically SET technology, potentially offers as it has a time complexity of O(1).

Patent
30 Mar 2007
TL;DR: In this article, a traffic lane division line information detecting device, a travel traffic lane maintaining device and a traffic line division line recognizing method, for improving white line recognizing accuracy by using an image photographed by an on-vehicle camera for photographing the side, when the white line recognition accuracy is not sufficient in an onvehicle cameras for capturing the front.
Abstract: PROBLEM TO BE SOLVED: To provide a traffic lane division line information detecting device, a travel traffic lane maintaining device and a traffic lane division line recognizing method, for improving white line recognizing accuracy by using an image photographed by an on-vehicle camera for photographing the side, when the white line recognizing accuracy is not sufficient in an on-vehicle camera for photographing the front. SOLUTION: This traffic lane division line information detecting device 10 outputs traffic lane division line information (for example, white line information) by recognizing a traffic lane division line (for example, a white line) for partitioning a travel lane for allowing a vehicle to travel, and is characterized by having a front camera 11 photographing a front image in front of the vehicle, a side camera 20 photographing a side image on the side of and under the vehicle, a wiper operation state detecting means 18 detecting an operation state of a wiper, and a traffic lane division line information loading means 25 detecting the traffic lane division line information by changing weighting of the front image and the side image in response to the operation state of the wiper detected by the wiper operation state detecting means. COPYRIGHT: (C)2009,JPO&INPIT

Patent
17 Aug 2007
TL;DR: In this article, a method for operating a display apparatus in which one source output of a source driver is connected with first to N-th data lines through first-to-N-th time division switches is presented.
Abstract: A method is provided for operating a display apparatus in which one source output of a source driver is connected with first to N-th data lines through first to N-th time division switches, which method includes: driving a first pixel positioned in a first horizontal line and connected with one of the first to N-th data lines, by feeding a first drive voltage to the one of the first to N-th data lines from the one source output with associated one of the first to N-th time division switches; and driving a second pixel positioned in a second horizontal line next to the first horizontal line and connected with the one of the first to N-th data lines, by feeding a second drive voltage to the one of the first to N-th data lines from the source output with associated one of the first to N-th time division switches. The associated one time division switch is kept turned on during a time period from a start time of the driving the first pixel to a start time of the driving the second pixel.

Patent
09 May 2007
TL;DR: In this paper, the authors proposed a coexistence of the time division-synchronization code division multi-address TD-SCDMA time-division duplex system with the common land wireless access UTRA TDD time division duplex systems, which deploys neighborly and uses the neighbor frequency according to the slot configuration of two systems.
Abstract: When co-existence of the time division-synchronization code division multi-address TD-SCDMA time-division duplex system with the common land wireless access UTRA TDD time division duplex system is needed, configuring the slot of UTRA TDD, which deploys neighborly and uses the neighbor frequency according to the slot configuration of TD-SCDMA system in order to ensure the consistent between the up going and down going slots of two systems. Therefore, the invention reduces the mutual interfere between systems and raises the system function.

Proceedings ArticleDOI
01 Aug 2007
TL;DR: A fused floating-point multiply/divide/square root unit based on Taylor-series expansion algorithm is proposed to incorporate the square root function with little area and latency overhead since Taylor's theorem enables us to compute approximations for many well-known functions with very similar forms.
Abstract: Hardware support for floating-point (FP) arithmetic is a mandatory feature of modern microprocessor design. Although division and square root are relatively infrequent operations in traditional general-purpose applications, they are indispensable and becoming increasingly important in many modern applications. Therefore, overall performance can be greatly affected by the algorithms and the implementations used for designing FP-div and FP-sqrt units. In this paper, a fused floating-point multiply/divide/square root unit based on Taylor-series expansion algorithm is proposed. We extended an existing multiply/divide fused unit to incorporate the square root function with little area and latency overhead since Taylor's theorem enables us to compute approximations for many well-known functions with very similar forms. The proposed arithmetic unit exhibits a reasonably good area- performance balance.

Proceedings ArticleDOI
01 Oct 2007
TL;DR: This paper presents and compares two division algorithms for an times86 microprocessor, which utilizes a rectangular multiplier that is optimized for multimedia applications and provides correctly rounded results for IEEE 754 single, double, and extended precision floating-point numbers.
Abstract: Floating-point division is an important operation in scientific computing and multimedia applications. This paper presents and compares two division algorithms for an times86 microprocessor, which utilizes a rectangular multiplier that is optimized for multimedia applications. The proposed division algorithms are based on Goldschmidt's division algorithm and provide correctly rounded results for IEEE 754 single, double, and extended precision floating-point numbers. Compared to a previous Goldschmidt division algorithm, the fastest proposed algorithm requires 25% to 37% fewer cycles, while utilizing a multiplier that is roughly 2.5 times smaller.

Patent
19 Dec 2007
TL;DR: In this article, a method and system are described for performing an arithmetic operation such as multiplication or division of a fixed point variable measured at runtime by a floating point constant known at compile-time.
Abstract: A method and system are described for performing an arithmetic operation such as multiplication or division of a fixed point variable measured at runtime by a floating point constant known at compile-time. The floating point constant is converted into a mantissa and a base-2 exponent at compile-time. The mantissa and exponent are preferably combined into a single unit (a word) of memory. At runtime either single multiplication and accumulation or matrix multiplication and accumulation is preferably achieved by a microprocessor or DSP instruction designed to use the mantissa-exponent pairs stored in a word of memory. The microprocessor instruction multiplies a fixed point runtime variable x by the mantissa and the result is shifted to the right or left as indicated by the exponent, which is preferably a 2's complement number. The complete instruction sequence to perform the multiplication can be made reentrant and can be pipelined.

Patent
31 Aug 2007
TL;DR: In this paper, the authors proposed a substrate dividing method capable of reducing the number of scannings of laser beams by diffracting the laser beams with a diffraction optical element 13 and a modified area 1 is formed in a condensing area.
Abstract: PROBLEM TO BE SOLVED: To provide a substrate dividing method capable of reducing the number of scannings of laser beams. SOLUTION: When dividing a division object substrate 4 by emitting the laser beams from the thickness direction of the division object substrate 4 to the division object substrate 4 of a TFT element substrate or the like, the energy of the laser beams is condensed over the whole area or almost the whole area in the thickness direction of the division object substrate 4 by diffracting the laser beams with a diffraction optical element 13 and a modified area 1 is formed in a condensing area. Accordingly, sufficient energy density is obtained by the long thin condensing area suitable for substrate division and the modified area 1 over the whole area or almost the whole area in the thickness direction of the division object substrate 4 is formed, so that the number of the scannings of the laser beams is reduced. COPYRIGHT: (C)2009,JPO&INPIT

Patent
31 Oct 2007
TL;DR: In this article, a container that is capable of being easily assembled and conveyed while production cost and production time are reduced includes a plurality of division parts having walls and upper portions, and first fitting members formed at ends of the division parts to fit adjacent divisions to each other.
Abstract: A container that is capable of being easily assembled and conveyed while production cost and production time are reduced includes a plurality of division parts having walls and upper portions, and first fitting members formed at ends of the division parts to fit adjacent division parts to each other. A display apparatus including the container and a method of manufacturing the display apparatus are further provided.

Patent
25 May 2007
TL;DR: In this article, a fractional frequency divider is introduced in the feedback path of the PLL to generate a true fractional division factor with finite fractional steps to increase the resolution by a factor equal to the inverse of the finite step size.
Abstract: An apparatus and method is disclosed to substantially reduce phase noise introduced in fractional-N phase-locked loop (PLL) through feedback modulation. A fractional frequency divider is introduced in the feedback path of the PLL to generate a true fractional division factor with finite fractional steps to increase the resolution of the PLL by a factor equal to the inverse of the finite step size in the fractional frequency divider. Increasing the resolution of the PLL reduces phase noise. The fractional frequency divider uses the true fractional division factor to divide the frequency of a single output of a multi-phased voltage controlled oscillator (VCO) by the fractional division factor to match the frequency of the divided feedback signal to frequency a reference signal. The fractional frequency divider incrementally selects among all the outputs of the multi-phased VCO according to either a forward phase shifting operation or a backward phase shifting operation to generate a true fractional division factor.

Patent
07 Feb 2007
TL;DR: In this paper, the authors proposed a resource distribution method based on region orthogonal frequency division multiple-time division multiple communication system, wherein the wireless network controller, based on the service load conditions of each base station, from high to low, arranges the regions, to fix the resource distribution sequence of each region; based on said sequence, the base station distributes resource for the mobile terminal.
Abstract: The invention relates to a resource distributing method based on region orthogonal frequency division multiple-time division multiple communication system, wherein said method comprises: the wireless network controller, based on the service load conditions of each base station, from high to low, arranges the regions, to fix the resource distribution sequence of each region; based on said sequence, the base station distributes resource for the mobile terminal; and the resource distribution comprises: based on special carrier wave, calculating the transmission speed supported by the carrier wave terminal relative to each mobile terminal; comparing the transmission speeds supported by the carrier wave terminals of each mobile terminal, to fix the maximum transmission speed and relative mobile terminal; distributing said carrier wave to the mobile terminal; based on next carrier wave, repeating aforementioned operations, until all carrier waves are distributed to the mobile terminal; in next time slit, repeating said operations