Topic
Division (mathematics)
About: Division (mathematics) is a research topic. Over the lifetime, 12717 publications have been published within this topic receiving 87814 citations.
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Patent•
22 Apr 1991TL;DR: In this article, a frequency synthesizer employs a frequency divider (103) and a frequency multiplier (403) in the feedback loop, and the minimum frequency separation between two adjacent synthesized channels is equal to the reference frequency divided by the multiplication ratio of the multiplier.
Abstract: A frequency synthesizer employs a frequency divider (103) and a frequency multiplier (403) in the feedback loop. The minimum frequency separation between two adjacent synthesized channels is equal to the reference frequency divided by the multiplication ratio of the multiplier. The division ratio of the frequency divider (103), which can be analyzed as the sum of an integer and a fractional portion, is varied with time by a digital sequence, resulting in a minimum frequency increment equal to a fraction of the reference frequency. The multiplier (403) acts to reduce the nonlinearities of the frequency synthesizer when the fractional portion of the division ratio causes a large variation in the instantaneous division ratio by reducing the effective division ratio of the loop.
52 citations
TL;DR: It is shown that by using parallelism the evaluation of any first-order rational recurrence of degree greater than 1 can be sped up at most by a constant factor, no matter how many processors are used and how large the size of the problem is.
Abstract: The parallel evaluation of rational expressions is considered. New algorithms which minimize the number of multiplication or division steps are given. They are faster than the usual algorithms when multiplication or division takes more time than addition or subtraction. It is shown, for example, that xn can be evaluated in two steps of parallel division and ⌈log2n⌉ steps of parallel addition, while the usual algorithm takes ⌈log2n⌉ steps of parallel multiplication.Lower bounds on the time required are obtained in terms of the degree of the expressions to be evaluated. From these bounds, the algorithms presented in the paper are shown to be asymptotically optimal. Moreover, it is shown that by using parallelism the evaluation of any first-order rational recurrence of degree greater than 1, e.g. yi+1 = 1/2;(yi + a/yi), and any nonlinear polynomial recurrence can be sped up at most by a constant factor, no matter how many processors are used and how large the size of the problem is.
52 citations
Patent•
25 Feb 1998
TL;DR: In this article, the authors proposed a method to facilitate the setting of an area in response to a characteristic of an image by enhancing a degree of freedom of an areas shape in the case of dividing an image into a plurality of areas and coding them.
Abstract: PROBLEM TO BE SOLVED: To facilitate setting of an area in response to a characteristic of an image by enhancing a degree of freedom of an area shape in the case of dividing an image into a plurality of areas and coding them. SOLUTION: The moving image coder has an area division section 1, a coding section 7, and a memory 9 that is used to predict motion compensation. The area division section 1 has a division processing section and an integral processing section. The division processing section divides an input image based on a reference relating to the propriety of division. The integral processing section integrates areas close to each other based on the reference relating to the propriety of integration. Then each area is coded. The integral processing diversifies the shape of the area.
52 citations
TL;DR: The main result of as mentioned in this paper is that no division implies chaos, and the main result here is that there cannot be any better than that, under our conditions, under which one cannot do any better.
Abstract: Let / be a closed interval in /?' and/: / -» / be continuous. Let x0 G / and ft \\ r • -^ n */+!=/(*/) forOO. We say there is no division iox (xx, x2,. ■ ■ ,x„) \\i there is no a G / such that Xj < a for ally even and Xj < a for ally odd. The main result of this paper proves the simple statement: no division implies chaos. Also given here are some converse theorems, detailed estimates of the existing periods, and examples which show that, under our conditions, one cannot do any better.
52 citations
TL;DR: Radix-4 algorithms for square root and division are developed and are shown to be suitable for implementing as a unified hardware unit which evaluates square root, division, and multiplication.
Abstract: In this paper radix-4 algorithms for square root and division are developed. The division algorithm evaluates the more useful function xz/y. These algorithms are shown to be suitable for implementing as a unified hardware unit which evaluates square root, division, and multiplication. Cost reductions in the hardware are obtained by use of gate arrays. A design based on the Motorola MCA2500 series of Macrocell gate array (MCA) is presented. At a cost of 9 MCA's and 16 commercial ECL 100 K parts a 64-bit square root can be evaluated in 750 us using worst case delays. Division takes 710 ns and multiplication 325 ns. Redundancy in the digit set together with carry-save adders are used to achieve this high performance.
52 citations