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Divisor

About: Divisor is a research topic. Over the lifetime, 2462 publications have been published within this topic receiving 21394 citations. The topic is also known as: factor & submultiple.


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TL;DR: In this paper, the authors studied finiteness related properties of generalized integrals of a nonisotrivial complex elliptic surface and showed that the set of integrals is finite in families where both the subset and the divisor are allowed to vary.
Abstract: Let $f \colon X \to B$ be a nonisotrivial complex elliptic surface and let $\mathcal{D} \subset X$ be an integral divisor dominating $B$. We study finiteness related properties of generalized $(S, \mathcal{D})$-integral sections $\sigma \colon B \to X$ of $X$. These integral sections $\sigma$ correspond to rational points in $A(K)$ which satisfy the set-theoretic condition $f ( \sigma(B) \cap \mathcal{D})\subset S$, where $S \subset B$ is an arbitrary given subset. For $S \subset B$ finite, the set of $(S, \mathcal{D})$-integral sections of $X$ is finite by the well-known Siegel theorem. In this article, we establish a general quantitative finiteness result of several large unions of $(S, \mathcal{D})$-integral sections in which both the subset $S$ and the divisor $\mathcal{D}$ are allowed to vary in families where notably $S$ is not necessarily finite nor countable. Some applications to generalized unit equations over function fields are also given.

6 citations

Journal ArticleDOI
TL;DR: In this article, the authors considered the problem of lower bounds for the rate of decrease of a radical Banach algebra sequence under various assumptions over b and ^, when b is not nilpotent and & commutative.
Abstract: Every element 6 of a radical Banach algebra & satisfies l iπv^ ||6||=0. We are concerned here with the existence of a lower bound for the rate of decrease of the sequence (||δ||) under various assumptions over b and ^ , when b is not nilpotent and & commutative. If the nilpotents are dense in & then for every sequence (λn) of positive reals there exists a nonnilpotent b e & such that lim inf*-«, ||6||/ϋ»=0. A stronger result holds if & possesses furthermore a bounded approximate identity. On the other direction if & has no nilpotent element and if some element of & which is not a divisor of zero acts compactly on & then there exists a sequence (2n) of positive reals such that \immfn-+0O\\b n\\lλn— + °o for every nonzero be&. Also there exists universal lower bounds for the rate of decrease of ll

6 citations

Patent
Henri Willem Schneider1
14 Mar 1980
TL;DR: In this article, a number of dividers for a non-integer divisor f = N-1/2 are presented, where the divider comprises a chain of dynamic bistable elements, at least one of which is activated in reaction to the positive-going signal edges.
Abstract: A number of dividers for a non-integer divisor f, notably f=N-1/2. The divider comprises a chain of dynamic bistable elements, at least one of which is activated in reaction to the positive-going signal edges, while at least one is activated in reaction to the negative-going signal edges, having completely synchronous circuits and substantially synchronous circuits; a simple implementation for dividers with an arbitrary, and very large divider.

6 citations

Proceedings ArticleDOI
18 May 2008
TL;DR: A novel VLSI iterative divider architecture for fast quotient generation that is based on radix-2 non-restoring division that makes use of the magnitude difference between the partial dividend and the divisor for the next iteration so that the proper weight of the quotient can be obtained more rapidly than the conventional methods.
Abstract: In this paper, a novel VLSI iterative divider architecture for fast quotient generation that is based on radix-2 non-restoring division is proposed. To speed up the quotient generation, our method makes use of the magnitude difference between the partial dividend and the divisor for the next iteration so that the proper weight of the quotient can be obtained more rapidly than the conventional methods. Our proposed architecture is very simple compared to the multiplication-based methods such as those that are based on Newton-Raphson. Simulation results show that our proposed method can achieve less than half the number of iterations required by the conventional division (i.e. less than nil vs. n, where n is the bit-width of the dividend and the divisor). The proposed architecture has been synthesized in 0.13 mum CMOS standard cell library to demonstrate the delay and the power efficiency.

6 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20222
2021157
2020172
2019127
2018120
2017140