Divisor

About: Divisor is a research topic. Over the lifetime, 2462 publications have been published within this topic receiving 21394 citations. The topic is also known as: factor & submultiple.

On the cuspidal divisor group and Eisenstein ideal of Drinfeld modular varieties

Abstract: Let $A=\mathbb{F}_q[T]$ be the ring of polynomials in $T$ with coefficients in a finite field with $q$ elements. Let $\mathfrak{p}\lhd A$ be a maximal ideal, and denote $|\mathfrak{p}|=\# A/\mathfrak{p}$. Let $Y_0^r(\mathfrak{p})$ be the modular variety parametrizing Drinfeld modules of rank $r\geq 2$ over $A$ of generic characteristic with a $\mathfrak{p}$-cyclic subgroup level structure. Let $X_0^r(\mathfrak{p})$ be the Satake compactification of $Y_0^r(\mathfrak{p})$. We show that the cuspidal divisor subgroup of the Picard scheme of $X_0^r(\mathfrak{p})$ is a finite cyclic group of order $$\frac{|\mathfrak{p}|^{r-1}-1}{\gcd(|\mathfrak{p}|^{r-1}-1, q^r-1)}.$$ This is an analogue of a result of Ogg for classical modular curves $X_0(p)$ of prime level. We further define an Eisenstein ideal in the Hecke algebra acting on the Picard scheme of $X_0^r(\mathfrak{p})$, and show that the Eisenstein ideal has finite index in the Hecke algebra divisible by the order of the cuspidal divisor group.

Fast division calculation method and apparatus

Abstract: A division calculation device, which uses bit-shifting and addition to get the quotient of the divisor and the dividend, consists of: A divisor left-shifting device which inputs the divisor and shifts divisor^s bits to the left; A dividend left-shifting device which inputs the dividend and shifts dividend^s bits to the left; A left-shifting controller which controls the left-shifting action of the divisor left-shifting device and stops the action when the divisor or the dividend is larger than a default value; A quotient right-shifting device which inputs the quotient reference value found from the division table index and shifts the bits of the quotient reference value to the right; An and-gate device which inputs and "ANDs" the highest bit output of the dividend left-shifting device and the quotient reference value; An addition device that adds up the outputs from the and gate to obtain the result; A division table that stores a default array of quotient values.

Division processing unit

Abstract: PURPOSE:To speed up the processing speed, by checking the divisor whether it is a value of 2P or not at the 2P detection means and shifting the dividend if divisor is 2P. CONSTITUTION:The divisor given to the logic comparison unit 1 is counted for the number of zeros at the head of the divisor with the reading zero count circuit 2 to check the divisor for the value of 2P. If the divisor has a value of 2P, the division processing with shift mode is made. That is, the amount of shift is calculated with the number of shift calculation circuit 5 and it is set to the SAR register 3. Further, the dividend is shifted with the shifter 9 depending on the content of the register 3. That it, the number of zeros from the least significant bit to the upper rank bit is counted and the dividend is shifted right by the value of count. Further, the result is set to the output register 13 as a quotient. If the dividend has not the value of 2P, normal division is made.

An elementary semi-ampleness result for log canonical divisors

Abstract: If the log canonical divisor on a projective variety with only Kawamata log terminal singularities is numerically equivalent to some semi-ample $\mathbf{Q}$-divisor, then it is semi-ample.

A Construction of Pairs and Triples of k-Incomplete Orthogonal Arrays

Abstract: In this note we construct pairs of orthogonal IA(q+hk,hk) where q is a prime power, k is a proper divisor of q-1 and h≦s+l for a suitable integer s (depending on q). Further we construct triples of mutually orthogonal IA(3 u +2h,2h) with h≦s+l for a suitable integer s.