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Divisor

About: Divisor is a research topic. Over the lifetime, 2462 publications have been published within this topic receiving 21394 citations. The topic is also known as: factor & submultiple.


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Patent
02 Jan 2009
TL;DR: In this article, a phase detector (303) supplying a reference frequency signal and a feedback signal is connected with a charge pump (304) and an oscillator (405) was connected with the charge pump, and a multiplexer (420) was designed for phase quantization and outputting the feedback signal.
Abstract: The circuit has a phase detector (303) supplying a reference frequency signal and a feedback signal. A charge pump (304) is connected with the phase detector. An oscillator (405) is connected with the charge pump. A multiplexer (420) is connected with the oscillator and the phase detector and receives a selected signal. The multiplexer is designed for phase quantization and outputting the feedback signal. A control unit (407) is connected to a divisor (406) and designed for controlling the divisor exhibiting a comparator function.
Journal ArticleDOI
01 Dec 2020
TL;DR: In this article, a detailed structural description of a group if it has a unique composite conjugacy class size is given, where a composite number is a positive integer that has at least one divisor integer other than 1 and itself.
Abstract: A composite number is a positive integer that has at least one divisor integer other than 1 and itself. In this paper, we give a detailed structural description of a group if it has a unique composite conjugacy class size.
Patent
12 Jan 2017
TL;DR: In this paper, an apparatus and method consisting of storage circuitry to store an input data value, divider circuitry to split the data value into at least one subvalue in dependence on a number of lanes for a current iteration, each sub-value occupying a lane, and concatenation circuitry to concatenate each quotient to produce a concatenated division value, in each subsequent iteration.
Abstract: An apparatus and method are provided, the apparatus comprising: storage circuitry to store an input data value; divider circuitry to split the input data value into at least one sub-value in dependence on a number of lanes for a current iteration, each sub-value occupying a lane, and to operate on each sub-value to generate a quotient corresponding to the division of that sub-value by a divisor, wherein the divisor is an odd integer; remainder circuitry to operate on each sub-value to generate a remainder corresponding to the remainder of dividing that sub-value by the divisor; concatenation circuitry to concatenate each quotient to produce a concatenated division value, and to concatenate each remainder to produce a concatenated remainder value, in each subsequent iteration, the input data value being formed from the concatenated remainder value of a preceding iteration; and output circuitry to output, after a plurality of iterations, a result of adding the concatenated division values produced by said plurality of iterations.
Patent
02 Nov 2001
TL;DR: In this paper, an integer IF frequency synthesizer is used to synthesize a raster component of the desired frequency channel spacing in an RF transmission signal, which is then used by an IF synthesizer to incorporate the desired raster using a lower feedback divisor (N) than the RF synthesizer.
Abstract: In the synthesis of frequency channel spacing in an RF transmission signal, a raster component of the desired frequency channel spacing is provided by an integer IF frequency synthesizer (44). Because the frequencies associated with the IF synthesizer are lower then those associated with an RF frequency synthesizer (48), the IF synthesizer can incorporate the desired raster using a lower feedback divisor (N) than can the RF synthesizer.
Posted Content
TL;DR: In this article, the authors consider a singular irreducible complex manifold of dimension n, and show that the Grauert-Riemenschneider sheaf of such a manifold is O(n+2) for large i.
Abstract: Let M be a singular irreducible complex manifold of dimension n. There are Q divisors D[-1], D[0], D[1],...,D[n+1] on Nash's manifold U -> M such that D[n+1] is relatively ample on bounded sets, D[n] is relatively eventually basepoint free on bounded sets, and D[-1] is canonical with the same relative plurigenera as a resolution of M. The divisor D=D[n] is the supremum of divisors (1/i)D_i. An arc g containing one singular point of M lifts to U if and only if the generating number of oplus_i O_g(D_i) is finite. When it is finite it equals 1+(K_U-K) .g where O_U(K) is the pullback mod torsion of Lambda^n Omega_M. If C is a complete curve in U then (-1/(n+1))K_U .C=D_1 .C + D_n+2 .C + D_(n+2)^2 .C +..... When there are infinitely many nonzero terms the sum should be taken formally or p-adically for a prime divisor p of n+2. There are finitely many nonzero terms if and only if C. D=0. The natural holomorphic map U -> M factorizes through the contracting map U -> Y_0. If M is bounded, the Grauert-Riemenschneider sheaf of M is Hom(O_M(D_{(n+2)^i - 1}), O_M(D_{(n+2)^i})) for large i. If M is projective, singular foliations on M such that K+(n+1)H is a finitely-generated divisor of Iitaka dimension one are completely resolvable, where K is the canonical divisor of the foliation and H is a hyperplane. There are some precise open questions in the article. According to a question of [7] it is not known whether Y_0 has canonical singularities.

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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20222
2021157
2020172
2019127
2018120
2017140