Drain-induced barrier lowering

About: Drain-induced barrier lowering is a research topic. Over the lifetime, 6163 publications have been published within this topic receiving 101547 citations.

RF Switch Branch Having Improved Linearity

Abstract: Disclosed is a radio frequency (RF) switch branch having a reduced nonlinearity and an associated method for reducing nonlinearity in a RF switch branch. The RF switch branch includes a primary transistor, a first transistor having power terminals electrically connected between a drain node and a body node of the primary transistor, and a second transistor having power terminals electrically connected between the body node and a source node of the primary transistor. The RF switch may further include a body resistor electrically connected between the body node of the primary transistor and ground, and a gate resistor electrically connected between a gate of the primary transistor and a gate voltage source. A gate of each of the first transistor and the second transistor is electrically connected to the gate voltage source such that the first transistor and the second transistor are ON only when the primary transistor is ON.

Sample and hold circuit having improved linearity

Abstract: A sample and hold circuit having a semiconductor with a field effect transistor therein. The field effect transistor has a channel in the semiconductor, a source region in the semiconductor, a drain region in the semiconductor a front-gate disposed over the channel, and a back-gate in the semiconductor under the channel. The front-gate and back-gate are configured to control a flow of carriers in the semiconductor through a length of the channel between the source region and the drain region. A capacitor is connected to one of the drain and source regions. The other one of the source and drain region is configured for coupling to an input signal. A switch is responsive to a sampling signal to electrically connect a constant electrical potential between one of the source and drain regions and back-gate during a tracking phase. In one embodiment, the sample and hold circuit includes a second switch to electrically a second constant potential between the front-gate and one of the source and drain. With such an arrangement, non-linearities arising from variations in both the voltage between the source/drain and back-gate (V (s/d)b ) and between the source/drain and front-gate (V (s/d)g ) are compensated leading to a more linear sample and hold circuit. In a second embodiment, the second switch electrically connects a fixed potential to the front-gate during the tracking phase. With such an arrangement, non-linearities arising from variations in the voltage between the source/drain and back-gate (V (s/d)b ) are compensated leading to a more linear sample and hold circuit. Further, because the non-linearities due to V sb are dealt with, the need for a large (V (s/d)g ) (with the potential for voltages exceeding the supply voltage) is reduced. Hence circuit according to the invention yields reduced harmonic distortion without the need for large on-chip voltages.

Barrier height voltage reference

Abstract: A barrier height voltage reference includes two field-effect transistors which are substantially identical except for their gate-to-channel potential barrier characteristics and which are biased to carry equal drain currents at equal drain voltages. The resulting difference in potential between the gate contacts of the two field effect transistors produces a voltage reference which is substantially independent of operating point, supply potential, and temperature.

MOS transistor and method for making the same

Abstract: Transistor devices comprise a gate electrode, a channel region formed beneath the gate electrode, a source region in contact with one side of the channel region, a first conductive region formed in a semiconductor layer at the outer side of the source region and made of a metal or metal compound, a drain region formed in contact with the other side of the channel region, and a second conductive region formed in the semiconductor layer at the outer side of the drain region and consisting of a metal or a metal compound. The transistor has an SOI structure which has an improved breakdown voltage between the source region and the drain region with low sheet resistances of the source and drain regions. Methods for making the transistor devices are also described.