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Drain-induced barrier lowering

About: Drain-induced barrier lowering is a research topic. Over the lifetime, 6163 publications have been published within this topic receiving 101547 citations.


Papers
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Patent
17 Feb 1987
TL;DR: In this article, a gate layer is made of a conductive material forming a Schottky junction between the substrate and the gate layer, and barrier layers are formed to surround the source and drain regions.
Abstract: In a GaAs field effect transistor of the invention, a gate layer is formed on a semi-insulative substrate. The gate layer is made of a conductive material forming a Schottky junction between the substrate and the gate layer. Source and drain regions are formed in the substrate to have a first conductivity type. Barrier layers are formed in the substrate to have a second conductivity type. The barrier layers are formed to surround the source and drain regions, and suppress a current component from leaking from the source and drain regions to the substrate when the field effect transistor is operative.

26 citations

Patent
18 Nov 2008
TL;DR: In this paper, a channel region, a gate dielectric, and a gate electrode over the channel region are defined in a semiconductor device, where the source/drain regions are semiconductor regions and the gate electrode is a metal region.
Abstract: A semiconductor device includes a channel region; a gate dielectric over the channel region; and a gate electrode over the gate dielectric. A first source/drain region is adjacent the gate dielectric, wherein the first source/drain region is a semiconductor region and of a first conductivity type. A second source/drain region is on an opposite side of the channel region than the first source/drain region, wherein the second source/drain region is a metal region. A pocket region of a second conductivity type opposite the first conductivity type is horizontally between the channel region and the second source/drain region.

26 citations

Patent
08 Mar 2006
TL;DR: In this paper, the authors proposed a field effect transistor (FE transistor) consisting of a drain region made of SiC, a drift layer which is formed on the drain region and is made of n-type SiC.
Abstract: A decrease in breakdown voltage can be prevented as much as possible. A field-effect transistor includes: a drain region made of SiC; a drift layer which is formed on the drain region and is made of n-type SiC; a source region which is formed on the surface of the drift layer and is made of n-type SiC; a channel region which is formed on the surface of the drift layer located on a side of the source region and is made of SiC; an insulating gate which is formed on the channel region; and a p-type base region interposed between the bottom portion of the source region and the drift region, and containing two kinds of p-type impurities.

26 citations

Patent
30 Nov 2005
TL;DR: A junction field effect transistor (JFE transistor) as discussed by the authors is a transistor made from a wide bandgap semiconductor material, which comprises source, channel, drift and drain semiconductor layers, as well as p-type implanted or Schottky gate regions.
Abstract: A junction field effect transistor is described. The transistor is made from a wide bandgap semiconductor material. The device comprises source, channel, drift and drain semiconductor layers, as well as p-type implanted or Schottky gate regions. The source, channel, drift and drain layers can be epitaxially grown. The ohmic contacts to the source, gate, and drain regions can be formed on the same side of the wafer. The devices can have different threshold voltages depending on the vertical channel width and can be implemented for both depletion and enhanced modes of operation for the same channel doping. The devices can be used for digital, analog, and monolithic microwave integrated circuits. Methods for making the transistors and integrated circuits comprising the devices are also described.

26 citations

Patent
Watrous Willis George1
13 Mar 1974
TL;DR: An n-channel MOSFET transistor which includes doping of previously formed source and drain elements with a heavy diffusion of phosphorous or arsenic creating n + + regions in the source.
Abstract: An n channel MOSFET transistor which includes doping of previously formed source and drain elements with a heavy diffusion of phosphorous or arsenic creating n + + regions in the source and drain. The extra diffusion step is preferably accomplished just prior to contact metalization.

26 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202330
202279
202161
202055
201958
201845