Topic
Drain-induced barrier lowering
About: Drain-induced barrier lowering is a research topic. Over the lifetime, 6163 publications have been published within this topic receiving 101547 citations.
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IBM1
TL;DR: In this article, the authors proposed to add a Si channel near the drain region of a field effect transistor to maintain the GIDL current of the transistor at a level on par with that of a transistor having a silicon channel only during an off state.
Abstract: A field effect transistor includes a partial SiGe channel, i.e., a channel including a SiGe channel portion, located underneath a gate electrode and a Si channel portion located underneath an edge of the gate electrode near the drain region. The SiGe channel portion can be located directly underneath a gate dielectric, or can be located underneath a Si channel layer located directly underneath a gate dielectric. The Si channel portion is located at the same depth as the SiGe channel portion, and contacts the drain region of the transistor. By providing a Si channel portion near the drain region, the GIDL current of the transistor is maintained at a level on par with the GIDL current of a transistor having a silicon channel only during an off state.
26 citations
09 Apr 2013
TL;DR: In this article, the compositional difference between the first III-N barrier layer and the third-N channel layer causes a conductive channel to be induced in the access regions of the III-n channel layer.
Abstract: An N-polar III-N transistor includes a III-N buffer layer, a first III-N barrier layer, and a III-N channel layer, the III-N channel layer having a gate region and a plurality of access regions on opposite sides of the gate region. The compositional difference between the first III-N barrier layer and the III-N channel layer causes a conductive channel to be induced in the access regions of the III-N channel layer. The transistor also includes a source, a gate, a drain, and a second III-N barrier layer between the gate and the III-N channel layer. The second III-N barrier layer has an N-face proximal to the gate and a group-III face opposite the N-face, and has a larger bandgap than the III-N channel layer. The lattice constant of the first III-N barrier layer is within 0.5% of the lattice constant of the buffer layer.
26 citations
Patent•
07 Jun 1995TL;DR: In this article, a field effect thin-film transistor (TFT) is applied to a p-channel MOS transistor serving as a load transistor in a memory cell of a CMOS type SRAM.
Abstract: In a miniaturized complete CMOS SRAM of a TFT load type, a field effect thin-film transistor (TFT) can achieve stable reading and writing operation of a memory cell and can reduce power consumption thereof. The field effect thin-film transistor formed on an insulator includes an active layer and a gate electrode. The gate electrode is formed on a channel region of the active layer with a gate insulating film therebetween. The active layer is formed of a channel region and source/drain regions. The channel region is formed of a monocrystal silicon layer and does not includes a grain boundary. The source/drain regions is formed of a polysilicon layer. The channel region has a density of crystal defects of less than 109 pieces/cm2. The thin film transistor shows an ON current of 0.25 μA/μm per channel width of 1 μm and an OFF current of 15 fA/μm. The thin-film transistor can be applied to a p-channel MOS transistor serving as a load transistor in a memory cell of a CMOS type SRAM.
26 citations
TL;DR: In this article, a distributed model based on a numerical calculation of the accumulated charge along the channel, allowing the calculation of transistor output characteristics both below and above threshold, was developed, and the impact on threshold voltage and turn-on voltage was outlined.
26 citations
TL;DR: In this article, a heterojunction symmetric tunnel field effect transistor (S-TFET) was proposed and investigated, for the first time, in order to address the inborn technical challenges of the conventional p-i-n TFET (i.e., asymmetric TFET).
26 citations