Drain-induced barrier lowering

About: Drain-induced barrier lowering is a research topic. Over the lifetime, 6163 publications have been published within this topic receiving 101547 citations.

A subthermionic tunnel field-effect transistor with an atomically thin channel.

Abstract: A new type of device, the band-to-band tunnel transistor, which has atomically thin molybdenum disulfide as the active channel, operates in a fundamentally different way from a conventional silicon (MOSFET) transistor; it has turn-on characteristics and low-power operation that are better than those of state-of-the-art MOSFETs or any tunnelling transistor reported so far. Traditional transistor technology is fast approaching its fundamental limits, and two-dimensional semiconducting materials such as molybdenum disulfide (MoS2) are seen as possible replacements for silicon in a next generation of high-density, lower-power chip electronics. A particularly promising prospect is their potential in band-to-band tunnel transistors, which operate in a fundamentally different way from conventional silicon (MOSFET) transistors. So far, few such devices with overall characteristics better than silicon transistors have been demonstrated. Now Kaustav Banerjee et al. have built a tunnel transistor by making a vertical structure with atomically thin MoS2 as the active channel and germanium as the source electrode. It has turn-on characteristics and low-power operation that are better than those of existing silicon transistors, and the results will be of interest in a range of electronic applications including low-power integrated circuits, as well as ultra-sensitive bio sensors or gas sensors. The fast growth of information technology has been sustained by continuous scaling down of the silicon-based metal–oxide field-effect transistor. However, such technology faces two major challenges to further scaling. First, the device electrostatics (the ability of the transistor’s gate electrode to control its channel potential) are degraded when the channel length is decreased, using conventional bulk materials such as silicon as the channel. Recently, two-dimensional semiconducting materials1,2,3,4,5,6,7 have emerged as promising candidates to replace silicon, as they can maintain excellent device electrostatics even at much reduced channel lengths. The second, more severe, challenge is that the supply voltage can no longer be scaled down by the same factor as the transistor dimensions because of the fundamental thermionic limitation of the steepness of turn-on characteristics, or subthreshold swing8,9. To enable scaling to continue without a power penalty, a different transistor mechanism is required to obtain subthermionic subthreshold swing, such as band-to-band tunnelling10,11,12,13,14,15,16. Here we demonstrate band-to-band tunnel field-effect transistors (tunnel-FETs), based on a two-dimensional semiconductor, that exhibit steep turn-on; subthreshold swing is a minimum of 3.9 millivolts per decade and an average of 31.1 millivolts per decade for four decades of drain current at room temperature. By using highly doped germanium as the source and atomically thin molybdenum disulfide as the channel, a vertical heterostructure is built with excellent electrostatics, a strain-free heterointerface, a low tunnelling barrier, and a large tunnelling area. Our atomically thin and layered semiconducting-channel tunnel-FET (ATLAS-TFET) is the only planar architecture tunnel-FET to achieve subthermionic subthreshold swing over four decades of drain current, as recommended in ref. 17, and is also the only tunnel-FET (in any architecture) to achieve this at a low power-supply voltage of 0.1 volts. Our device is at present the thinnest-channel subthermionic transistor, and has the potential to open up new avenues for ultra-dense and low-power integrated circuits, as well as for ultra-sensitive biosensors and gas sensors18,19,20,21.

Threshold voltage of thin-film Silicon-on-insulator (SOI) MOSFET's

Abstract: The charge coupling between the front and back gates of thin-film silicon-on-insulator (SOI: e.g,, recrystallized Si on SiO 2 ) MOSFET's is analyzed, and closed-form expressions for the threshold voltage under all possible steady-state conditions are derived. The expressions clearly show the dependence of the linear-region channel conductance on the back-gate bias and on the device parameters, including those of the back silicon-insulator interface. The analysis is supported by current-voltage measurements of laser-recrystallized SOI MOSFET's. The results suggest how the back-gate bias may be used to optimize the performance of the SOI MOSFET in particular applications.

Photocurrent imaging and efficient photon detection in a graphene transistor

Abstract: We measure the channel potential of a graphene transistor using a scanning photocurrent imaging technique. We show that at a certain gate bias, the impact of the metal on the channel potential profile extends into the channel for more than one-third of the total channel length from both source and drain sides; hence, most of the channel is affected by the metal. The potential barrier between the metal-controlled graphene and bulk graphene channel is also measured at various gate biases. As the gate bias exceeds the Dirac point voltage, VDirac, the original p-type graphene channel turns into a p-n-p channel. When light is focused on the p-n junctions, an impressive external responsivity of 0.001 A/W is achieved, given that only a single layer of atoms are involved in photon detection.

Effects of diffusion current on characteristics of metal-oxide (insulator)-semiconductor transistors☆

Abstract: A qualitative discussion of the device operation is first given using three-dimensional energy band diagrams to show the significance of the diffusion current. The theoretical static I–V characteristics are the computed including both the diffusion and the drift currents, based on the one-dimensional and gradual channel model. Drain current saturation phenomena are evident in these exact solutions which are in good agreement with the calculations based on the bulk charge approximation and with the experimental data for the entire non-saturating and saturated ranges. The relative importance of the two current components along the length of the channel is illustrated. The effects of the diffusion current on the three more important low-frequency dynamic characteristics (the short-circuit gate capacitance, the transconductance, and the drain conductance) are discussed. The surface potential, the quasi-Fermi potential, the surface electric field and the surface carrier concentration along the channel are examined. The complete one-dimensional gradual channel model is inadequate to account for the large drain conductance observed in the saturation range, and it is shown that the electric field longitudinal to the channel current flow must be taken into account near the drain junction where it is larger than the transverse field due to the voltage applied to the gate electrode.

A charge-sheet model of the MOSFET

Abstract: Intuition, device evolution, and even efficient computation require simple MOSFET (metal-oxide-semiconductor field-effect transistor) models. Among these simple models are charge-sheet models which compress the inversion layer into a conducting plane of zero thickness. It is the purpose of this paper to test one such charge sheet model to see whether this approximation is too severe. This particular model includes diffusion which is expected to be important in the subthreshold and saturation regions. As a test the charge sheet model is applied to long-channel devices. Long-channel MOSFET behavior has been thoroughly studied, and is very well explained by the Pao-Sah double-integral formula for the current. Hence, a clear-cut test is a comparison of the charge sheet model with the Pao-Sah model. We find the charge sheet model has two advantages over the Pao-Sah model. (1) It leads to a very simple algebraic formula for the current of long-channel devices. The same formula applies in all regimes from subthreshold to saturation. Neither splicing nor parameter changes are needed. No discontinuities occur in either the current or the small-signal parameters, or in the derivatives of the small-signal parameters. (2) It is simpler to extend the charge sheet model to two or three dimensions than the Pao-Sah model. This simplification is a result of dropping the details of the inversion layer charge distribution. An important aspect of the gradual channel approximation is brought out by the analysis. Suppose the boundary condition relating the quasi-fermi level at the drain, φfL, to that at the source, φfo, namely φ ƒL =φ ƒ0 +V D where VD is the drain voltage, is applied in all bias regimes. Then it is shown that this means the potential at the drain end of the channel, φsL is not related to the potential at the source end of the channel, φso, by φ sL =φ s0 +V D Instead, φsL is computed, not imposed as a boundary condition. It is suggested that this failure of the potential to satisfy the boundary condition at the drain is justifiable. That is, φsL should be reinterpreted as the potential at the point in the channel where the gradual channel approximation fails. Hence, (2) may be relaxed. However, the “channel length” in the gradual-channel approximation now becomes a fitting parameter and is not the metallurgical source-to-drain separation. In addition several aspects of the long-channel MOSFET are brought out: (1) Pinch-off is achieved only asymptotically as the drain voltage tends to infinity. This is in marked contrast to the often-stated, textbook view that pinch-off is achieved for some finite drain voltage, the saturation voltage. (2) The channel or drain conductance approaches zero only asymptotically. (3) The transconductance saturates only asymptotically. Figures comparing the simple charge-sheet model formulas with the usual textbook formulas are included for direct-current vs drain voltage, channel conductance vs drain voltage, and transconductance vs drain voltage. The charge-sheet model agrees with the original Pao-Sah double-integral formula for the current at all gate and drain voltages, and possesses the correct subthreshold behavior. The textbook formulas do not.